commit | 0d20f9c744eed5da0a1dc9ea80ab3d345a6f84ed | [log] [tgz] |
---|---|---|
author | Feng Tang <feng.tang@intel.com> | Thu Nov 20 17:20:56 2008 +0800 |
committer | Patrick Tjin <pattjin@google.com> | Mon Jul 21 20:22:38 2014 -0700 |
tree | 3e8d913a38204e87b567fb259b041b56e99714f6 | |
parent | c883a5ce980f21beb3069a6aa96ec822e4229055 [diff] |
remove the code of setting txtflr register
diff --git a/spi-uart.c b/spi-uart.c index 43e73db..42cf8b4 100644 --- a/spi-uart.c +++ b/spi-uart.c
@@ -46,7 +46,7 @@ pspi->baudr = 2; /* need set the transmit threshhol? */ - pspi->txftlr = 0x3; + /* pspi->txftlr = 0x3; */ /* disable all INT for early phase */ pspi->imr &= 0xffffff00;