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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070034#include <cutils/compiler.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070035#include <cutils/log.h>
Greg Hackmann6e0f76d2012-09-17 17:47:09 -070036#include <cutils/properties.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070037#include <hardware/gralloc.h>
38#include <hardware/hardware.h>
39#include <hardware/hwcomposer.h>
40#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070041#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070042#include <utils/Vector.h>
43
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070044#include <sync/sync.h>
45
Greg Hackmann86eb1c62012-05-30 09:25:51 -070046#include "ion.h"
47#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070048#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070049#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070050#include "exynos_v4l2.h"
51#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070052
Greg Hackmannf9509d32012-09-12 09:49:29 -070053const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070055const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070056const size_t GSC_W_ALIGNMENT = 16;
57const size_t GSC_H_ALIGNMENT = 16;
Sanghee Kim7b4c1322012-10-04 18:44:36 -070058const size_t GSC_DST_W_ALIGNMENT_RGB888 = 32;
59const size_t GSC_DST_H_ALIGNMENT_RGB888 = 1;
Greg Hackmannd6743822012-10-02 17:27:25 -070060const size_t FIMD_GSC_IDX = 0;
61const size_t HDMI_GSC_IDX = 1;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070062const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
63const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
64 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann67b2c312012-10-01 13:31:26 -070065const size_t BURSTLEN_BYTES = 16 * 8;
Benoit Goby93f9f5d2012-09-28 20:37:17 -070066const size_t NUM_HDMI_BUFFERS = 3;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Erik Gilling87e707e2012-06-29 17:35:13 -070068struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070069
Greg Hackmann9130e702012-07-30 14:53:04 -070070struct exynos5_gsc_map_t {
71 enum {
72 GSC_NONE = 0,
73 GSC_M2M,
74 // TODO: GSC_LOCAL_PATH
75 } mode;
76 int idx;
77};
78
Greg Hackmann86eb1c62012-05-30 09:25:51 -070079struct exynos5_hwc_post_data_t {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -070080 int overlay_map[NUM_HW_WINDOWS];
81 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
82 size_t fb_window;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070083};
84
Greg Hackmann44a6d422012-09-17 17:31:30 -070085const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070086struct exynos5_gsc_data_t {
87 void *gsc;
88 exynos_gsc_img src_cfg;
89 exynos_gsc_img dst_cfg;
90 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
91 size_t current_buf;
92};
93
Benoit Goby93f9f5d2012-09-28 20:37:17 -070094struct hdmi_layer_t {
95 int id;
96 int fd;
97 bool enabled;
98 exynos_gsc_img cfg;
99
100 bool streaming;
101 size_t current_buf;
102 size_t queued_buf;
103};
104
Erik Gilling87e707e2012-06-29 17:35:13 -0700105struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700106 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700107
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700109 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700111
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700112 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700113 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700114 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700115 pthread_t vsync_thread;
Greg Hackmann6e0f76d2012-09-17 17:47:09 -0700116 int force_gpu;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700117
Greg Hackmannd92fe212012-09-11 14:28:41 -0700118 int32_t xres;
119 int32_t yres;
120 int32_t xdpi;
121 int32_t ydpi;
122 int32_t vsync_period;
123
Benoit Goby8bad7e32012-08-16 14:17:14 -0700124 int hdmi_mixer0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700125 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700126 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700127 bool hdmi_blanked;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700128 int hdmi_w;
129 int hdmi_h;
Benoit Gobyb5501902012-10-01 00:29:01 -0700130
Benoit Gobyb5501902012-10-01 00:29:01 -0700131 hdmi_layer_t hdmi_layers[2];
Greg Hackmann9130e702012-07-30 14:53:04 -0700132
133 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700134
135 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700136 size_t last_fb_window;
Greg Hackmann600867e2012-08-23 12:58:02 -0700137 const void *last_handles[NUM_HW_WINDOWS];
138 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700139};
140
Greg Hackmannefd98532012-10-02 12:00:42 -0700141static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
142 size_t gsc_idx);
143
Greg Hackmann9130e702012-07-30 14:53:04 -0700144static void dump_handle(private_handle_t *h)
145{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700146 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
147 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700148}
149
Erik Gilling87e707e2012-06-29 17:35:13 -0700150static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700151{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700152 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
153 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
154 l->compositionType, l->flags, l->handle, l->transform,
155 l->blending,
156 l->sourceCrop.left,
157 l->sourceCrop.top,
158 l->sourceCrop.right,
159 l->sourceCrop.bottom,
160 l->displayFrame.left,
161 l->displayFrame.top,
162 l->displayFrame.right,
163 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700164
Greg Hackmann9130e702012-07-30 14:53:04 -0700165 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
166 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700167}
168
169static void dump_config(s3c_fb_win_config &c)
170{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700171 ALOGV("\tstate = %u", c.state);
172 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
173 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
174 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700175 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700176 c.fd, c.offset, c.stride,
177 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700178 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700179 }
180 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
181 ALOGV("\t\tcolor = %u", c.color);
182 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700183}
184
Greg Hackmann9130e702012-07-30 14:53:04 -0700185static void dump_gsc_img(exynos_gsc_img &c)
186{
187 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
188 c.x, c.y, c.w, c.h, c.fw, c.fh);
189 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
190 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
191}
192
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
194inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700195template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
196template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
197
198static bool is_transformed(const hwc_layer_1_t &layer)
199{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700200 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700201}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700202
Greg Hackmann9130e702012-07-30 14:53:04 -0700203static bool is_rotated(const hwc_layer_1_t &layer)
204{
205 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
206 (layer.transform & HAL_TRANSFORM_ROT_180);
207}
208
Erik Gilling87e707e2012-06-29 17:35:13 -0700209static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700210{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700211 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
212 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700213}
214
Benoit Goby8bad7e32012-08-16 14:17:14 -0700215static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
216{
217 return c1.x != c2.x ||
218 c1.y != c2.y ||
219 c1.w != c2.w ||
220 c1.h != c2.h ||
221 c1.format != c2.format ||
222 c1.rot != c2.rot ||
223 c1.cacheable != c2.cacheable ||
224 c1.drmMode != c2.drmMode;
225}
226
227static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
228{
229 return gsc_dst_cfg_changed(c1, c2) ||
230 c1.fw != c2.fw ||
231 c1.fh != c2.fh;
232}
233
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700234static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
235{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700236 switch (format) {
237 case HAL_PIXEL_FORMAT_RGBA_8888:
238 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
239 case HAL_PIXEL_FORMAT_RGBX_8888:
240 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
241 case HAL_PIXEL_FORMAT_RGBA_5551:
242 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Sanghee Kim05cbd792012-09-14 23:58:28 -0700243 case HAL_PIXEL_FORMAT_RGB_565:
244 return S3C_FB_PIXEL_FORMAT_RGB_565;
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700245 case HAL_PIXEL_FORMAT_BGRA_8888:
246 return S3C_FB_PIXEL_FORMAT_BGRA_8888;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700247 default:
248 return S3C_FB_PIXEL_FORMAT_MAX;
249 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700250}
251
252static bool exynos5_format_is_supported(int format)
253{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700254 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255}
256
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700257static bool exynos5_format_is_rgb(int format)
258{
259 switch (format) {
260 case HAL_PIXEL_FORMAT_RGBA_8888:
261 case HAL_PIXEL_FORMAT_RGBX_8888:
262 case HAL_PIXEL_FORMAT_RGB_888:
263 case HAL_PIXEL_FORMAT_RGB_565:
264 case HAL_PIXEL_FORMAT_BGRA_8888:
265 case HAL_PIXEL_FORMAT_RGBA_5551:
266 case HAL_PIXEL_FORMAT_RGBA_4444:
267 return true;
268
269 default:
270 return false;
271 }
272}
273
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700274static bool exynos5_format_is_supported_by_gscaler(int format)
275{
Greg Hackmann9130e702012-07-30 14:53:04 -0700276 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700277 case HAL_PIXEL_FORMAT_RGBX_8888:
278 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700279 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700280 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700281 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700282 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700283
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700284 default:
285 return false;
286 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700287}
288
Greg Hackmann296668e2012-08-14 15:51:40 -0700289static bool exynos5_format_is_ycrcb(int format)
290{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700291 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700292}
293
Greg Hackmann9130e702012-07-30 14:53:04 -0700294static bool exynos5_format_requires_gscaler(int format)
295{
Sanghee Kim05cbd792012-09-14 23:58:28 -0700296 return (exynos5_format_is_supported_by_gscaler(format) &&
297 (format != HAL_PIXEL_FORMAT_RGBX_8888) && (format != HAL_PIXEL_FORMAT_RGB_565));
Greg Hackmann9130e702012-07-30 14:53:04 -0700298}
299
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700300static uint8_t exynos5_format_to_bpp(int format)
301{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700302 switch (format) {
303 case HAL_PIXEL_FORMAT_RGBA_8888:
304 case HAL_PIXEL_FORMAT_RGBX_8888:
Greg Hackmann9eb2a022012-09-26 09:37:12 -0700305 case HAL_PIXEL_FORMAT_BGRA_8888:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700306 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700307
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700308 case HAL_PIXEL_FORMAT_RGBA_5551:
309 case HAL_PIXEL_FORMAT_RGBA_4444:
Sanghee Kim05cbd792012-09-14 23:58:28 -0700310 case HAL_PIXEL_FORMAT_RGB_565:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700311 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700312
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700313 default:
314 ALOGW("unrecognized pixel format %u", format);
315 return 0;
316 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700317}
318
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700319static bool is_x_aligned(const hwc_layer_1_t &layer, int format)
320{
321 if (!exynos5_format_is_supported(format))
322 return true;
323
324 uint8_t bpp = exynos5_format_to_bpp(format);
325 uint8_t pixel_alignment = 32 / bpp;
326
327 return (layer.displayFrame.left % pixel_alignment) == 0 &&
328 (layer.displayFrame.right % pixel_alignment) == 0;
329}
330
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700331static bool dst_crop_w_aligned(const hwc_layer_1_t &layer, int format)
332{
333 int dest_w;
334 int dst_crop_w_alignement;
335
336 dest_w = WIDTH(layer.displayFrame);
337
338 /* GSC's dst crop size should be aligned 128Bytes */
339 dst_crop_w_alignement = 32;
340
341 return (dest_w % dst_crop_w_alignement) == 0;
342}
343
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700344static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
345 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700346{
347 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
348
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700349 int max_w = is_rotated(layer) ? 2048 : 4800;
350 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700351
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700352 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
353 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
354 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700355
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700356 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
357 int dest_w, dest_h;
358 if (rot90or270) {
359 dest_w = HEIGHT(layer.displayFrame);
360 dest_h = WIDTH(layer.displayFrame);
361 } else {
362 dest_w = WIDTH(layer.displayFrame);
363 dest_h = HEIGHT(layer.displayFrame);
364 }
365 int max_downscale = local_path ? 4 : 16;
366 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700367
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700368 return exynos5_format_is_supported_by_gscaler(format) &&
Sanghee Kim3f32ce52012-10-09 20:04:23 -0700369 dst_crop_w_aligned(layer,format) &&
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700370 handle->stride <= max_w &&
371 handle->stride % GSC_W_ALIGNMENT == 0 &&
372 src_w <= dest_w * max_downscale &&
373 dest_w <= src_w * max_upscale &&
374 handle->vstride <= max_h &&
375 handle->vstride % GSC_H_ALIGNMENT == 0 &&
376 src_h <= dest_h * max_downscale &&
377 dest_h <= src_h * max_upscale &&
378 // per 46.2
379 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
380 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
381 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700382}
383
Greg Hackmann09c45c22012-09-20 09:35:37 -0700384static bool exynos5_requires_gscaler(hwc_layer_1_t &layer, int format)
385{
386 return exynos5_format_requires_gscaler(format) || is_scaled(layer)
Greg Hackmann2a19eb12012-09-27 14:09:18 -0700387 || is_transformed(layer) || !is_x_aligned(layer, format);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700388}
389
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700390int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
391{
392 struct v4l2_dv_preset preset;
393 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700394 int index = 0;
395 bool found = false;
396 int ret;
397
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700398 if (ioctl(dev->hdmi_layers[0].fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700399 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
400 return -1;
401 }
402
403 while (true) {
404 enum_preset.index = index++;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700405 ret = ioctl(dev->hdmi_layers[0].fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700406
407 if (ret < 0) {
408 if (errno == EINVAL)
409 break;
410 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
411 return -1;
412 }
413
414 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
415 __func__, enum_preset.index, enum_preset.preset,
416 enum_preset.width, enum_preset.height, enum_preset.name);
417
418 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700419 dev->hdmi_w = enum_preset.width;
420 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700421 found = true;
422 }
423 }
424
425 return found ? 0 : -1;
426}
427
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700428static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
429{
430 switch (blending) {
431 case HWC_BLENDING_NONE:
432 return S3C_FB_BLENDING_NONE;
433 case HWC_BLENDING_PREMULT:
434 return S3C_FB_BLENDING_PREMULT;
435 case HWC_BLENDING_COVERAGE:
436 return S3C_FB_BLENDING_COVERAGE;
437
438 default:
439 return S3C_FB_BLENDING_MAX;
440 }
441}
442
443static bool exynos5_blending_is_supported(int32_t blending)
444{
445 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
446}
447
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700448
449static int hdmi_enable_layer(struct exynos5_hwc_composer_device_1_t *dev,
450 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700451{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700452 if (hl.enabled)
453 return 0;
454
Benoit Goby8bad7e32012-08-16 14:17:14 -0700455 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700456 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700457 reqbuf.count = NUM_HDMI_BUFFERS;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700458 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700459 reqbuf.memory = V4L2_MEMORY_DMABUF;
460 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0) {
461 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700462 return -1;
463 }
464
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700465 if (reqbuf.count != NUM_HDMI_BUFFERS) {
466 ALOGE("%s: layer%d: didn't get buffer", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700467 return -1;
468 }
469
Benoit Gobyb5501902012-10-01 00:29:01 -0700470 if (hl.id == 1) {
471 if (exynos_v4l2_s_ctrl(hl.fd, V4L2_CID_TV_PIXEL_BLEND_ENABLE, 1) < 0) {
472 ALOGE("%s: layer%d: PIXEL_BLEND_ENABLE failed %d", __func__,
473 hl.id, errno);
474 return -1;
475 }
476 }
477
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700478 ALOGV("%s: layer%d enabled", __func__, hl.id);
479 hl.enabled = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700480 return 0;
481}
482
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700483static void hdmi_disable_layer(struct exynos5_hwc_composer_device_1_t *dev,
484 hdmi_layer_t &hl)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700485{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700486 if (!hl.enabled)
487 return;
488
489 if (hl.streaming) {
490 if (exynos_v4l2_streamoff(hl.fd, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0)
491 ALOGE("%s: layer%d: streamoff failed %d", __func__, hl.id, errno);
492 hl.streaming = false;
493 }
494
Benoit Goby8bad7e32012-08-16 14:17:14 -0700495 struct v4l2_requestbuffers reqbuf;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700496 memset(&reqbuf, 0, sizeof(reqbuf));
Benoit Goby8bad7e32012-08-16 14:17:14 -0700497 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700498 reqbuf.memory = V4L2_MEMORY_DMABUF;
499 if (exynos_v4l2_reqbufs(hl.fd, &reqbuf) < 0)
500 ALOGE("%s: layer%d: reqbufs failed %d", __func__, hl.id, errno);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700501
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700502 memset(&hl.cfg, 0, sizeof(hl.cfg));
503 hl.current_buf = 0;
504 hl.queued_buf = 0;
505 hl.enabled = false;
506
507 ALOGV("%s: layer%d disabled", __func__, hl.id);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700508}
509
Benoit Gobycdd61b32012-07-09 12:09:59 -0700510static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
511{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700512 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700513 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700514
Benoit Gobyad4e3582012-08-30 17:17:34 -0700515 if (dev->hdmi_blanked)
516 return 0;
517
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700518 struct v4l2_subdev_format sd_fmt;
519 memset(&sd_fmt, 0, sizeof(sd_fmt));
520 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SINK;
521 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
522 sd_fmt.format.width = dev->hdmi_w;
523 sd_fmt.format.height = dev->hdmi_h;
524 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
525 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
526 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700527 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700528 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700529
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700530 struct v4l2_subdev_crop sd_crop;
531 memset(&sd_crop, 0, sizeof(sd_crop));
532 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SINK;
533 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
534 sd_crop.rect.width = dev->hdmi_w;
535 sd_crop.rect.height = dev->hdmi_h;
536 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
537 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
538 return -1;
539 }
540
541 memset(&sd_fmt, 0, sizeof(sd_fmt));
542 sd_fmt.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
543 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
544 sd_fmt.format.width = dev->hdmi_w;
545 sd_fmt.format.height = dev->hdmi_h;
546 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
547 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
548 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
549 return -1;
550 }
551
552 memset(&sd_crop, 0, sizeof(sd_crop));
553 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
554 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
555 sd_crop.rect.width = dev->hdmi_w;
556 sd_crop.rect.height = dev->hdmi_h;
557 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
558 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
559 return -1;
560 }
561
Benoit Gobyb5501902012-10-01 00:29:01 -0700562 hdmi_enable_layer(dev, dev->hdmi_layers[1]);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700563
Benoit Goby8bad7e32012-08-16 14:17:14 -0700564 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700565 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700566}
567
568static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
569{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700570 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700571 return;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700572
573 hdmi_disable_layer(dev, dev->hdmi_layers[0]);
Benoit Gobyb5501902012-10-01 00:29:01 -0700574 hdmi_disable_layer(dev, dev->hdmi_layers[1]);
575
Greg Hackmannefd98532012-10-02 12:00:42 -0700576 exynos5_cleanup_gsc_m2m(dev, HDMI_GSC_IDX);
Benoit Goby8bad7e32012-08-16 14:17:14 -0700577 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700578}
579
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700580static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev,
581 hdmi_layer_t &hl,
Benoit Gobyb5501902012-10-01 00:29:01 -0700582 hwc_layer_1_t &layer,
Benoit Goby181e92b2012-10-04 16:35:57 -0700583 private_handle_t *h,
584 int acquireFenceFd,
585 int *releaseFenceFd)
Benoit Goby8bad7e32012-08-16 14:17:14 -0700586{
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700587 int ret = 0;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700588
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700589 exynos_gsc_img cfg;
590 memset(&cfg, 0, sizeof(cfg));
591 cfg.x = layer.displayFrame.left;
592 cfg.y = layer.displayFrame.top;
593 cfg.w = WIDTH(layer.displayFrame);
594 cfg.h = HEIGHT(layer.displayFrame);
595
596 if (gsc_src_cfg_changed(hl.cfg, cfg)) {
Benoit Gobyb5501902012-10-01 00:29:01 -0700597 hdmi_disable_layer(dev, hl);
598
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700599 struct v4l2_format fmt;
600 memset(&fmt, 0, sizeof(fmt));
601 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
602 fmt.fmt.pix_mp.width = cfg.w;
603 fmt.fmt.pix_mp.height = cfg.h;
604 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
605 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
606 fmt.fmt.pix_mp.num_planes = 1;
607 ret = exynos_v4l2_s_fmt(hl.fd, &fmt);
608 if (ret < 0) {
609 ALOGE("%s: layer%d: s_fmt failed %d", __func__, hl.id, errno);
610 goto err;
611 }
612
Benoit Gobyb5501902012-10-01 00:29:01 -0700613 struct v4l2_subdev_crop sd_crop;
614 memset(&sd_crop, 0, sizeof(sd_crop));
615 if (hl.id == 0)
616 sd_crop.pad = MIXER_G0_SUBDEV_PAD_SOURCE;
617 else
618 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
619 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
620 sd_crop.rect.left = cfg.x;
621 sd_crop.rect.top = cfg.y;
622 sd_crop.rect.width = cfg.w;
623 sd_crop.rect.height = cfg.h;
624 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
625 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
626 goto err;
627 }
628
629 hdmi_enable_layer(dev, hl);
630
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700631 ALOGV("HDMI layer%d configuration:", hl.id);
632 dump_gsc_img(cfg);
633 hl.cfg = cfg;
634 }
635
636 struct v4l2_buffer buffer;
637 struct v4l2_plane planes[1];
638
639 if (hl.queued_buf == NUM_HDMI_BUFFERS) {
640 memset(&buffer, 0, sizeof(buffer));
641 memset(planes, 0, sizeof(planes));
642 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
643 buffer.memory = V4L2_MEMORY_DMABUF;
644 buffer.length = 1;
645 buffer.m.planes = planes;
646 ret = exynos_v4l2_dqbuf(hl.fd, &buffer);
647 if (ret < 0) {
648 ALOGE("%s: layer%d: dqbuf failed %d", __func__, hl.id, errno);
649 goto err;
650 }
651 hl.queued_buf--;
652 }
653
654 memset(&buffer, 0, sizeof(buffer));
655 memset(planes, 0, sizeof(planes));
656 buffer.index = hl.current_buf;
657 buffer.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
658 buffer.memory = V4L2_MEMORY_DMABUF;
659 buffer.flags = V4L2_BUF_FLAG_USE_SYNC;
Benoit Goby181e92b2012-10-04 16:35:57 -0700660 buffer.reserved = acquireFenceFd;
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700661 buffer.length = 1;
662 buffer.m.planes = planes;
663 buffer.m.planes[0].m.fd = h->fd;
664 if (exynos_v4l2_qbuf(hl.fd, &buffer) < 0) {
665 ALOGE("%s: layer%d: qbuf failed %d", __func__, hl.id, errno);
666 ret = -1;
667 goto err;
668 }
669
Benoit Goby181e92b2012-10-04 16:35:57 -0700670 if (releaseFenceFd)
671 *releaseFenceFd = buffer.reserved;
672 else
673 close(buffer.reserved);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700674
675 hl.queued_buf++;
676 hl.current_buf = (hl.current_buf + 1) % NUM_HDMI_BUFFERS;
677
678 if (!hl.streaming) {
679 if (exynos_v4l2_streamon(hl.fd, buffer.type) < 0) {
680 ALOGE("%s: layer%d: streamon failed %d", __func__, hl.id, errno);
681 ret = -1;
682 goto err;
683 }
684 hl.streaming = true;
685 }
Benoit Goby105be0b2012-09-21 13:19:30 -0700686
687err:
Benoit Goby181e92b2012-10-04 16:35:57 -0700688 if (acquireFenceFd >= 0)
689 close(acquireFenceFd);
Benoit Goby93f9f5d2012-09-28 20:37:17 -0700690
Benoit Goby105be0b2012-09-21 13:19:30 -0700691 return ret;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700692}
693
Greg Hackmann81575142012-09-19 15:09:04 -0700694bool exynos5_is_offscreen(hwc_layer_1_t &layer,
695 struct exynos5_hwc_composer_device_1_t *pdev)
696{
697 return layer.sourceCrop.left > pdev->xres ||
698 layer.sourceCrop.right < 0 ||
699 layer.sourceCrop.top > pdev->yres ||
700 layer.sourceCrop.bottom < 0;
701}
702
Greg Hackmann67b2c312012-10-01 13:31:26 -0700703size_t exynos5_visible_width(hwc_layer_1_t &layer, int format,
704 struct exynos5_hwc_composer_device_1_t *pdev)
705{
706 int bpp;
707 if (exynos5_requires_gscaler(layer, format))
708 bpp = 32;
709 else
710 bpp = exynos5_format_to_bpp(format);
711 int left = max(layer.displayFrame.left, 0);
712 int right = min(layer.displayFrame.right, pdev->xres);
713
714 return (right - left) * bpp / 8;
715}
716
Greg Hackmann81575142012-09-19 15:09:04 -0700717bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i,
718 struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700719{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700720 if (layer.flags & HWC_SKIP_LAYER) {
721 ALOGV("\tlayer %u: skipping", i);
722 return false;
723 }
724
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700725 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700726
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700727 if (!handle) {
728 ALOGV("\tlayer %u: handle is NULL", i);
729 return false;
730 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700731
Greg Hackmann09c45c22012-09-20 09:35:37 -0700732 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700733 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700734 ALOGV("\tlayer %u: gscaler required but not supported", i);
735 return false;
736 }
737 } else {
738 if (!exynos5_format_is_supported(handle->format)) {
739 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
740 return false;
741 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700742 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700743 if (!exynos5_blending_is_supported(layer.blending)) {
744 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700745 return false;
746 }
Greg Hackmann81575142012-09-19 15:09:04 -0700747 if (CC_UNLIKELY(exynos5_is_offscreen(layer, pdev))) {
748 ALOGW("\tlayer %u: off-screen", i);
749 return false;
750 }
Greg Hackmann67b2c312012-10-01 13:31:26 -0700751 if (exynos5_visible_width(layer, handle->format, pdev) < BURSTLEN_BYTES) {
752 ALOGV("\tlayer %u: visible area is too narrow", i);
753 return false;
754 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700755
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700756 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700757}
758
Greg Hackmann31991d52012-07-13 13:23:11 -0700759inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
760{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700761 return !(r1.left > r2.right ||
762 r1.right < r2.left ||
763 r1.top > r2.bottom ||
764 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700765}
766
767inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
768{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700769 hwc_rect i;
770 i.top = max(r1.top, r2.top);
771 i.bottom = min(r1.bottom, r2.bottom);
772 i.left = max(r1.left, r2.left);
773 i.right = min(r1.right, r2.right);
774 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700775}
776
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700777static int exynos5_prepare_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby4f439962012-09-21 17:16:45 -0700778 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700779{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700780 ALOGV("preparing %u layers for FIMD", contents->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700781
Greg Hackmann9130e702012-07-30 14:53:04 -0700782 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700783
Benoit Goby4f439962012-09-21 17:16:45 -0700784 bool force_fb = pdev->force_gpu;
Erik Gilling87e707e2012-06-29 17:35:13 -0700785 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
786 pdev->bufs.overlay_map[i] = -1;
787
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700788 bool fb_needed = false;
789 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700790
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700791 // find unsupported overlays
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700792 for (size_t i = 0; i < contents->numHwLayers; i++) {
793 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700794
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700795 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
796 ALOGV("\tlayer %u: framebuffer target", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700797 continue;
798 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700799
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700800 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
801 ALOGV("\tlayer %u: background supported", i);
802 dump_layer(&contents->hwLayers[i]);
803 continue;
804 }
805
Greg Hackmann81575142012-09-19 15:09:04 -0700806 if (exynos5_supports_overlay(contents->hwLayers[i], i, pdev) &&
807 !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700808 ALOGV("\tlayer %u: overlay supported", i);
809 layer.compositionType = HWC_OVERLAY;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700810 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700811 continue;
812 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700813
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700814 if (!fb_needed) {
815 first_fb = i;
816 fb_needed = true;
817 }
818 last_fb = i;
819 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700820
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700821 dump_layer(&contents->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700822 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700823
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700824 // can't composite overlays sandwiched between framebuffers
825 if (fb_needed)
826 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700827 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700828
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700829 // Incrementally try to add our supported layers to hardware windows.
830 // If adding a layer would violate a hardware constraint, force it
831 // into the framebuffer and try again. (Revisiting the entire list is
832 // necessary because adding a layer to the framebuffer can cause other
833 // windows to retroactively violate constraints.)
834 bool changed;
Greg Hackmannd6743822012-10-02 17:27:25 -0700835 bool gsc_used;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700836 do {
837 android::Vector<hwc_rect> rects;
838 android::Vector<hwc_rect> overlaps;
Greg Hackmannd6743822012-10-02 17:27:25 -0700839 size_t pixels_left, windows_left;
840
841 gsc_used = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700842
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700843 if (fb_needed) {
844 hwc_rect_t fb_rect;
845 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700846 fb_rect.right = pdev->xres - 1;
847 fb_rect.bottom = pdev->yres - 1;
848 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700849 windows_left = NUM_HW_WINDOWS - 1;
850 rects.push_back(fb_rect);
851 }
852 else {
853 pixels_left = MAX_PIXELS;
854 windows_left = NUM_HW_WINDOWS;
855 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700856
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700857 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700858
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700859 for (size_t i = 0; i < contents->numHwLayers; i++) {
860 hwc_layer_1_t &layer = contents->hwLayers[i];
861 if ((layer.flags & HWC_SKIP_LAYER) ||
862 layer.compositionType == HWC_FRAMEBUFFER_TARGET)
Greg Hackmann9130e702012-07-30 14:53:04 -0700863 continue;
864
865 private_handle_t *handle = private_handle_t::dynamicCast(
866 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700867
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700868 // we've already accounted for the framebuffer above
869 if (layer.compositionType == HWC_FRAMEBUFFER)
870 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700871
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700872 // only layer 0 can be HWC_BACKGROUND, so we can
873 // unconditionally allow it without extra checks
874 if (layer.compositionType == HWC_BACKGROUND) {
875 windows_left--;
876 continue;
877 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700878
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700879 size_t pixels_needed = WIDTH(layer.displayFrame) *
880 HEIGHT(layer.displayFrame);
881 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann09c45c22012-09-20 09:35:37 -0700882 bool gsc_required = exynos5_requires_gscaler(layer, handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700883 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700884 can_compose = can_compose && !gsc_used;
Greg Hackmann31991d52012-07-13 13:23:11 -0700885
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700886 // hwc_rect_t right and bottom values are normally exclusive;
887 // the intersection logic is simpler if we make them inclusive
888 hwc_rect_t visible_rect = layer.displayFrame;
889 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700890
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700891 // no more than 2 layers can overlap on a given pixel
892 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
893 if (intersect(visible_rect, overlaps.itemAt(j)))
894 can_compose = false;
895 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700896
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700897 if (!can_compose) {
898 layer.compositionType = HWC_FRAMEBUFFER;
899 if (!fb_needed) {
900 first_fb = last_fb = i;
901 fb_needed = true;
902 }
903 else {
904 first_fb = min(i, first_fb);
905 last_fb = max(i, last_fb);
906 }
907 changed = true;
908 break;
909 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700910
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700911 for (size_t j = 0; j < rects.size(); j++) {
912 const hwc_rect_t &other_rect = rects.itemAt(j);
913 if (intersect(visible_rect, other_rect))
914 overlaps.push_back(intersection(visible_rect, other_rect));
915 }
916 rects.push_back(visible_rect);
917 pixels_left -= pixels_needed;
918 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700919 if (gsc_required)
Greg Hackmannd6743822012-10-02 17:27:25 -0700920 gsc_used = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700921 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700922
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700923 if (changed)
924 for (size_t i = first_fb; i < last_fb; i++)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700925 contents->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700926 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700927
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700928 unsigned int nextWindow = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700929
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700930 for (size_t i = 0; i < contents->numHwLayers; i++) {
931 hwc_layer_1_t &layer = contents->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700932
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700933 if (fb_needed && i == first_fb) {
934 ALOGV("assigning framebuffer to window %u\n",
935 nextWindow);
936 nextWindow++;
937 continue;
938 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700939
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700940 if (layer.compositionType != HWC_FRAMEBUFFER &&
941 layer.compositionType != HWC_FRAMEBUFFER_TARGET) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700942 ALOGV("assigning layer %u to window %u", i, nextWindow);
943 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700944 if (layer.compositionType == HWC_OVERLAY) {
945 private_handle_t *handle =
946 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann09c45c22012-09-20 09:35:37 -0700947 if (exynos5_requires_gscaler(layer, handle->format)) {
Greg Hackmannd6743822012-10-02 17:27:25 -0700948 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[FIMD_GSC_IDX]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700949 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700950 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmannd6743822012-10-02 17:27:25 -0700951 pdev->bufs.gsc_map[nextWindow].idx = FIMD_GSC_IDX;
Greg Hackmann9130e702012-07-30 14:53:04 -0700952 }
953 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700954 nextWindow++;
955 }
956 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700957
Greg Hackmannefd98532012-10-02 12:00:42 -0700958 if (!gsc_used)
959 exynos5_cleanup_gsc_m2m(pdev, FIMD_GSC_IDX);
Greg Hackmann9130e702012-07-30 14:53:04 -0700960
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700961 if (fb_needed)
962 pdev->bufs.fb_window = first_fb;
963 else
964 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700965
Greg Hackmann9130e702012-07-30 14:53:04 -0700966 return 0;
967}
968
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -0700969static int exynos5_prepare_hdmi(exynos5_hwc_composer_device_1_t *pdev,
970 hwc_display_contents_1_t* contents)
971{
Benoit Goby922abbf2012-09-19 19:24:19 -0700972 ALOGV("preparing %u layers for HDMI", contents->numHwLayers);
Benoit Gobyb5501902012-10-01 00:29:01 -0700973 hwc_layer_1_t *video_layer = NULL;
Benoit Goby922abbf2012-09-19 19:24:19 -0700974
975 for (size_t i = 0; i < contents->numHwLayers; i++) {
976 hwc_layer_1_t &layer = contents->hwLayers[i];
977
978 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
979 ALOGV("\tlayer %u: framebuffer target", i);
Benoit Goby922abbf2012-09-19 19:24:19 -0700980 continue;
981 }
982
983 if (layer.compositionType == HWC_BACKGROUND) {
984 ALOGV("\tlayer %u: background layer", i);
985 dump_layer(&layer);
986 continue;
987 }
988
Benoit Gobyb5501902012-10-01 00:29:01 -0700989 if (layer.handle) {
990 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
991 if (h->flags & GRALLOC_USAGE_PROTECTED) {
992 if (!video_layer) {
993 video_layer = &layer;
994 layer.compositionType = HWC_OVERLAY;
995 ALOGV("\tlayer %u: video layer", i);
996 dump_layer(&layer);
997 continue;
998 }
999 }
1000 }
1001
Benoit Goby922abbf2012-09-19 19:24:19 -07001002 layer.compositionType = HWC_FRAMEBUFFER;
1003 dump_layer(&layer);
1004 }
1005
1006 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001007}
1008
1009static int exynos5_prepare(hwc_composer_device_1_t *dev,
1010 size_t numDisplays, hwc_display_contents_1_t** displays)
1011{
1012 if (!numDisplays || !displays)
1013 return 0;
1014
1015 exynos5_hwc_composer_device_1_t *pdev =
1016 (exynos5_hwc_composer_device_1_t *)dev;
1017 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1018 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
1019
1020 if (pdev->hdmi_hpd) {
1021 hdmi_enable(pdev);
1022 } else {
1023 hdmi_disable(pdev);
1024 }
1025
1026 if (fimd_contents) {
Benoit Goby4f439962012-09-21 17:16:45 -07001027 int err = exynos5_prepare_fimd(pdev, fimd_contents);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001028 if (err)
1029 return err;
1030 }
1031
1032 if (hdmi_contents) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001033 int err = exynos5_prepare_hdmi(pdev, hdmi_contents);
1034 if (err)
1035 return err;
1036 }
1037
1038 return 0;
1039}
1040
Greg Hackmann9130e702012-07-30 14:53:04 -07001041static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
1042 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001043 int gsc_idx, int dst_format)
Greg Hackmann9130e702012-07-30 14:53:04 -07001044{
Benoit Gobyb5501902012-10-01 00:29:01 -07001045 ALOGV("configuring gscaler %u for memory-to-memory", AVAILABLE_GSC_UNITS[gsc_idx]);
Greg Hackmann9130e702012-07-30 14:53:04 -07001046
1047 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
1048 buffer_handle_t dst_buf;
1049 private_handle_t *dst_handle;
1050 int ret = 0;
1051
1052 exynos_gsc_img src_cfg, dst_cfg;
1053 memset(&src_cfg, 0, sizeof(src_cfg));
1054 memset(&dst_cfg, 0, sizeof(dst_cfg));
1055
1056 src_cfg.x = layer.sourceCrop.left;
1057 src_cfg.y = layer.sourceCrop.top;
1058 src_cfg.w = WIDTH(layer.sourceCrop);
1059 src_cfg.fw = src_handle->stride;
1060 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -07001061 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001062 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -07001063 if (exynos5_format_is_ycrcb(src_handle->format)) {
1064 src_cfg.uaddr = src_handle->fd2;
1065 src_cfg.vaddr = src_handle->fd1;
1066 } else {
1067 src_cfg.uaddr = src_handle->fd1;
1068 src_cfg.vaddr = src_handle->fd2;
1069 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001070 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001071 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Benoit Goby181e92b2012-10-04 16:35:57 -07001072 src_cfg.acquireFenceFd = layer.acquireFenceFd;
1073 layer.acquireFenceFd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001074
1075 dst_cfg.x = 0;
1076 dst_cfg.y = 0;
1077 dst_cfg.w = WIDTH(layer.displayFrame);
1078 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmann9130e702012-07-30 14:53:04 -07001079 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -07001080 dst_cfg.drmMode = src_cfg.drmMode;
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001081 dst_cfg.format = dst_format;
Benoit Goby181e92b2012-10-04 16:35:57 -07001082 dst_cfg.acquireFenceFd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001083
1084 ALOGV("source configuration:");
1085 dump_gsc_img(src_cfg);
1086
Greg Hackmann4eaff152012-10-03 16:28:19 -07001087 bool reconfigure = gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1088 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg);
1089 if (reconfigure) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001090 int dst_stride;
1091 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1092 GRALLOC_USAGE_SW_WRITE_NEVER |
1093 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001094
1095 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1096 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001097
Sanghee Kim7b4c1322012-10-04 18:44:36 -07001098 int w = ALIGN(WIDTH(layer.displayFrame), GSC_DST_W_ALIGNMENT_RGB888);
1099 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_DST_H_ALIGNMENT_RGB888);
Greg Hackmann9130e702012-07-30 14:53:04 -07001100
1101 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1102 if (gsc_data->dst_buf[i]) {
1103 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1104 gsc_data->dst_buf[i] = NULL;
1105 }
1106
1107 int ret = alloc_device->alloc(alloc_device, w, h,
1108 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1109 &dst_stride);
1110 if (ret < 0) {
1111 ALOGE("failed to allocate destination buffer: %s",
1112 strerror(-ret));
1113 goto err_alloc;
1114 }
1115 }
1116
1117 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001118 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001119
Greg Hackmann9130e702012-07-30 14:53:04 -07001120 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1121 dst_handle = private_handle_t::dynamicCast(dst_buf);
1122
1123 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001124 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001125 dst_cfg.yaddr = dst_handle->fd;
1126
1127 ALOGV("destination configuration:");
1128 dump_gsc_img(dst_cfg);
1129
Greg Hackmannefd98532012-10-02 12:00:42 -07001130 if (gsc_data->gsc) {
1131 ALOGV("reusing open gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1132 } else {
1133 ALOGV("opening gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1134 gsc_data->gsc = exynos_gsc_create_exclusive(
1135 AVAILABLE_GSC_UNITS[gsc_idx], GSC_M2M_MODE, GSC_DUMMY);
1136 if (!gsc_data->gsc) {
1137 ALOGE("failed to create gscaler handle");
1138 ret = -1;
1139 goto err_alloc;
1140 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001141 }
1142
Greg Hackmann4eaff152012-10-03 16:28:19 -07001143 if (reconfigure) {
1144 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1145 if (ret < 0) {
1146 ALOGE("failed to configure gscaler %u", gsc_idx);
1147 goto err_gsc_config;
1148 }
Greg Hackmann9130e702012-07-30 14:53:04 -07001149 }
1150
1151 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1152 if (ret < 0) {
1153 ALOGE("failed to run gscaler %u", gsc_idx);
1154 goto err_gsc_config;
1155 }
1156
1157 gsc_data->src_cfg = src_cfg;
1158 gsc_data->dst_cfg = dst_cfg;
1159
Benoit Goby181e92b2012-10-04 16:35:57 -07001160 layer.releaseFenceFd = src_cfg.releaseFenceFd;
1161
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001162 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001163
1164err_gsc_config:
1165 exynos_gsc_destroy(gsc_data->gsc);
1166 gsc_data->gsc = NULL;
1167err_alloc:
Benoit Goby181e92b2012-10-04 16:35:57 -07001168 if (src_cfg.acquireFenceFd >= 0)
1169 close(src_cfg.acquireFenceFd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001170 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1171 if (gsc_data->dst_buf[i]) {
1172 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1173 gsc_data->dst_buf[i] = NULL;
1174 }
1175 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001176 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1177 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001178 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001179}
1180
Greg Hackmannefd98532012-10-02 12:00:42 -07001181
1182static void exynos5_cleanup_gsc_m2m(exynos5_hwc_composer_device_1_t *pdev,
1183 size_t gsc_idx)
1184{
1185 exynos5_gsc_data_t &gsc_data = pdev->gsc[gsc_idx];
1186 if (!gsc_data.gsc)
1187 return;
1188
1189 ALOGV("closing gscaler %u", AVAILABLE_GSC_UNITS[gsc_idx]);
1190
Greg Hackmann4eaff152012-10-03 16:28:19 -07001191 exynos_gsc_stop_exclusive(gsc_data.gsc);
Greg Hackmannefd98532012-10-02 12:00:42 -07001192 exynos_gsc_destroy(gsc_data.gsc);
1193 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++)
1194 if (gsc_data.dst_buf[i])
1195 pdev->alloc_device->free(pdev->alloc_device, gsc_data.dst_buf[i]);
1196
1197 memset(&gsc_data, 0, sizeof(gsc_data));
1198}
1199
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001200static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001201 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001202 int32_t blending, int fence_fd, s3c_fb_win_config &cfg,
Greg Hackmann81575142012-09-19 15:09:04 -07001203 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001204{
Greg Hackmann81575142012-09-19 15:09:04 -07001205 uint32_t x, y;
1206 uint32_t w = WIDTH(displayFrame);
1207 uint32_t h = HEIGHT(displayFrame);
1208 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1209 uint32_t offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1210
1211 if (displayFrame.left < 0) {
1212 unsigned int crop = -displayFrame.left;
1213 ALOGV("layer off left side of screen; cropping %u pixels from left edge",
1214 crop);
1215 x = 0;
1216 w -= crop;
1217 offset += crop * bpp / 8;
1218 } else {
1219 x = displayFrame.left;
1220 }
1221
1222 if (displayFrame.right > pdev->xres) {
1223 unsigned int crop = displayFrame.right - pdev->xres;
1224 ALOGV("layer off right side of screen; cropping %u pixels from right edge",
1225 crop);
1226 w -= crop;
1227 }
1228
1229 if (displayFrame.top < 0) {
1230 unsigned int crop = -displayFrame.top;
1231 ALOGV("layer off top side of screen; cropping %u pixels from top edge",
1232 crop);
1233 y = 0;
1234 h -= crop;
1235 offset += handle->stride * crop * bpp / 8;
1236 } else {
1237 y = displayFrame.top;
1238 }
1239
1240 if (displayFrame.bottom > pdev->yres) {
1241 int crop = displayFrame.bottom - pdev->yres;
1242 ALOGV("layer off bottom side of screen; cropping %u pixels from bottom edge",
1243 crop);
1244 h -= crop;
1245 }
1246
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001247 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1248 cfg.fd = handle->fd;
Greg Hackmann81575142012-09-19 15:09:04 -07001249 cfg.x = x;
1250 cfg.y = y;
1251 cfg.w = w;
1252 cfg.h = h;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001253 cfg.format = exynos5_format_to_s3c_format(handle->format);
Greg Hackmann81575142012-09-19 15:09:04 -07001254 cfg.offset = offset;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001255 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001256 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001257 cfg.fence_fd = fence_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001258}
1259
Erik Gilling87e707e2012-06-29 17:35:13 -07001260static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001261 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001262{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001263 if (layer->compositionType == HWC_BACKGROUND) {
1264 hwc_color_t color = layer->backgroundColor;
1265 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1266 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1267 cfg.x = 0;
1268 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001269 cfg.w = pdev->xres;
1270 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001271 return;
1272 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001273
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001274 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001275 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001276 layer->blending, layer->acquireFenceFd, cfg, pdev);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001277}
1278
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001279static int exynos5_post_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001280 hwc_display_contents_1_t* contents)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001281{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001282 exynos5_hwc_post_data_t *pdata = &pdev->bufs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001283 struct s3c_fb_win_config_data win_data;
1284 struct s3c_fb_win_config *config = win_data.config;
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001285
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001286 memset(config, 0, sizeof(win_data.config));
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001287 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1288 config[i].fence_fd = -1;
Greg Hackmann9130e702012-07-30 14:53:04 -07001289
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001290 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001291 int layer_idx = pdata->overlay_map[i];
1292 if (layer_idx != -1) {
1293 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001294 private_handle_t *handle =
1295 private_handle_t::dynamicCast(layer.handle);
1296
1297 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1298 int gsc_idx = pdata->gsc_map[i].idx;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001299 exynos5_gsc_data_t &gsc = pdev->gsc[gsc_idx];
Greg Hackmann9130e702012-07-30 14:53:04 -07001300
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001301 // RGBX8888 surfaces are already in the right color order from the GPU,
1302 // RGB565 and YUV surfaces need the Gscaler to swap R & B
1303 int dst_format = HAL_PIXEL_FORMAT_BGRA_8888;
1304 if (exynos5_format_is_rgb(handle->format) &&
1305 handle->format != HAL_PIXEL_FORMAT_RGB_565)
1306 dst_format = HAL_PIXEL_FORMAT_RGBX_8888;
1307
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001308 int err = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc,
Benoit Gobyd60d7b72012-10-01 21:52:29 -07001309 gsc_idx, dst_format);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001310 if (err < 0) {
Greg Hackmann4eaff152012-10-03 16:28:19 -07001311 ALOGE("failed to configure gscaler %u for layer %u",
Greg Hackmann9130e702012-07-30 14:53:04 -07001312 gsc_idx, i);
1313 continue;
1314 }
1315
Greg Hackmann9130e702012-07-30 14:53:04 -07001316 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1317 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1318 private_handle_t *dst_handle =
1319 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001320 hwc_rect_t sourceCrop = { 0, 0,
1321 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
Benoit Goby181e92b2012-10-04 16:35:57 -07001322 int fence = gsc.dst_cfg.releaseFenceFd;
Greg Hackmann90219f32012-08-16 17:28:57 -07001323 exynos5_config_handle(dst_handle, sourceCrop,
Benoit Goby181e92b2012-10-04 16:35:57 -07001324 layer.displayFrame, layer.blending, fence, config[i],
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001325 pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001326 } else {
1327 exynos5_config_overlay(&layer, config[i], pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001328 }
1329 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001330 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1331 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1332 config[i].blending = S3C_FB_BLENDING_NONE;
1333 }
1334
Greg Hackmann9130e702012-07-30 14:53:04 -07001335 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001336 dump_config(config[i]);
1337 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001338
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001339 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
Greg Hackmannbb3bd9e2012-09-18 13:10:33 -07001340 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
1341 if (config[i].fence_fd != -1)
1342 close(config[i].fence_fd);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001343 if (ret < 0) {
1344 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %s", strerror(errno));
1345 return ret;
1346 }
1347
1348 memcpy(pdev->last_config, &win_data.config, sizeof(win_data.config));
1349 memcpy(pdev->last_gsc_map, pdata->gsc_map, sizeof(pdata->gsc_map));
1350 pdev->last_fb_window = pdata->fb_window;
1351 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1352 int layer_idx = pdata->overlay_map[i];
1353 if (layer_idx != -1) {
1354 hwc_layer_1_t &layer = contents->hwLayers[layer_idx];
1355 pdev->last_handles[i] = layer.handle;
1356 }
1357 }
1358
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001359 return win_data.fence;
1360}
1361
Greg Hackmannec13dea2012-10-08 14:54:45 -07001362static int exynos5_clear_fimd(exynos5_hwc_composer_device_1_t *pdev)
1363{
1364 struct s3c_fb_win_config_data win_data;
1365 memset(&win_data, 0, sizeof(win_data));
1366
1367 int ret = ioctl(pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1368 LOG_ALWAYS_FATAL_IF(ret < 0,
1369 "ioctl S3CFB_WIN_CONFIG failed to clear screen: %s",
1370 strerror(errno));
1371 // the causes of an empty config failing are all unrecoverable
1372
1373 return win_data.fence;
1374}
1375
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001376static int exynos5_set_fimd(exynos5_hwc_composer_device_1_t *pdev,
Benoit Goby922abbf2012-09-19 19:24:19 -07001377 hwc_display_contents_1_t* contents)
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001378{
1379 if (!contents->dpy || !contents->sur)
1380 return 0;
1381
1382 hwc_layer_1_t *fb_layer = NULL;
Greg Hackmannec13dea2012-10-08 14:54:45 -07001383 int err = 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001384
1385 if (pdev->bufs.fb_window != NO_FB_NEEDED) {
1386 for (size_t i = 0; i < contents->numHwLayers; i++) {
1387 if (contents->hwLayers[i].compositionType ==
1388 HWC_FRAMEBUFFER_TARGET) {
1389 pdev->bufs.overlay_map[pdev->bufs.fb_window] = i;
1390 fb_layer = &contents->hwLayers[i];
1391 break;
Greg Hackmann600867e2012-08-23 12:58:02 -07001392 }
1393 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001394
1395 if (CC_UNLIKELY(!fb_layer)) {
1396 ALOGE("framebuffer target expected, but not provided");
Greg Hackmannec13dea2012-10-08 14:54:45 -07001397 err = -EINVAL;
1398 } else {
1399 ALOGV("framebuffer target buffer:");
1400 dump_layer(fb_layer);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001401 }
Greg Hackmann600867e2012-08-23 12:58:02 -07001402 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001403
Greg Hackmannec13dea2012-10-08 14:54:45 -07001404 int fence;
1405 if (!err) {
1406 fence = exynos5_post_fimd(pdev, contents);
1407 if (fence < 0)
1408 err = fence;
1409 }
1410
1411 if (err)
1412 fence = exynos5_clear_fimd(pdev);
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001413
1414 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
Benoit Goby181e92b2012-10-04 16:35:57 -07001415 if (pdev->bufs.overlay_map[i] != -1 &&
1416 pdev->bufs.gsc_map[i].mode != exynos5_gsc_map_t::GSC_M2M) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001417 hwc_layer_1_t &layer =
1418 contents->hwLayers[pdev->bufs.overlay_map[i]];
1419 int dup_fd = dup(fence);
1420 if (dup_fd < 0)
1421 ALOGW("release fence dup failed: %s", strerror(errno));
1422 layer.releaseFenceFd = dup_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001423 }
1424 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001425 close(fence);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001426
Greg Hackmannec13dea2012-10-08 14:54:45 -07001427 return err;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001428}
1429
1430static int exynos5_set_hdmi(exynos5_hwc_composer_device_1_t *pdev,
1431 hwc_display_contents_1_t* contents)
1432{
Benoit Gobyb5501902012-10-01 00:29:01 -07001433 hwc_layer_1_t *fb_layer = NULL;
1434 hwc_layer_1_t *video_layer = NULL;
1435
Benoit Goby105be0b2012-09-21 13:19:30 -07001436 if (!pdev->hdmi_enabled) {
1437 for (size_t i = 0; i < contents->numHwLayers; i++) {
1438 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby181e92b2012-10-04 16:35:57 -07001439 if (layer.acquireFenceFd != -1) {
Benoit Goby105be0b2012-09-21 13:19:30 -07001440 close(layer.acquireFenceFd);
Benoit Goby181e92b2012-10-04 16:35:57 -07001441 layer.acquireFenceFd = -1;
1442 }
Benoit Goby922abbf2012-09-19 19:24:19 -07001443 }
Benoit Goby48a69542012-09-21 17:12:28 -07001444 return 0;
Benoit Goby105be0b2012-09-21 13:19:30 -07001445 }
Benoit Goby48a69542012-09-21 17:12:28 -07001446
1447 for (size_t i = 0; i < contents->numHwLayers; i++) {
1448 hwc_layer_1_t &layer = contents->hwLayers[i];
Benoit Goby922abbf2012-09-19 19:24:19 -07001449
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001450 if (layer.flags & HWC_SKIP_LAYER) {
1451 ALOGV("HDMI skipping layer %d", i);
1452 continue;
1453 }
1454
Benoit Gobyb5501902012-10-01 00:29:01 -07001455 if (layer.compositionType == HWC_OVERLAY) {
1456 if (!layer.handle)
1457 continue;
1458
1459 ALOGV("HDMI video layer:");
1460 dump_layer(&layer);
1461
Greg Hackmannd6743822012-10-02 17:27:25 -07001462 exynos5_gsc_data_t &gsc = pdev->gsc[HDMI_GSC_IDX];
Benoit Goby181e92b2012-10-04 16:35:57 -07001463 int ret = exynos5_config_gsc_m2m(layer, pdev->alloc_device, &gsc, 1,
1464 HAL_PIXEL_FORMAT_RGBX_8888);
1465 if (ret < 0) {
1466 ALOGE("failed to configure gscaler for video layer");
1467 continue;
1468 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001469
Benoit Gobyb5501902012-10-01 00:29:01 -07001470 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1471 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1472 private_handle_t *h = private_handle_t::dynamicCast(dst_buf);
1473
Benoit Goby181e92b2012-10-04 16:35:57 -07001474 int acquireFenceFd = gsc.dst_cfg.releaseFenceFd;
1475
1476 hdmi_output(pdev, pdev->hdmi_layers[0], layer, h, acquireFenceFd, NULL);
Benoit Gobyb5501902012-10-01 00:29:01 -07001477 video_layer = &layer;
1478 }
1479
Benoit Goby922abbf2012-09-19 19:24:19 -07001480 if (layer.compositionType == HWC_FRAMEBUFFER_TARGET) {
1481 if (!layer.handle)
1482 continue;
1483
1484 ALOGV("HDMI FB layer:");
1485 dump_layer(&layer);
1486
Benoit Gobyb5501902012-10-01 00:29:01 -07001487 private_handle_t *h = private_handle_t::dynamicCast(layer.handle);
Benoit Goby181e92b2012-10-04 16:35:57 -07001488 hdmi_output(pdev, pdev->hdmi_layers[1], layer, h, layer.acquireFenceFd,
1489 &layer.releaseFenceFd);
Benoit Gobyb5501902012-10-01 00:29:01 -07001490 fb_layer = &layer;
Benoit Goby922abbf2012-09-19 19:24:19 -07001491 }
1492 }
1493
Greg Hackmannefd98532012-10-02 12:00:42 -07001494 if (!video_layer) {
Benoit Gobyb5501902012-10-01 00:29:01 -07001495 hdmi_disable_layer(pdev, pdev->hdmi_layers[0]);
Greg Hackmannefd98532012-10-02 12:00:42 -07001496 exynos5_cleanup_gsc_m2m(pdev, HDMI_GSC_IDX);
1497 }
Benoit Gobyb5501902012-10-01 00:29:01 -07001498 if (!fb_layer)
1499 hdmi_disable_layer(pdev, pdev->hdmi_layers[1]);
1500
Benoit Goby922abbf2012-09-19 19:24:19 -07001501 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001502}
1503
Jesse Halle94046d2012-07-31 14:34:08 -07001504static int exynos5_set(struct hwc_composer_device_1 *dev,
1505 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001506{
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001507 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001508 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001509
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001510 exynos5_hwc_composer_device_1_t *pdev =
1511 (exynos5_hwc_composer_device_1_t *)dev;
1512 hwc_display_contents_1_t *fimd_contents = displays[HWC_DISPLAY_PRIMARY];
1513 hwc_display_contents_1_t *hdmi_contents = displays[HWC_DISPLAY_EXTERNAL];
Greg Hackmannec13dea2012-10-08 14:54:45 -07001514 int fimd_err = 0, hdmi_err = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001515
Greg Hackmannec13dea2012-10-08 14:54:45 -07001516 if (fimd_contents)
1517 fimd_err = exynos5_set_fimd(pdev, fimd_contents);
Erik Gilling87e707e2012-06-29 17:35:13 -07001518
Greg Hackmannec13dea2012-10-08 14:54:45 -07001519 if (hdmi_contents)
1520 hdmi_err = exynos5_set_hdmi(pdev, hdmi_contents);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001521
Greg Hackmannec13dea2012-10-08 14:54:45 -07001522 if (fimd_err)
1523 return fimd_err;
1524
1525 return hdmi_err;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001526}
1527
Erik Gilling87e707e2012-06-29 17:35:13 -07001528static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001529 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001530{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001531 struct exynos5_hwc_composer_device_1_t* pdev =
1532 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001533 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001534}
1535
Erik Gilling87e707e2012-06-29 17:35:13 -07001536static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001537{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001538 struct exynos5_hwc_composer_device_1_t *pdev =
1539 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001540
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001541 switch (what) {
1542 case HWC_BACKGROUND_LAYER_SUPPORTED:
1543 // we support the background layer
1544 value[0] = 1;
1545 break;
1546 case HWC_VSYNC_PERIOD:
1547 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001548 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001549 break;
1550 default:
1551 // unsupported query
1552 return -EINVAL;
1553 }
1554 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001555}
1556
Jesse Halle94046d2012-07-31 14:34:08 -07001557static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1558 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001559{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001560 struct exynos5_hwc_composer_device_1_t *pdev =
1561 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001562
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001563 switch (event) {
1564 case HWC_EVENT_VSYNC:
1565 __u32 val = !!enabled;
1566 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1567 if (err < 0) {
1568 ALOGE("vsync ioctl failed");
1569 return -errno;
1570 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001571
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001572 return 0;
1573 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001574
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001575 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001576}
1577
Benoit Gobycdd61b32012-07-09 12:09:59 -07001578static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001579 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001580{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001581 const char *s = buff;
1582 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001583
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001584 while (*s) {
1585 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1586 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001587
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001588 s += strlen(s) + 1;
1589 if (s - buff >= len)
1590 break;
1591 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001592
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001593 if (pdev->hdmi_hpd) {
1594 if (hdmi_get_config(pdev)) {
1595 ALOGE("Error reading HDMI configuration");
1596 pdev->hdmi_hpd = false;
1597 return;
1598 }
1599 }
1600
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001601 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001602 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001603 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001604
Jesse Hallda5a71d2012-08-21 12:12:55 -07001605 /* hwc_dev->procs is set right after the device is opened, but there is
1606 * still a race condition where a hotplug event might occur after the open
1607 * but before the procs are registered. */
1608 if (pdev->procs)
Benoit Gobya93919c2012-09-20 22:36:09 -07001609 pdev->procs->hotplug(pdev->procs, HWC_DISPLAY_EXTERNAL, pdev->hdmi_hpd);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001610}
1611
Greg Hackmann29724852012-07-23 15:31:10 -07001612static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001613{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001614 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001615 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001616
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001617 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1618 if (err < 0) {
1619 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1620 return;
1621 }
1622
Greg Hackmann29724852012-07-23 15:31:10 -07001623 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001624 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001625 if (err < 0) {
1626 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1627 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001628 }
Greg Hackmann29724852012-07-23 15:31:10 -07001629 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001630
Greg Hackmann29724852012-07-23 15:31:10 -07001631 errno = 0;
1632 uint64_t timestamp = strtoull(buf, NULL, 0);
1633 if (!errno)
1634 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001635}
1636
1637static void *hwc_vsync_thread(void *data)
1638{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001639 struct exynos5_hwc_composer_device_1_t *pdev =
1640 (struct exynos5_hwc_composer_device_1_t *)data;
1641 char uevent_desc[4096];
1642 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001643
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001644 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001645
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001646 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001647
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001648 char temp[4096];
1649 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1650 if (err < 0) {
1651 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1652 return NULL;
1653 }
1654
Greg Hackmann29724852012-07-23 15:31:10 -07001655 struct pollfd fds[2];
1656 fds[0].fd = pdev->vsync_fd;
1657 fds[0].events = POLLPRI;
1658 fds[1].fd = uevent_get_fd();
1659 fds[1].events = POLLIN;
1660
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001661 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001662 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001663
Greg Hackmann29724852012-07-23 15:31:10 -07001664 if (err > 0) {
1665 if (fds[0].revents & POLLPRI) {
1666 handle_vsync_event(pdev);
1667 }
1668 else if (fds[1].revents & POLLIN) {
1669 int len = uevent_next_event(uevent_desc,
1670 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001671
Greg Hackmann29724852012-07-23 15:31:10 -07001672 bool hdmi = !strcmp(uevent_desc,
1673 "change@/devices/virtual/switch/hdmi");
1674 if (hdmi)
1675 handle_hdmi_uevent(pdev, uevent_desc, len);
1676 }
1677 }
1678 else if (err == -1) {
1679 if (errno == EINTR)
1680 break;
1681 ALOGE("error in vsync thread: %s", strerror(errno));
1682 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001683 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001684
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001685 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001686}
1687
Jesse Halle94046d2012-07-31 14:34:08 -07001688static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001689{
1690 struct exynos5_hwc_composer_device_1_t *pdev =
1691 (struct exynos5_hwc_composer_device_1_t *)dev;
1692
1693 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1694 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1695 if (err < 0) {
Greg Hackmann70231562012-09-28 10:28:51 -07001696 if (errno == EBUSY)
1697 ALOGI("%sblank ioctl failed (display already %sblanked)",
1698 blank ? "" : "un", blank ? "" : "un");
1699 else
1700 ALOGE("%sblank ioctl failed: %s", blank ? "" : "un",
1701 strerror(errno));
Colin Cross00359a82012-07-12 17:54:17 -07001702 return -errno;
1703 }
1704
Benoit Gobyad4e3582012-08-30 17:17:34 -07001705 if (pdev->hdmi_hpd) {
1706 if (blank && !pdev->hdmi_blanked)
1707 hdmi_disable(pdev);
1708 pdev->hdmi_blanked = !!blank;
1709 }
1710
Colin Cross00359a82012-07-12 17:54:17 -07001711 return 0;
1712}
1713
Greg Hackmann600867e2012-08-23 12:58:02 -07001714static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1715{
1716 if (buff_len <= 0)
1717 return;
1718
1719 struct exynos5_hwc_composer_device_1_t *pdev =
1720 (struct exynos5_hwc_composer_device_1_t *)dev;
1721
1722 android::String8 result;
1723
Benoit Goby8bad7e32012-08-16 14:17:14 -07001724 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1725 if (pdev->hdmi_enabled)
1726 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001727 result.append(
1728 " type | handle | color | blend | format | position | size | gsc \n"
1729 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1730 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1731
1732 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1733 struct s3c_fb_win_config &config = pdev->last_config[i];
1734 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1735 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1736 "DISABLED", "-", "-", "-", "-", "-", "-");
1737 }
1738 else {
1739 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1740 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1741 "-", config.color, "-", "-");
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001742 else
1743 result.appendFormat(" %8s | %8x | %8s | %5x | %6x",
1744 pdev->last_fb_window == i ? "FB" : "OVERLAY",
1745 intptr_t(pdev->last_handles[i]),
1746 "-", config.blending, config.format);
Greg Hackmann600867e2012-08-23 12:58:02 -07001747
1748 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1749 config.w, config.h);
1750 }
1751 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1752 result.appendFormat(" | %3s", "-");
1753 else
1754 result.appendFormat(" | %3d",
1755 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1756 result.append("\n");
1757 }
1758
1759 strlcpy(buff, result.string(), buff_len);
1760}
1761
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001762static int exynos5_getDisplayConfigs(struct hwc_composer_device_1 *dev,
1763 int disp, uint32_t *configs, size_t *numConfigs)
1764{
1765 struct exynos5_hwc_composer_device_1_t *pdev =
1766 (struct exynos5_hwc_composer_device_1_t *)dev;
1767
1768 if (*numConfigs == 0)
1769 return 0;
1770
1771 if (disp == HWC_DISPLAY_PRIMARY) {
1772 configs[0] = 0;
1773 *numConfigs = 1;
1774 return 0;
1775 } else if (disp == HWC_DISPLAY_EXTERNAL) {
Benoit Goby922abbf2012-09-19 19:24:19 -07001776 if (!pdev->hdmi_hpd) {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001777 return -EINVAL;
1778 }
1779
1780 int err = hdmi_get_config(pdev);
1781 if (err) {
1782 return -EINVAL;
1783 }
1784
1785 configs[0] = 0;
1786 *numConfigs = 1;
1787 return 0;
1788 }
1789
1790 return -EINVAL;
1791}
1792
1793static int32_t exynos5_fimd_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1794 const uint32_t attribute)
1795{
1796 switch(attribute) {
1797 case HWC_DISPLAY_VSYNC_PERIOD:
1798 return pdev->vsync_period;
1799
1800 case HWC_DISPLAY_WIDTH:
1801 return pdev->xres;
1802
1803 case HWC_DISPLAY_HEIGHT:
1804 return pdev->yres;
1805
1806 case HWC_DISPLAY_DPI_X:
1807 return pdev->xdpi;
1808
1809 case HWC_DISPLAY_DPI_Y:
1810 return pdev->ydpi;
1811
1812 default:
1813 ALOGE("unknown display attribute %u", attribute);
1814 return -EINVAL;
1815 }
1816}
1817
1818static int32_t exynos5_hdmi_attribute(struct exynos5_hwc_composer_device_1_t *pdev,
1819 const uint32_t attribute)
1820{
1821 switch(attribute) {
1822 case HWC_DISPLAY_VSYNC_PERIOD:
1823 return pdev->vsync_period;
1824
1825 case HWC_DISPLAY_WIDTH:
1826 return pdev->hdmi_w;
1827
1828 case HWC_DISPLAY_HEIGHT:
1829 return pdev->hdmi_h;
1830
1831 case HWC_DISPLAY_DPI_X:
1832 case HWC_DISPLAY_DPI_Y:
1833 return 0; // unknown
1834
1835 default:
1836 ALOGE("unknown display attribute %u", attribute);
1837 return -EINVAL;
1838 }
1839}
1840
Jesse Hall54aa0d22012-09-20 11:43:49 -07001841static int exynos5_getDisplayAttributes(struct hwc_composer_device_1 *dev,
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001842 int disp, uint32_t config, const uint32_t *attributes, int32_t *values)
1843{
1844 struct exynos5_hwc_composer_device_1_t *pdev =
1845 (struct exynos5_hwc_composer_device_1_t *)dev;
1846
1847 for (int i = 0; attributes[i] != HWC_DISPLAY_NO_ATTRIBUTE; i++) {
1848 if (disp == HWC_DISPLAY_PRIMARY)
1849 values[i] = exynos5_fimd_attribute(pdev, attributes[i]);
1850 else if (disp == HWC_DISPLAY_EXTERNAL)
1851 values[i] = exynos5_hdmi_attribute(pdev, attributes[i]);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001852 else {
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001853 ALOGE("unknown display type %u", disp);
Jesse Hall54aa0d22012-09-20 11:43:49 -07001854 return -EINVAL;
1855 }
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001856 }
Jesse Hall54aa0d22012-09-20 11:43:49 -07001857
1858 return 0;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001859}
1860
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001861static int exynos5_close(hw_device_t* device);
1862
1863static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001864 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001865{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001866 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001867 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001868 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001869
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001870 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1871 return -EINVAL;
1872 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001873
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001874 struct exynos5_hwc_composer_device_1_t *dev;
1875 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1876 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001877
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001878 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1879 (const struct hw_module_t **)&dev->gralloc_module)) {
1880 ALOGE("failed to get gralloc hw module");
1881 ret = -EINVAL;
1882 goto err_get_module;
1883 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001884
Greg Hackmann9130e702012-07-30 14:53:04 -07001885 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1886 &dev->alloc_device)) {
1887 ALOGE("failed to open gralloc");
1888 ret = -EINVAL;
1889 goto err_get_module;
1890 }
1891
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001892 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1893 if (dev->fd < 0) {
1894 ALOGE("failed to open framebuffer");
1895 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001896 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001897 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001898
Greg Hackmannd92fe212012-09-11 14:28:41 -07001899 struct fb_var_screeninfo info;
1900 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1901 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1902 ret = -errno;
1903 goto err_ioctl;
1904 }
1905
1906 refreshRate = 1000000000000LLU /
1907 (
1908 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1909 * ( info.left_margin + info.right_margin + info.xres )
1910 * info.pixclock
1911 );
1912
1913 if (refreshRate == 0) {
1914 ALOGW("invalid refresh rate, assuming 60 Hz");
1915 refreshRate = 60;
1916 }
1917
Greg Hackmann0c1ba822012-09-13 13:38:12 -07001918 dev->xres = 2560;
1919 dev->yres = 1600;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001920 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1921 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1922 dev->vsync_period = 1000000000 / refreshRate;
1923
1924 ALOGV("using\n"
1925 "xres = %d px\n"
1926 "yres = %d px\n"
1927 "width = %d mm (%f dpi)\n"
1928 "height = %d mm (%f dpi)\n"
1929 "refresh rate = %d Hz\n",
1930 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1931 info.height, dev->ydpi / 1000.0, refreshRate);
1932
Benoit Goby8bad7e32012-08-16 14:17:14 -07001933 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001934 if (dev->hdmi_mixer0 < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001935 ALOGE("failed to open hdmi mixer0 subdev");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001936 ret = dev->hdmi_mixer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001937 goto err_ioctl;
1938 }
1939
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001940 dev->hdmi_layers[0].id = 0;
1941 dev->hdmi_layers[0].fd = open("/dev/video16", O_RDWR);
1942 if (dev->hdmi_layers[0].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001943 ALOGE("failed to open hdmi layer0 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001944 ret = dev->hdmi_layers[0].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001945 goto err_mixer0;
1946 }
1947
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001948 dev->hdmi_layers[1].id = 1;
1949 dev->hdmi_layers[1].fd = open("/dev/video17", O_RDWR);
1950 if (dev->hdmi_layers[1].fd < 0) {
Benoit Goby8bad7e32012-08-16 14:17:14 -07001951 ALOGE("failed to open hdmi layer1 device");
Benoit Goby93f9f5d2012-09-28 20:37:17 -07001952 ret = dev->hdmi_layers[1].fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001953 goto err_hdmi0;
1954 }
1955
Greg Hackmann29724852012-07-23 15:31:10 -07001956 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1957 if (dev->vsync_fd < 0) {
1958 ALOGE("failed to open vsync attribute");
1959 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001960 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001961 }
1962
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001963 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1964 if (sw_fd) {
1965 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001966 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001967 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001968 if (hdmi_get_config(dev)) {
1969 ALOGE("Error reading HDMI configuration");
1970 dev->hdmi_hpd = false;
1971 }
1972 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001973 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001974
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001975 dev->base.common.tag = HARDWARE_DEVICE_TAG;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001976 dev->base.common.version = HWC_DEVICE_API_VERSION_1_1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001977 dev->base.common.module = const_cast<hw_module_t *>(module);
1978 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001979
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001980 dev->base.prepare = exynos5_prepare;
1981 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001982 dev->base.eventControl = exynos5_eventControl;
1983 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001984 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001985 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001986 dev->base.dump = exynos5_dump;
Greg Hackmannb0b3bdd2012-09-11 15:57:50 -07001987 dev->base.getDisplayConfigs = exynos5_getDisplayConfigs;
1988 dev->base.getDisplayAttributes = exynos5_getDisplayAttributes;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001989
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001990 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001991
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001992 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1993 if (ret) {
1994 ALOGE("failed to start vsync thread: %s", strerror(ret));
1995 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001996 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001997 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001998
Greg Hackmann6e0f76d2012-09-17 17:47:09 -07001999 char value[PROPERTY_VALUE_MAX];
2000 property_get("debug.hwc.force_gpu", value, "0");
2001 dev->force_gpu = atoi(value);
2002
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002003 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002004
Greg Hackmann29724852012-07-23 15:31:10 -07002005err_vsync:
2006 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002007err_mixer0:
2008 close(dev->hdmi_mixer0);
2009err_hdmi1:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002010 close(dev->hdmi_layers[0].fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002011err_hdmi0:
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002012 close(dev->hdmi_layers[1].fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002013err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002014 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07002015err_open_fb:
2016 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002017err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002018 free(dev);
2019 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002020}
2021
2022static int exynos5_close(hw_device_t *device)
2023{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002024 struct exynos5_hwc_composer_device_1_t *dev =
2025 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07002026 pthread_kill(dev->vsync_thread, SIGTERM);
2027 pthread_join(dev->vsync_thread, NULL);
Greg Hackmannefd98532012-10-02 12:00:42 -07002028 for (size_t i = 0; i < NUM_GSC_UNITS; i++)
2029 exynos5_cleanup_gsc_m2m(dev, i);
Greg Hackmann9130e702012-07-30 14:53:04 -07002030 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07002031 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07002032 close(dev->hdmi_mixer0);
Benoit Goby93f9f5d2012-09-28 20:37:17 -07002033 close(dev->hdmi_layers[0].fd);
2034 close(dev->hdmi_layers[1].fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002035 close(dev->fd);
2036 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002037}
2038
2039static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002040 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002041};
2042
2043hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07002044 common: {
2045 tag: HARDWARE_MODULE_TAG,
2046 module_api_version: HWC_MODULE_API_VERSION_0_1,
2047 hal_api_version: HARDWARE_HAL_API_VERSION,
2048 id: HWC_HARDWARE_MODULE_ID,
2049 name: "Samsung exynos5 hwcomposer module",
2050 author: "Google",
2051 methods: &exynos5_hwc_module_methods,
2052 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07002053};