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Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070039#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070040#include <utils/Vector.h>
41
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070042#include <sync/sync.h>
43
Greg Hackmann86eb1c62012-05-30 09:25:51 -070044#include "ion.h"
45#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070046#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070047#include "exynos_format.h"
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -070048#include "videodev2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070049
Greg Hackmannf6f2e542012-07-16 16:10:27 -070050struct hwc_callback_entry {
51 void (*callback)(void *, private_handle_t *);
52 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070053};
54typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
55
Greg Hackmann31991d52012-07-13 13:23:11 -070056const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070057const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmann31991d52012-07-13 13:23:11 -070058const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070059const size_t GSC_W_ALIGNMENT = 16;
60const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070061const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
62const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
63 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070064
Erik Gilling87e707e2012-06-29 17:35:13 -070065struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070066
Greg Hackmann9130e702012-07-30 14:53:04 -070067struct exynos5_gsc_map_t {
68 enum {
69 GSC_NONE = 0,
70 GSC_M2M,
71 // TODO: GSC_LOCAL_PATH
72 } mode;
73 int idx;
74};
75
Greg Hackmann86eb1c62012-05-30 09:25:51 -070076struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070077 exynos5_hwc_composer_device_1_t *pdev;
78 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070079 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070080 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
81 int num_overlays;
82 size_t fb_window;
83 int fence;
84 pthread_mutex_t completion_lock;
85 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070086};
87
Greg Hackmann9130e702012-07-30 14:53:04 -070088const size_t NUM_GSC_DST_BUFS = 2;
89struct exynos5_gsc_data_t {
90 void *gsc;
91 exynos_gsc_img src_cfg;
92 exynos_gsc_img dst_cfg;
93 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
94 size_t current_buf;
95};
96
Erik Gilling87e707e2012-06-29 17:35:13 -070097struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070098 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070099
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700100 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700101 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700102 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700103
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700104 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700105 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700106 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700107 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700108
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700109 int hdmi_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700110 bool hdmi_hpd;
111 bool hdmi_mirroring;
112 void *hdmi_gsc;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700113 exynos_gsc_img hdmi_cfg;
Greg Hackmann9130e702012-07-30 14:53:04 -0700114
115 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700116
117 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
118 const void *last_handles[NUM_HW_WINDOWS];
119 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700120};
121
Greg Hackmann9130e702012-07-30 14:53:04 -0700122static void dump_handle(private_handle_t *h)
123{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700124 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
125 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700126}
127
Erik Gilling87e707e2012-06-29 17:35:13 -0700128static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700129{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700130 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
131 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
132 l->compositionType, l->flags, l->handle, l->transform,
133 l->blending,
134 l->sourceCrop.left,
135 l->sourceCrop.top,
136 l->sourceCrop.right,
137 l->sourceCrop.bottom,
138 l->displayFrame.left,
139 l->displayFrame.top,
140 l->displayFrame.right,
141 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700142
Greg Hackmann9130e702012-07-30 14:53:04 -0700143 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
144 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700145}
146
147static void dump_config(s3c_fb_win_config &c)
148{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700149 ALOGV("\tstate = %u", c.state);
150 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
151 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
152 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700153 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700154 c.fd, c.offset, c.stride,
155 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700156 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700157 }
158 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
159 ALOGV("\t\tcolor = %u", c.color);
160 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700161}
162
Greg Hackmann9130e702012-07-30 14:53:04 -0700163static void dump_gsc_img(exynos_gsc_img &c)
164{
165 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
166 c.x, c.y, c.w, c.h, c.fw, c.fh);
167 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
168 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
169}
170
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700171inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
172inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700173template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
174template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
175
176static bool is_transformed(const hwc_layer_1_t &layer)
177{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700178 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700179}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700180
Greg Hackmann9130e702012-07-30 14:53:04 -0700181static bool is_rotated(const hwc_layer_1_t &layer)
182{
183 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
184 (layer.transform & HAL_TRANSFORM_ROT_180);
185}
186
Erik Gilling87e707e2012-06-29 17:35:13 -0700187static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700188{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700189 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
190 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700191}
192
193static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
194{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700195 switch (format) {
196 case HAL_PIXEL_FORMAT_RGBA_8888:
197 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
198 case HAL_PIXEL_FORMAT_RGBX_8888:
199 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
200 case HAL_PIXEL_FORMAT_RGBA_5551:
201 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700202
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700203 default:
204 return S3C_FB_PIXEL_FORMAT_MAX;
205 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700206}
207
208static bool exynos5_format_is_supported(int format)
209{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700210 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700211}
212
213static bool exynos5_format_is_supported_by_gscaler(int format)
214{
Greg Hackmann9130e702012-07-30 14:53:04 -0700215 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700216 case HAL_PIXEL_FORMAT_RGBX_8888:
217 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700218 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700219 case HAL_PIXEL_FORMAT_YCbCr_420_P:
220 case HAL_PIXEL_FORMAT_YCbCr_422_SP:
221 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_SP:
222 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
223 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP:
224 case HAL_PIXEL_FORMAT_YCbCr_422_I:
225 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_422_I:
226 case HAL_PIXEL_FORMAT_YCbCr_422_P:
227 case HAL_PIXEL_FORMAT_CbYCrY_422_I:
228 case HAL_PIXEL_FORMAT_CUSTOM_CbYCrY_422_I:
229 case HAL_PIXEL_FORMAT_YCrCb_422_SP:
230 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_SP:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700231 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700232 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_420_SP:
233 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
234 case HAL_PIXEL_FORMAT_CUSTOM_YCbCr_420_SP_TILED:
235 case HAL_PIXEL_FORMAT_CUSTOM_YCrCb_422_I:
236 case HAL_PIXEL_FORMAT_CUSTOM_CrYCbY_422_I:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700237 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700238
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700239 default:
240 return false;
241 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700242}
243
Greg Hackmann296668e2012-08-14 15:51:40 -0700244static bool exynos5_format_is_ycrcb(int format)
245{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700246 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700247}
248
Greg Hackmann9130e702012-07-30 14:53:04 -0700249static bool exynos5_format_requires_gscaler(int format)
250{
251 return exynos5_format_is_supported_by_gscaler(format) &&
252 format != HAL_PIXEL_FORMAT_RGBX_8888;
253}
254
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700255static uint8_t exynos5_format_to_bpp(int format)
256{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700257 switch (format) {
258 case HAL_PIXEL_FORMAT_RGBA_8888:
259 case HAL_PIXEL_FORMAT_RGBX_8888:
260 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700261
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700262 case HAL_PIXEL_FORMAT_RGBA_5551:
263 case HAL_PIXEL_FORMAT_RGBA_4444:
264 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700265
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700266 default:
267 ALOGW("unrecognized pixel format %u", format);
268 return 0;
269 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700270}
271
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700272static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
273 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700274{
275 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
276
277 int max_w = is_rotated(layer) ? 2048 : 4800;
278 int max_h = is_rotated(layer) ? 2048 : 3344;
279
280 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
281 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
282 // HAL_TRANSFORM_ROT_180
283
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700284 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
285 int dest_w, dest_h;
286 if (rot90or270) {
287 dest_w = HEIGHT(layer.displayFrame);
288 dest_h = WIDTH(layer.displayFrame);
289 } else {
290 dest_w = WIDTH(layer.displayFrame);
291 dest_h = HEIGHT(layer.displayFrame);
292 }
293 int max_downscale = local_path ? 4 : 16;
294 const int max_upscale = 8;
295
Greg Hackmann9130e702012-07-30 14:53:04 -0700296 return exynos5_format_is_supported_by_gscaler(format) &&
297 handle->stride <= max_w &&
298 handle->stride % GSC_W_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700299 src_w <= dest_w * max_downscale &&
300 dest_w <= src_w * max_upscale &&
Greg Hackmanneba34a92012-08-14 16:10:05 -0700301 handle->vstride <= max_h &&
302 handle->vstride % GSC_H_ALIGNMENT == 0 &&
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700303 src_h <= dest_h * max_downscale &&
304 dest_h <= src_h * max_upscale &&
Greg Hackmann9130e702012-07-30 14:53:04 -0700305 // per 46.2
306 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
307 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
308 // per 46.3.1.6
309}
310
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700311int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
312{
313 struct v4l2_dv_preset preset;
314 struct v4l2_dv_enum_preset enum_preset;
315 exynos_gsc_img *info = &dev->hdmi_cfg;
316 int index = 0;
317 bool found = false;
318 int ret;
319
320 if (ioctl(dev->hdmi_fd, VIDIOC_G_DV_PRESET, &preset) < 0) {
321 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
322 return -1;
323 }
324
325 while (true) {
326 enum_preset.index = index++;
327 ret = ioctl(dev->hdmi_fd, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
328
329 if (ret < 0) {
330 if (errno == EINVAL)
331 break;
332 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
333 return -1;
334 }
335
336 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
337 __func__, enum_preset.index, enum_preset.preset,
338 enum_preset.width, enum_preset.height, enum_preset.name);
339
340 if (preset.preset == enum_preset.preset) {
341 info->w = enum_preset.width;
342 info->h = enum_preset.height;
343 info->fw = enum_preset.width;
344 info->fh = enum_preset.height;
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700345 info->format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700346 found = true;
347 }
348 }
349
350 return found ? 0 : -1;
351}
352
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700353static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
354{
355 switch (blending) {
356 case HWC_BLENDING_NONE:
357 return S3C_FB_BLENDING_NONE;
358 case HWC_BLENDING_PREMULT:
359 return S3C_FB_BLENDING_PREMULT;
360 case HWC_BLENDING_COVERAGE:
361 return S3C_FB_BLENDING_COVERAGE;
362
363 default:
364 return S3C_FB_BLENDING_MAX;
365 }
366}
367
368static bool exynos5_blending_is_supported(int32_t blending)
369{
370 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
371}
372
Benoit Gobycdd61b32012-07-09 12:09:59 -0700373static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
374{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700375 if (dev->hdmi_mirroring)
376 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700377
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700378 exynos_gsc_img src_info;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700379 int src_w = 2560;
380 int src_h = 1600;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700381
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700382 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
383 if (!dev->hdmi_gsc) {
384 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
385 return -ENODEV;
386 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700387
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700388 memset(&src_info, 0, sizeof(src_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700389
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700390 src_info.w = src_w;
391 src_info.h = src_h;
392 src_info.fw = src_w;
393 src_info.fh = src_h;
394 src_info.format = HAL_PIXEL_FORMAT_BGRA_8888;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700395
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700396 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_info, &dev->hdmi_cfg);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700397 if (ret < 0) {
398 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
399 exynos_gsc_destroy(dev->hdmi_gsc);
400 dev->hdmi_gsc = NULL;
401 return ret;
402 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700403
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700404 dev->hdmi_mirroring = true;
405 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700406}
407
408static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
409{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700410 if (!dev->hdmi_mirroring)
411 return;
412 exynos_gsc_destroy(dev->hdmi_gsc);
413 dev->hdmi_gsc = NULL;
414 dev->hdmi_mirroring = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700415}
416
417static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *fb)
418{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700419 exynos_gsc_img src_info;
420 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700421
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700422 memset(&src_info, 0, sizeof(src_info));
423 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700424
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700425 src_info.yaddr = fb->fd;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700426
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700427 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
428 if (ret < 0) {
429 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
430 return ret;
431 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700432
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700433 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700434}
435
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700436bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
437{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700438 if (layer.flags & HWC_SKIP_LAYER) {
439 ALOGV("\tlayer %u: skipping", i);
440 return false;
441 }
442
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700443 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700444
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700445 if (!handle) {
446 ALOGV("\tlayer %u: handle is NULL", i);
447 return false;
448 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700449 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700450 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700451 ALOGV("\tlayer %u: gscaler required but not supported", i);
452 return false;
453 }
454 } else {
455 if (!exynos5_format_is_supported(handle->format)) {
456 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
457 return false;
458 }
459 if (is_scaled(layer)) {
460 ALOGV("\tlayer %u: scaling not supported", i);
461 return false;
462 }
463 if (is_transformed(layer)) {
464 ALOGV("\tlayer %u: transformations not supported", i);
465 return false;
466 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700467 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700468 if (!exynos5_blending_is_supported(layer.blending)) {
469 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700470 return false;
471 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700472
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700473 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700474}
475
Greg Hackmann31991d52012-07-13 13:23:11 -0700476inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
477{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700478 return !(r1.left > r2.right ||
479 r1.right < r2.left ||
480 r1.top > r2.bottom ||
481 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700482}
483
484inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
485{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700486 hwc_rect i;
487 i.top = max(r1.top, r2.top);
488 i.bottom = min(r1.bottom, r2.bottom);
489 i.left = max(r1.left, r2.left);
490 i.right = min(r1.right, r2.right);
491 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700492}
493
Jesse Halle94046d2012-07-31 14:34:08 -0700494static int exynos5_prepare(hwc_composer_device_1_t *dev,
495 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700496{
Jesse Halle94046d2012-07-31 14:34:08 -0700497 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700498 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700499
Jesse Halle94046d2012-07-31 14:34:08 -0700500 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700501
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700502 exynos5_hwc_composer_device_1_t *pdev =
503 (exynos5_hwc_composer_device_1_t *)dev;
504 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700505 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700506
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700507 bool force_fb = false;
508 if (pdev->hdmi_hpd) {
509 hdmi_enable(pdev);
510 force_fb = true;
511 } else {
512 hdmi_disable(pdev);
513 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700514
Erik Gilling87e707e2012-06-29 17:35:13 -0700515 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
516 pdev->bufs.overlay_map[i] = -1;
517
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700518 bool fb_needed = false;
519 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700520
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700521 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700522 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
523 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700524
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700525 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
526 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700527 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700528 continue;
529 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700530
Jesse Halle94046d2012-07-31 14:34:08 -0700531 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700532 ALOGV("\tlayer %u: overlay supported", i);
533 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700534 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700535 continue;
536 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700537
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700538 if (!fb_needed) {
539 first_fb = i;
540 fb_needed = true;
541 }
542 last_fb = i;
543 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700544
Jesse Halle94046d2012-07-31 14:34:08 -0700545 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700546 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700547
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700548 // can't composite overlays sandwiched between framebuffers
549 if (fb_needed)
550 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700551 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700552
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700553 // Incrementally try to add our supported layers to hardware windows.
554 // If adding a layer would violate a hardware constraint, force it
555 // into the framebuffer and try again. (Revisiting the entire list is
556 // necessary because adding a layer to the framebuffer can cause other
557 // windows to retroactively violate constraints.)
558 bool changed;
559 do {
560 android::Vector<hwc_rect> rects;
561 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700562 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700563
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700564 if (fb_needed) {
565 hwc_rect_t fb_rect;
566 fb_rect.top = fb_rect.left = 0;
567 fb_rect.right = pdev->gralloc_module->xres - 1;
568 fb_rect.bottom = pdev->gralloc_module->yres - 1;
569 pixels_left = MAX_PIXELS - pdev->gralloc_module->xres *
570 pdev->gralloc_module->yres;
571 windows_left = NUM_HW_WINDOWS - 1;
572 rects.push_back(fb_rect);
573 }
574 else {
575 pixels_left = MAX_PIXELS;
576 windows_left = NUM_HW_WINDOWS;
577 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700578 if (pdev->hdmi_mirroring)
579 gsc_left--;
580
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700581 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700582
Jesse Halle94046d2012-07-31 14:34:08 -0700583 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
584 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700585 if (layer.flags & HWC_SKIP_LAYER)
586 continue;
587
588 private_handle_t *handle = private_handle_t::dynamicCast(
589 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700590
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700591 // we've already accounted for the framebuffer above
592 if (layer.compositionType == HWC_FRAMEBUFFER)
593 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700594
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700595 // only layer 0 can be HWC_BACKGROUND, so we can
596 // unconditionally allow it without extra checks
597 if (layer.compositionType == HWC_BACKGROUND) {
598 windows_left--;
599 continue;
600 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700601
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700602 size_t pixels_needed = WIDTH(layer.displayFrame) *
603 HEIGHT(layer.displayFrame);
604 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9130e702012-07-30 14:53:04 -0700605 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
606 if (gsc_required)
607 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700608
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700609 // hwc_rect_t right and bottom values are normally exclusive;
610 // the intersection logic is simpler if we make them inclusive
611 hwc_rect_t visible_rect = layer.displayFrame;
612 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700613
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700614 // no more than 2 layers can overlap on a given pixel
615 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
616 if (intersect(visible_rect, overlaps.itemAt(j)))
617 can_compose = false;
618 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700619
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700620 if (!can_compose) {
621 layer.compositionType = HWC_FRAMEBUFFER;
622 if (!fb_needed) {
623 first_fb = last_fb = i;
624 fb_needed = true;
625 }
626 else {
627 first_fb = min(i, first_fb);
628 last_fb = max(i, last_fb);
629 }
630 changed = true;
631 break;
632 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700633
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700634 for (size_t j = 0; j < rects.size(); j++) {
635 const hwc_rect_t &other_rect = rects.itemAt(j);
636 if (intersect(visible_rect, other_rect))
637 overlaps.push_back(intersection(visible_rect, other_rect));
638 }
639 rects.push_back(visible_rect);
640 pixels_left -= pixels_needed;
641 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700642 if (gsc_required)
643 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700644 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700645
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700646 if (changed)
647 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700648 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700649 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700650
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700651 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700652 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700653
Jesse Halle94046d2012-07-31 14:34:08 -0700654 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
655 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700656
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700657 if (fb_needed && i == first_fb) {
658 ALOGV("assigning framebuffer to window %u\n",
659 nextWindow);
660 nextWindow++;
661 continue;
662 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700663
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700664 if (layer.compositionType != HWC_FRAMEBUFFER) {
665 ALOGV("assigning layer %u to window %u", i, nextWindow);
666 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700667 if (layer.compositionType == HWC_OVERLAY) {
668 private_handle_t *handle =
669 private_handle_t::dynamicCast(layer.handle);
670 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700671 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann9130e702012-07-30 14:53:04 -0700672 pdev->bufs.gsc_map[i].mode =
673 exynos5_gsc_map_t::GSC_M2M;
674 pdev->bufs.gsc_map[i].idx = nextGsc++;
675 }
676 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700677 nextWindow++;
678 }
679 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700680
Greg Hackmann9130e702012-07-30 14:53:04 -0700681 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
682 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
683 if (pdev->gsc[i].dst_buf[j])
684 pdev->alloc_device->free(pdev->alloc_device,
685 pdev->gsc[i].dst_buf[j]);
686 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
687 }
688
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700689 if (fb_needed)
690 pdev->bufs.fb_window = first_fb;
691 else
692 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700693
Greg Hackmann9130e702012-07-30 14:53:04 -0700694 return 0;
695}
696
697static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
698{
699 return c1.x != c2.x ||
700 c1.y != c2.y ||
701 c1.w != c2.w ||
702 c1.h != c2.h ||
703 c1.format != c2.format ||
704 c1.rot != c2.rot ||
705 c1.cacheable != c2.cacheable ||
706 c1.drmMode != c2.drmMode;
707}
708
709static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
710{
711 return gsc_dst_cfg_changed(c1, c2) ||
712 c1.fw != c2.fw ||
713 c1.fh != c2.fh;
714}
715
716static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
717 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
718 int gsc_idx)
719{
720 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
721
722 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
723 buffer_handle_t dst_buf;
724 private_handle_t *dst_handle;
725 int ret = 0;
726
727 exynos_gsc_img src_cfg, dst_cfg;
728 memset(&src_cfg, 0, sizeof(src_cfg));
729 memset(&dst_cfg, 0, sizeof(dst_cfg));
730
731 src_cfg.x = layer.sourceCrop.left;
732 src_cfg.y = layer.sourceCrop.top;
733 src_cfg.w = WIDTH(layer.sourceCrop);
734 src_cfg.fw = src_handle->stride;
735 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700736 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700737 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700738 if (exynos5_format_is_ycrcb(src_handle->format)) {
739 src_cfg.uaddr = src_handle->fd2;
740 src_cfg.vaddr = src_handle->fd1;
741 } else {
742 src_cfg.uaddr = src_handle->fd1;
743 src_cfg.vaddr = src_handle->fd2;
744 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700745 src_cfg.format = src_handle->format;
746
747 dst_cfg.x = 0;
748 dst_cfg.y = 0;
749 dst_cfg.w = WIDTH(layer.displayFrame);
750 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700751 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700752 dst_cfg.rot = layer.transform;
753
754 ALOGV("source configuration:");
755 dump_gsc_img(src_cfg);
756
757 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
758 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
759 int dst_stride;
760 int usage = GRALLOC_USAGE_SW_READ_NEVER |
761 GRALLOC_USAGE_SW_WRITE_NEVER |
762 GRALLOC_USAGE_HW_COMPOSER;
763 // TODO: add GRALLOC_USAGE_PROTECTED if source buffer is also protected
764
765 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
766 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
767
768 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
769 if (gsc_data->dst_buf[i]) {
770 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
771 gsc_data->dst_buf[i] = NULL;
772 }
773
774 int ret = alloc_device->alloc(alloc_device, w, h,
775 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
776 &dst_stride);
777 if (ret < 0) {
778 ALOGE("failed to allocate destination buffer: %s",
779 strerror(-ret));
780 goto err_alloc;
781 }
782 }
783
784 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700785 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700786
Greg Hackmann9130e702012-07-30 14:53:04 -0700787 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
788 dst_handle = private_handle_t::dynamicCast(dst_buf);
789
790 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -0700791 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700792 dst_cfg.yaddr = dst_handle->fd;
793
794 ALOGV("destination configuration:");
795 dump_gsc_img(dst_cfg);
796
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700797 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
798 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -0700799 if (!gsc_data->gsc) {
800 ALOGE("failed to create gscaler handle");
801 ret = -1;
802 goto err_alloc;
803 }
804
805 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
806 if (ret < 0) {
807 ALOGE("failed to configure gscaler %u", gsc_idx);
808 goto err_gsc_config;
809 }
810
811 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
812 if (ret < 0) {
813 ALOGE("failed to run gscaler %u", gsc_idx);
814 goto err_gsc_config;
815 }
816
817 gsc_data->src_cfg = src_cfg;
818 gsc_data->dst_cfg = dst_cfg;
819
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700820 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700821
822err_gsc_config:
823 exynos_gsc_destroy(gsc_data->gsc);
824 gsc_data->gsc = NULL;
825err_alloc:
826 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
827 if (gsc_data->dst_buf[i]) {
828 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
829 gsc_data->dst_buf[i] = NULL;
830 }
831 }
832 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700833}
834
835static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700836 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700837 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700838{
839 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
840 cfg.fd = handle->fd;
841 cfg.x = displayFrame.left;
842 cfg.y = displayFrame.top;
843 cfg.w = WIDTH(displayFrame);
844 cfg.h = HEIGHT(displayFrame);
845 cfg.format = exynos5_format_to_s3c_format(handle->format);
846 uint8_t bpp = exynos5_format_to_bpp(handle->format);
847 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
848 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700849 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700850}
851
Erik Gilling87e707e2012-06-29 17:35:13 -0700852static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700853 const private_module_t *gralloc_module)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700854{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700855 if (layer->compositionType == HWC_BACKGROUND) {
856 hwc_color_t color = layer->backgroundColor;
857 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
858 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
859 cfg.x = 0;
860 cfg.y = 0;
861 cfg.w = gralloc_module->xres;
862 cfg.h = gralloc_module->yres;
863 return;
864 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700865
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700866 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700867 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
868 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700869}
870
871static void exynos5_post_callback(void *data, private_handle_t *fb)
872{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700873 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700874
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700875 struct s3c_fb_win_config_data win_data;
876 struct s3c_fb_win_config *config = win_data.config;
877 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -0700878
879 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
880 if ( pdata->overlay_map[i] != -1) {
881 hwc_layer_1_t &layer = pdata->overlays[i];
882 private_handle_t *handle =
883 private_handle_t::dynamicCast(layer.handle);
884
885 if (layer.acquireFenceFd != -1) {
886 int err = sync_wait(layer.acquireFenceFd, 100);
887 if (err != 0)
888 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
889 i, strerror(errno));
890 close(layer.acquireFenceFd);
891 }
892
893 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
894 int gsc_idx = pdata->gsc_map[i].idx;
895 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
896 &pdata->pdev->gsc[gsc_idx], gsc_idx);
897 }
898 }
899 }
900
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700901 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
902 if (i == pdata->fb_window) {
903 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700904 int32_t blending = (i == 0) ? HWC_BLENDING_NONE :
905 HWC_BLENDING_PREMULT;
906 exynos5_config_handle(fb, rect, rect, blending, config[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700907 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700908 hwc_layer_1_t &layer = pdata->overlays[i];
909 private_handle_t *handle =
910 private_handle_t::dynamicCast(layer.handle);
911
912 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
913 int gsc_idx = pdata->gsc_map[i].idx;
914 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
915
916 if (!gsc.gsc) {
917 ALOGE("failed to queue gscaler %u input for layer %u",
918 gsc_idx, i);
919 continue;
920 }
921
922 int err = exynos_gsc_stop_exclusive(gsc.gsc);
923 exynos_gsc_destroy(gsc.gsc);
924 gsc.gsc = NULL;
925 if (err < 0) {
926 ALOGE("failed to dequeue gscaler output for layer %u", i);
927 continue;
928 }
929
930 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
931 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
932 private_handle_t *dst_handle =
933 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -0700934 hwc_rect_t sourceCrop = { 0, 0,
935 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
936 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700937 layer.displayFrame, layer.blending, config[i]);
Greg Hackmann9130e702012-07-30 14:53:04 -0700938 }
939 else {
940 exynos5_config_overlay(&layer, config[i],
941 pdata->pdev->gralloc_module);
Erik Gilling87e707e2012-06-29 17:35:13 -0700942 }
943 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700944 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
945 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
946 config[i].blending = S3C_FB_BLENDING_NONE;
947 }
948
Greg Hackmann9130e702012-07-30 14:53:04 -0700949 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700950 dump_config(config[i]);
951 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700952
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700953 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
954 if (ret < 0)
955 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann600867e2012-08-23 12:58:02 -0700956 else {
957 memcpy(pdata->pdev->last_config, &win_data.config,
958 sizeof(win_data.config));
959 memcpy(pdata->pdev->last_gsc_map, pdata->gsc_map,
960 sizeof(pdata->gsc_map));
961 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
962 if (i == pdata->fb_window) {
963 pdata->pdev->last_handles[i] = NULL;
964 } else if (pdata->overlay_map[i] != -1) {
965 hwc_layer_1_t &layer = pdata->overlays[i];
966 pdata->pdev->last_handles[i] = layer.handle;
967 }
968 }
969 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700970
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700971 if (pdata->pdev->hdmi_mirroring)
972 hdmi_output(pdata->pdev, fb);
Benoit Gobycdd61b32012-07-09 12:09:59 -0700973
Erik Gilling87e707e2012-06-29 17:35:13 -0700974 pthread_mutex_lock(&pdata->completion_lock);
975 pdata->fence = win_data.fence;
976 pthread_cond_signal(&pdata->completion);
977 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700978}
979
Jesse Halle94046d2012-07-31 14:34:08 -0700980static int exynos5_set(struct hwc_composer_device_1 *dev,
981 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700982{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700983 exynos5_hwc_composer_device_1_t *pdev =
984 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700985
Jesse Halle94046d2012-07-31 14:34:08 -0700986 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700987 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700988
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700989 hwc_callback_queue_t *queue = NULL;
990 pthread_mutex_t *lock = NULL;
991 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700992
Greg Hackmann0fbe1702012-08-22 11:27:38 -0700993 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
994 if (pdev->bufs.overlay_map[i] != -1) {
995 pdev->bufs.overlays[i] =
996 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -0700997 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -0700998 }
Erik Gilling87e707e2012-06-29 17:35:13 -0700999
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001000 data = (exynos5_hwc_post_data_t *)
1001 malloc(sizeof(exynos5_hwc_post_data_t));
1002 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001003
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001004 data->fence = -1;
1005 pthread_mutex_init(&data->completion_lock, NULL);
1006 pthread_cond_init(&data->completion, NULL);
Erik Gilling87e707e2012-06-29 17:35:13 -07001007
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001008 if (displays[0]->numHwLayers && pdev->bufs.fb_window == NO_FB_NEEDED) {
1009 exynos5_post_callback(data, NULL);
1010 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001011
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001012 struct hwc_callback_entry entry;
1013 entry.callback = exynos5_post_callback;
1014 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001015
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001016 queue = reinterpret_cast<hwc_callback_queue_t *>(
1017 pdev->gralloc_module->queue);
1018 lock = const_cast<pthread_mutex_t *>(
1019 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001020
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001021 pthread_mutex_lock(lock);
1022 queue->push_front(entry);
1023 pthread_mutex_unlock(lock);
Erik Gilling87e707e2012-06-29 17:35:13 -07001024
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001025 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
1026 (EGLSurface)displays[0]->sur);
1027 if (!success) {
1028 ALOGE("HWC_EGL_ERROR");
1029 if (displays[0]) {
1030 pthread_mutex_lock(lock);
1031 queue->removeAt(0);
1032 pthread_mutex_unlock(lock);
1033 free(data);
Erik Gilling87e707e2012-06-29 17:35:13 -07001034 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001035 return HWC_EGL_ERROR;
Erik Gilling87e707e2012-06-29 17:35:13 -07001036 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001037 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001038
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001039
Erik Gilling87e707e2012-06-29 17:35:13 -07001040 pthread_mutex_lock(&data->completion_lock);
1041 while (data->fence == -1)
1042 pthread_cond_wait(&data->completion, &data->completion_lock);
1043 pthread_mutex_unlock(&data->completion_lock);
1044
1045 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1046 if (pdev->bufs.overlay_map[i] != -1) {
1047 int dup_fd = dup(data->fence);
1048 if (dup_fd < 0)
1049 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001050 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001051 }
1052 }
1053 close(data->fence);
1054 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001055 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001056}
1057
Erik Gilling87e707e2012-06-29 17:35:13 -07001058static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001059 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001060{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001061 struct exynos5_hwc_composer_device_1_t* pdev =
1062 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001063 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001064}
1065
Erik Gilling87e707e2012-06-29 17:35:13 -07001066static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001067{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001068 struct exynos5_hwc_composer_device_1_t *pdev =
1069 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001070
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001071 switch (what) {
1072 case HWC_BACKGROUND_LAYER_SUPPORTED:
1073 // we support the background layer
1074 value[0] = 1;
1075 break;
1076 case HWC_VSYNC_PERIOD:
1077 // vsync period in nanosecond
1078 value[0] = 1000000000.0 / pdev->gralloc_module->fps;
1079 break;
1080 default:
1081 // unsupported query
1082 return -EINVAL;
1083 }
1084 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001085}
1086
Jesse Halle94046d2012-07-31 14:34:08 -07001087static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1088 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001089{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001090 struct exynos5_hwc_composer_device_1_t *pdev =
1091 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001092
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001093 switch (event) {
1094 case HWC_EVENT_VSYNC:
1095 __u32 val = !!enabled;
1096 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1097 if (err < 0) {
1098 ALOGE("vsync ioctl failed");
1099 return -errno;
1100 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001101
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001102 return 0;
1103 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001104
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001105 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001106}
1107
Benoit Gobycdd61b32012-07-09 12:09:59 -07001108static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001109 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001110{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001111 const char *s = buff;
1112 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001113
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001114 while (*s) {
1115 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1116 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001117
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001118 s += strlen(s) + 1;
1119 if (s - buff >= len)
1120 break;
1121 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001122
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001123 if (pdev->hdmi_hpd) {
1124 if (hdmi_get_config(pdev)) {
1125 ALOGE("Error reading HDMI configuration");
1126 pdev->hdmi_hpd = false;
1127 return;
1128 }
1129 }
1130
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001131 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001132 if (pdev->hdmi_hpd)
1133 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_cfg.h, pdev->hdmi_cfg.w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001134
Jesse Hallda5a71d2012-08-21 12:12:55 -07001135 /* hwc_dev->procs is set right after the device is opened, but there is
1136 * still a race condition where a hotplug event might occur after the open
1137 * but before the procs are registered. */
1138 if (pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001139 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001140}
1141
Greg Hackmann29724852012-07-23 15:31:10 -07001142static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001143{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001144 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001145 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001146
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001147 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1148 if (err < 0) {
1149 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1150 return;
1151 }
1152
Greg Hackmann29724852012-07-23 15:31:10 -07001153 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001154 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001155 if (err < 0) {
1156 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1157 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001158 }
Greg Hackmann29724852012-07-23 15:31:10 -07001159 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001160
Greg Hackmann29724852012-07-23 15:31:10 -07001161 errno = 0;
1162 uint64_t timestamp = strtoull(buf, NULL, 0);
1163 if (!errno)
1164 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001165}
1166
1167static void *hwc_vsync_thread(void *data)
1168{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001169 struct exynos5_hwc_composer_device_1_t *pdev =
1170 (struct exynos5_hwc_composer_device_1_t *)data;
1171 char uevent_desc[4096];
1172 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001173
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001174 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001175
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001176 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001177
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001178 char temp[4096];
1179 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1180 if (err < 0) {
1181 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1182 return NULL;
1183 }
1184
Greg Hackmann29724852012-07-23 15:31:10 -07001185 struct pollfd fds[2];
1186 fds[0].fd = pdev->vsync_fd;
1187 fds[0].events = POLLPRI;
1188 fds[1].fd = uevent_get_fd();
1189 fds[1].events = POLLIN;
1190
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001191 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001192 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001193
Greg Hackmann29724852012-07-23 15:31:10 -07001194 if (err > 0) {
1195 if (fds[0].revents & POLLPRI) {
1196 handle_vsync_event(pdev);
1197 }
1198 else if (fds[1].revents & POLLIN) {
1199 int len = uevent_next_event(uevent_desc,
1200 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001201
Greg Hackmann29724852012-07-23 15:31:10 -07001202 bool hdmi = !strcmp(uevent_desc,
1203 "change@/devices/virtual/switch/hdmi");
1204 if (hdmi)
1205 handle_hdmi_uevent(pdev, uevent_desc, len);
1206 }
1207 }
1208 else if (err == -1) {
1209 if (errno == EINTR)
1210 break;
1211 ALOGE("error in vsync thread: %s", strerror(errno));
1212 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001213 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001214
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001215 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001216}
1217
Jesse Halle94046d2012-07-31 14:34:08 -07001218static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001219{
1220 struct exynos5_hwc_composer_device_1_t *pdev =
1221 (struct exynos5_hwc_composer_device_1_t *)dev;
1222
1223 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1224 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1225 if (err < 0) {
1226 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1227 return -errno;
1228 }
1229
1230 return 0;
1231}
1232
Greg Hackmann600867e2012-08-23 12:58:02 -07001233static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1234{
1235 if (buff_len <= 0)
1236 return;
1237
1238 struct exynos5_hwc_composer_device_1_t *pdev =
1239 (struct exynos5_hwc_composer_device_1_t *)dev;
1240
1241 android::String8 result;
1242
1243 result.appendFormat(" hdmi_mirroring=%u\n", pdev->hdmi_mirroring);
1244 if (pdev->hdmi_mirroring)
1245 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_cfg.w,
1246 pdev->hdmi_cfg.h);
1247 result.append(
1248 " type | handle | color | blend | format | position | size | gsc \n"
1249 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1250 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1251
1252 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1253 struct s3c_fb_win_config &config = pdev->last_config[i];
1254 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1255 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1256 "DISABLED", "-", "-", "-", "-", "-", "-");
1257 }
1258 else {
1259 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1260 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1261 "-", config.color, "-", "-");
1262 else {
1263 if (pdev->last_handles[i])
1264 result.appendFormat(" %8s | %8x", "OVERLAY", intptr_t(pdev->last_handles[i]));
1265 else
1266 result.appendFormat(" %8s | %8s", "FB", "-");
1267
1268 result.appendFormat(" | %8s | %5x | %6x", "-", config.blending,
1269 config.format);
1270 }
1271
1272 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1273 config.w, config.h);
1274 }
1275 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1276 result.appendFormat(" | %3s", "-");
1277 else
1278 result.appendFormat(" | %3d",
1279 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1280 result.append("\n");
1281 }
1282
1283 strlcpy(buff, result.string(), buff_len);
1284}
1285
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001286static int exynos5_close(hw_device_t* device);
1287
1288static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001289 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001290{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001291 int ret;
1292 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001293
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001294 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1295 return -EINVAL;
1296 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001297
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001298 struct exynos5_hwc_composer_device_1_t *dev;
1299 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1300 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001301
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001302 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1303 (const struct hw_module_t **)&dev->gralloc_module)) {
1304 ALOGE("failed to get gralloc hw module");
1305 ret = -EINVAL;
1306 goto err_get_module;
1307 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001308
Greg Hackmann9130e702012-07-30 14:53:04 -07001309 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1310 &dev->alloc_device)) {
1311 ALOGE("failed to open gralloc");
1312 ret = -EINVAL;
1313 goto err_get_module;
1314 }
1315
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001316 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1317 if (dev->fd < 0) {
1318 ALOGE("failed to open framebuffer");
1319 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001320 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001321 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001322
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001323 dev->hdmi_fd = open("/dev/video16", O_RDWR);
1324 if (dev->hdmi_fd < 0) {
1325 ALOGE("failed to open hdmi device");
1326 ret = dev->hdmi_fd;
1327 goto err_ioctl;
1328 }
1329
Greg Hackmann29724852012-07-23 15:31:10 -07001330 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1331 if (dev->vsync_fd < 0) {
1332 ALOGE("failed to open vsync attribute");
1333 ret = dev->vsync_fd;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001334 goto err_hdmi;
Greg Hackmann29724852012-07-23 15:31:10 -07001335 }
1336
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001337 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1338 if (sw_fd) {
1339 char val;
1340 if (read(sw_fd, &val, 1) == 1 && val == '1')
1341 dev->hdmi_hpd = true;
1342 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001343
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001344 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1345 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1346 dev->base.common.module = const_cast<hw_module_t *>(module);
1347 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001348
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001349 dev->base.prepare = exynos5_prepare;
1350 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001351 dev->base.eventControl = exynos5_eventControl;
1352 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001353 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001354 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001355 dev->base.dump = exynos5_dump;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001356
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001357 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001358
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001359 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001360
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001361 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1362 if (ret) {
1363 ALOGE("failed to start vsync thread: %s", strerror(ret));
1364 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001365 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001366 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001367
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001368 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001369
Greg Hackmann29724852012-07-23 15:31:10 -07001370err_vsync:
1371 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001372err_hdmi:
1373 close(dev->hdmi_fd);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001374err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001375 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001376err_open_fb:
1377 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001378err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001379 free(dev);
1380 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001381}
1382
1383static int exynos5_close(hw_device_t *device)
1384{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001385 struct exynos5_hwc_composer_device_1_t *dev =
1386 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001387 pthread_kill(dev->vsync_thread, SIGTERM);
1388 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001389 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1390 if (dev->gsc[i].gsc)
1391 exynos_gsc_destroy(dev->gsc[i].gsc);
1392 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1393 if (dev->gsc[i].dst_buf[j])
1394 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1395 }
1396 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001397 close(dev->vsync_fd);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001398 close(dev->hdmi_fd);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001399 close(dev->fd);
1400 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001401}
1402
1403static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001404 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001405};
1406
1407hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001408 common: {
1409 tag: HARDWARE_MODULE_TAG,
1410 module_api_version: HWC_MODULE_API_VERSION_0_1,
1411 hal_api_version: HARDWARE_HAL_API_VERSION,
1412 id: HWC_HARDWARE_MODULE_ID,
1413 name: "Samsung exynos5 hwcomposer module",
1414 author: "Google",
1415 methods: &exynos5_hwc_module_methods,
1416 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001417};