blob: 58d1c3ddf363072dd78e11940759768ccdd95ec6 [file] [log] [blame]
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001/*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
Greg Hackmann86eb1c62012-05-30 09:25:51 -070016#include <errno.h>
17#include <fcntl.h>
Greg Hackmann29724852012-07-23 15:31:10 -070018#include <poll.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070019#include <pthread.h>
20#include <stdio.h>
21#include <stdlib.h>
22
23#include <sys/ioctl.h>
24#include <sys/mman.h>
25#include <sys/time.h>
26#include <sys/resource.h>
27
28#include <s3c-fb.h>
29
30#include <EGL/egl.h>
31
Erik Gilling87e707e2012-06-29 17:35:13 -070032#define HWC_REMOVE_DEPRECATED_VERSIONS 1
33
Greg Hackmann86eb1c62012-05-30 09:25:51 -070034#include <cutils/log.h>
35#include <hardware/gralloc.h>
36#include <hardware/hardware.h>
37#include <hardware/hwcomposer.h>
38#include <hardware_legacy/uevent.h>
Greg Hackmann600867e2012-08-23 12:58:02 -070039#include <utils/String8.h>
Greg Hackmann86eb1c62012-05-30 09:25:51 -070040#include <utils/Vector.h>
41
Greg Hackmannf4cc0c32012-05-30 09:28:52 -070042#include <sync/sync.h>
43
Greg Hackmann86eb1c62012-05-30 09:25:51 -070044#include "ion.h"
45#include "gralloc_priv.h"
Benoit Gobycdd61b32012-07-09 12:09:59 -070046#include "exynos_gscaler.h"
Greg Hackmann9130e702012-07-30 14:53:04 -070047#include "exynos_format.h"
Benoit Goby8bad7e32012-08-16 14:17:14 -070048#include "exynos_v4l2.h"
49#include "s5p_tvout_v4l2.h"
Greg Hackmann86eb1c62012-05-30 09:25:51 -070050
Greg Hackmannf6f2e542012-07-16 16:10:27 -070051struct hwc_callback_entry {
52 void (*callback)(void *, private_handle_t *);
53 void *data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070054};
55typedef android::Vector<struct hwc_callback_entry> hwc_callback_queue_t;
56
Greg Hackmannf9509d32012-09-12 09:49:29 -070057const size_t NUM_HW_WINDOWS = 5;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070058const size_t NO_FB_NEEDED = NUM_HW_WINDOWS + 1;
Greg Hackmannf9509d32012-09-12 09:49:29 -070059const size_t MAX_PIXELS = 2560 * 1600 * 2;
Greg Hackmann9130e702012-07-30 14:53:04 -070060const size_t GSC_W_ALIGNMENT = 16;
61const size_t GSC_H_ALIGNMENT = 16;
Greg Hackmann2ddbc742012-08-17 15:41:29 -070062const int AVAILABLE_GSC_UNITS[] = { 0, 3 };
63const size_t NUM_GSC_UNITS = sizeof(AVAILABLE_GSC_UNITS) /
64 sizeof(AVAILABLE_GSC_UNITS[0]);
Greg Hackmann86eb1c62012-05-30 09:25:51 -070065
Erik Gilling87e707e2012-06-29 17:35:13 -070066struct exynos5_hwc_composer_device_1_t;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070067
Greg Hackmann9130e702012-07-30 14:53:04 -070068struct exynos5_gsc_map_t {
69 enum {
70 GSC_NONE = 0,
71 GSC_M2M,
72 // TODO: GSC_LOCAL_PATH
73 } mode;
74 int idx;
75};
76
Greg Hackmann86eb1c62012-05-30 09:25:51 -070077struct exynos5_hwc_post_data_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070078 exynos5_hwc_composer_device_1_t *pdev;
79 int overlay_map[NUM_HW_WINDOWS];
Greg Hackmann9130e702012-07-30 14:53:04 -070080 exynos5_gsc_map_t gsc_map[NUM_HW_WINDOWS];
Greg Hackmannf6f2e542012-07-16 16:10:27 -070081 hwc_layer_1_t overlays[NUM_HW_WINDOWS];
82 int num_overlays;
83 size_t fb_window;
84 int fence;
85 pthread_mutex_t completion_lock;
86 pthread_cond_t completion;
Greg Hackmann86eb1c62012-05-30 09:25:51 -070087};
88
Greg Hackmann44a6d422012-09-17 17:31:30 -070089const size_t NUM_GSC_DST_BUFS = 3;
Greg Hackmann9130e702012-07-30 14:53:04 -070090struct exynos5_gsc_data_t {
91 void *gsc;
92 exynos_gsc_img src_cfg;
93 exynos_gsc_img dst_cfg;
94 buffer_handle_t dst_buf[NUM_GSC_DST_BUFS];
95 size_t current_buf;
96};
97
Erik Gilling87e707e2012-06-29 17:35:13 -070098struct exynos5_hwc_composer_device_1_t {
Greg Hackmannf6f2e542012-07-16 16:10:27 -070099 hwc_composer_device_1_t base;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700100
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700101 int fd;
Greg Hackmann29724852012-07-23 15:31:10 -0700102 int vsync_fd;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700103 exynos5_hwc_post_data_t bufs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700104
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700105 const private_module_t *gralloc_module;
Greg Hackmann9130e702012-07-30 14:53:04 -0700106 alloc_device_t *alloc_device;
Jesse Hallda5a71d2012-08-21 12:12:55 -0700107 const hwc_procs_t *procs;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700108 pthread_t vsync_thread;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700109
Greg Hackmannd92fe212012-09-11 14:28:41 -0700110 int32_t xres;
111 int32_t yres;
112 int32_t xdpi;
113 int32_t ydpi;
114 int32_t vsync_period;
115
Benoit Goby8bad7e32012-08-16 14:17:14 -0700116 int hdmi_mixer0;
117 int hdmi_layer0;
118 int hdmi_layer1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700119 bool hdmi_hpd;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700120 bool hdmi_enabled;
Benoit Gobyad4e3582012-08-30 17:17:34 -0700121 bool hdmi_blanked;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700122 void *hdmi_gsc;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700123 int hdmi_w;
124 int hdmi_h;
125 exynos_gsc_img hdmi_src;
126 exynos_gsc_img hdmi_dst;
Greg Hackmann9130e702012-07-30 14:53:04 -0700127
128 exynos5_gsc_data_t gsc[NUM_GSC_UNITS];
Greg Hackmann600867e2012-08-23 12:58:02 -0700129
130 struct s3c_fb_win_config last_config[NUM_HW_WINDOWS];
131 const void *last_handles[NUM_HW_WINDOWS];
132 exynos5_gsc_map_t last_gsc_map[NUM_HW_WINDOWS];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700133};
134
Greg Hackmann9130e702012-07-30 14:53:04 -0700135static void dump_handle(private_handle_t *h)
136{
Greg Hackmanneba34a92012-08-14 16:10:05 -0700137 ALOGV("\t\tformat = %d, width = %u, height = %u, stride = %u, vstride = %u",
138 h->format, h->width, h->height, h->stride, h->vstride);
Greg Hackmann9130e702012-07-30 14:53:04 -0700139}
140
Erik Gilling87e707e2012-06-29 17:35:13 -0700141static void dump_layer(hwc_layer_1_t const *l)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700142{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700143 ALOGV("\ttype=%d, flags=%08x, handle=%p, tr=%02x, blend=%04x, "
144 "{%d,%d,%d,%d}, {%d,%d,%d,%d}",
145 l->compositionType, l->flags, l->handle, l->transform,
146 l->blending,
147 l->sourceCrop.left,
148 l->sourceCrop.top,
149 l->sourceCrop.right,
150 l->sourceCrop.bottom,
151 l->displayFrame.left,
152 l->displayFrame.top,
153 l->displayFrame.right,
154 l->displayFrame.bottom);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700155
Greg Hackmann9130e702012-07-30 14:53:04 -0700156 if(l->handle && !(l->flags & HWC_SKIP_LAYER))
157 dump_handle(private_handle_t::dynamicCast(l->handle));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700158}
159
160static void dump_config(s3c_fb_win_config &c)
161{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700162 ALOGV("\tstate = %u", c.state);
163 if (c.state == c.S3C_FB_WIN_STATE_BUFFER) {
164 ALOGV("\t\tfd = %d, offset = %u, stride = %u, "
165 "x = %d, y = %d, w = %u, h = %u, "
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700166 "format = %u, blending = %u",
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700167 c.fd, c.offset, c.stride,
168 c.x, c.y, c.w, c.h,
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700169 c.format, c.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700170 }
171 else if (c.state == c.S3C_FB_WIN_STATE_COLOR) {
172 ALOGV("\t\tcolor = %u", c.color);
173 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700174}
175
Greg Hackmann9130e702012-07-30 14:53:04 -0700176static void dump_gsc_img(exynos_gsc_img &c)
177{
178 ALOGV("\tx = %u, y = %u, w = %u, h = %u, fw = %u, fh = %u",
179 c.x, c.y, c.w, c.h, c.fw, c.fh);
180 ALOGV("\taddr = {%u, %u, %u}, rot = %u, cacheable = %u, drmMode = %u",
181 c.yaddr, c.uaddr, c.vaddr, c.rot, c.cacheable, c.drmMode);
182}
183
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700184inline int WIDTH(const hwc_rect &rect) { return rect.right - rect.left; }
185inline int HEIGHT(const hwc_rect &rect) { return rect.bottom - rect.top; }
Greg Hackmann31991d52012-07-13 13:23:11 -0700186template<typename T> inline T max(T a, T b) { return (a > b) ? a : b; }
187template<typename T> inline T min(T a, T b) { return (a < b) ? a : b; }
188
189static bool is_transformed(const hwc_layer_1_t &layer)
190{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700191 return layer.transform != 0;
Greg Hackmann31991d52012-07-13 13:23:11 -0700192}
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700193
Greg Hackmann9130e702012-07-30 14:53:04 -0700194static bool is_rotated(const hwc_layer_1_t &layer)
195{
196 return (layer.transform & HAL_TRANSFORM_ROT_90) ||
197 (layer.transform & HAL_TRANSFORM_ROT_180);
198}
199
Erik Gilling87e707e2012-06-29 17:35:13 -0700200static bool is_scaled(const hwc_layer_1_t &layer)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700201{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700202 return WIDTH(layer.displayFrame) != WIDTH(layer.sourceCrop) ||
203 HEIGHT(layer.displayFrame) != HEIGHT(layer.sourceCrop);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700204}
205
Benoit Goby8bad7e32012-08-16 14:17:14 -0700206static inline bool gsc_dst_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
207{
208 return c1.x != c2.x ||
209 c1.y != c2.y ||
210 c1.w != c2.w ||
211 c1.h != c2.h ||
212 c1.format != c2.format ||
213 c1.rot != c2.rot ||
214 c1.cacheable != c2.cacheable ||
215 c1.drmMode != c2.drmMode;
216}
217
218static inline bool gsc_src_cfg_changed(exynos_gsc_img &c1, exynos_gsc_img &c2)
219{
220 return gsc_dst_cfg_changed(c1, c2) ||
221 c1.fw != c2.fw ||
222 c1.fh != c2.fh;
223}
224
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700225static enum s3c_fb_pixel_format exynos5_format_to_s3c_format(int format)
226{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700227 switch (format) {
228 case HAL_PIXEL_FORMAT_RGBA_8888:
229 return S3C_FB_PIXEL_FORMAT_RGBA_8888;
230 case HAL_PIXEL_FORMAT_RGBX_8888:
231 return S3C_FB_PIXEL_FORMAT_RGBX_8888;
232 case HAL_PIXEL_FORMAT_RGBA_5551:
233 return S3C_FB_PIXEL_FORMAT_RGBA_5551;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700234
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700235 default:
236 return S3C_FB_PIXEL_FORMAT_MAX;
237 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700238}
239
240static bool exynos5_format_is_supported(int format)
241{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700242 return exynos5_format_to_s3c_format(format) < S3C_FB_PIXEL_FORMAT_MAX;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700243}
244
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700245static bool exynos5_format_is_rgb(int format)
246{
247 switch (format) {
248 case HAL_PIXEL_FORMAT_RGBA_8888:
249 case HAL_PIXEL_FORMAT_RGBX_8888:
250 case HAL_PIXEL_FORMAT_RGB_888:
251 case HAL_PIXEL_FORMAT_RGB_565:
252 case HAL_PIXEL_FORMAT_BGRA_8888:
253 case HAL_PIXEL_FORMAT_RGBA_5551:
254 case HAL_PIXEL_FORMAT_RGBA_4444:
255 return true;
256
257 default:
258 return false;
259 }
260}
261
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700262static bool exynos5_format_is_supported_by_gscaler(int format)
263{
Greg Hackmann9130e702012-07-30 14:53:04 -0700264 switch (format) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700265 case HAL_PIXEL_FORMAT_RGBX_8888:
266 case HAL_PIXEL_FORMAT_RGB_565:
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700267 case HAL_PIXEL_FORMAT_EXYNOS_YV12:
Greg Hackmann9130e702012-07-30 14:53:04 -0700268 case HAL_PIXEL_FORMAT_YCbCr_420_SP:
Greg Hackmann9130e702012-07-30 14:53:04 -0700269 case HAL_PIXEL_FORMAT_YCbCr_420_SP_TILED:
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700270 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700271
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700272 default:
273 return false;
274 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700275}
276
Greg Hackmann296668e2012-08-14 15:51:40 -0700277static bool exynos5_format_is_ycrcb(int format)
278{
Rebecca Schultz Zavinc853be72012-08-23 00:03:05 -0700279 return format == HAL_PIXEL_FORMAT_EXYNOS_YV12;
Greg Hackmann296668e2012-08-14 15:51:40 -0700280}
281
Greg Hackmann9130e702012-07-30 14:53:04 -0700282static bool exynos5_format_requires_gscaler(int format)
283{
284 return exynos5_format_is_supported_by_gscaler(format) &&
285 format != HAL_PIXEL_FORMAT_RGBX_8888;
286}
287
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700288static uint8_t exynos5_format_to_bpp(int format)
289{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700290 switch (format) {
291 case HAL_PIXEL_FORMAT_RGBA_8888:
292 case HAL_PIXEL_FORMAT_RGBX_8888:
293 return 32;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700294
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700295 case HAL_PIXEL_FORMAT_RGBA_5551:
296 case HAL_PIXEL_FORMAT_RGBA_4444:
297 return 16;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700298
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700299 default:
300 ALOGW("unrecognized pixel format %u", format);
301 return 0;
302 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700303}
304
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700305static bool exynos5_supports_gscaler(hwc_layer_1_t &layer, int format,
306 bool local_path)
Greg Hackmann9130e702012-07-30 14:53:04 -0700307{
308 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
309
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700310 int max_w = is_rotated(layer) ? 2048 : 4800;
311 int max_h = is_rotated(layer) ? 2048 : 3344;
Greg Hackmann9130e702012-07-30 14:53:04 -0700312
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700313 bool rot90or270 = !!(layer.transform & HAL_TRANSFORM_ROT_90);
314 // n.b.: HAL_TRANSFORM_ROT_270 = HAL_TRANSFORM_ROT_90 |
315 // HAL_TRANSFORM_ROT_180
Greg Hackmann9130e702012-07-30 14:53:04 -0700316
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700317 int src_w = WIDTH(layer.sourceCrop), src_h = HEIGHT(layer.sourceCrop);
318 int dest_w, dest_h;
319 if (rot90or270) {
320 dest_w = HEIGHT(layer.displayFrame);
321 dest_h = WIDTH(layer.displayFrame);
322 } else {
323 dest_w = WIDTH(layer.displayFrame);
324 dest_h = HEIGHT(layer.displayFrame);
325 }
326 int max_downscale = local_path ? 4 : 16;
327 const int max_upscale = 8;
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700328
Rebecca Schultz Zavin23cd5952012-09-12 00:30:52 -0700329 return exynos5_format_is_supported_by_gscaler(format) &&
330 handle->stride <= max_w &&
331 handle->stride % GSC_W_ALIGNMENT == 0 &&
332 src_w <= dest_w * max_downscale &&
333 dest_w <= src_w * max_upscale &&
334 handle->vstride <= max_h &&
335 handle->vstride % GSC_H_ALIGNMENT == 0 &&
336 src_h <= dest_h * max_downscale &&
337 dest_h <= src_h * max_upscale &&
338 // per 46.2
339 (!rot90or270 || layer.sourceCrop.top % 2 == 0) &&
340 (!rot90or270 || layer.sourceCrop.left % 2 == 0);
341 // per 46.3.1.6
Greg Hackmann9130e702012-07-30 14:53:04 -0700342}
343
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700344int hdmi_get_config(struct exynos5_hwc_composer_device_1_t *dev)
345{
346 struct v4l2_dv_preset preset;
347 struct v4l2_dv_enum_preset enum_preset;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700348 int index = 0;
349 bool found = false;
350 int ret;
351
Benoit Goby8bad7e32012-08-16 14:17:14 -0700352 if (ioctl(dev->hdmi_layer0, VIDIOC_G_DV_PRESET, &preset) < 0) {
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700353 ALOGE("%s: g_dv_preset error, %d", __func__, errno);
354 return -1;
355 }
356
357 while (true) {
358 enum_preset.index = index++;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700359 ret = ioctl(dev->hdmi_layer0, VIDIOC_ENUM_DV_PRESETS, &enum_preset);
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700360
361 if (ret < 0) {
362 if (errno == EINVAL)
363 break;
364 ALOGE("%s: enum_dv_presets error, %d", __func__, errno);
365 return -1;
366 }
367
368 ALOGV("%s: %d preset=%02d width=%d height=%d name=%s",
369 __func__, enum_preset.index, enum_preset.preset,
370 enum_preset.width, enum_preset.height, enum_preset.name);
371
372 if (preset.preset == enum_preset.preset) {
Benoit Goby8bad7e32012-08-16 14:17:14 -0700373 dev->hdmi_w = enum_preset.width;
374 dev->hdmi_h = enum_preset.height;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -0700375 found = true;
376 }
377 }
378
379 return found ? 0 : -1;
380}
381
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700382static enum s3c_fb_blending exynos5_blending_to_s3c_blending(int32_t blending)
383{
384 switch (blending) {
385 case HWC_BLENDING_NONE:
386 return S3C_FB_BLENDING_NONE;
387 case HWC_BLENDING_PREMULT:
388 return S3C_FB_BLENDING_PREMULT;
389 case HWC_BLENDING_COVERAGE:
390 return S3C_FB_BLENDING_COVERAGE;
391
392 default:
393 return S3C_FB_BLENDING_MAX;
394 }
395}
396
397static bool exynos5_blending_is_supported(int32_t blending)
398{
399 return exynos5_blending_to_s3c_blending(blending) < S3C_FB_BLENDING_MAX;
400}
401
Benoit Goby8bad7e32012-08-16 14:17:14 -0700402static int hdmi_start_background(struct exynos5_hwc_composer_device_1_t *dev)
403{
404 struct v4l2_requestbuffers reqbuf;
405 struct v4l2_subdev_format sd_fmt;
406 struct v4l2_subdev_crop sd_crop;
407 struct v4l2_format fmt;
408 struct v4l2_buffer buffer;
409 struct v4l2_plane planes[1];
410
411 memset(&reqbuf, 0, sizeof(reqbuf));
412 memset(&sd_fmt, 0, sizeof(sd_fmt));
413 memset(&sd_crop, 0, sizeof(sd_crop));
414 memset(&fmt, 0, sizeof(fmt));
415 memset(&buffer, 0, sizeof(buffer));
416 memset(planes, 0, sizeof(planes));
417
418 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SINK;
419 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
420 sd_fmt.format.width = 1;
421 sd_fmt.format.height = 1;
422 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
423 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
424 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
425 return -1;
426 }
427
428 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SINK;
429 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
430 sd_crop.rect.left = 0;
431 sd_crop.rect.top = 0;
432 sd_crop.rect.width = 1;
433 sd_crop.rect.height = 1;
434 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
435 ALOGE("%s: set_crop failed pad=%d", __func__, sd_crop.pad);
436 return -1;
437 }
438
439 sd_fmt.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
440 sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
441 sd_fmt.format.width = dev->hdmi_w;
442 sd_fmt.format.height = dev->hdmi_h;
443 sd_fmt.format.code = V4L2_MBUS_FMT_XRGB8888_4X8_LE;
444 if (exynos_subdev_s_fmt(dev->hdmi_mixer0, &sd_fmt) < 0) {
445 ALOGE("%s: s_fmt failed pad=%d", __func__, sd_fmt.pad);
446 return -1;
447 }
448
449 sd_crop.pad = MIXER_G1_SUBDEV_PAD_SOURCE;
450 sd_crop.which = V4L2_SUBDEV_FORMAT_ACTIVE;
451 sd_crop.rect.left = 0;
452 sd_crop.rect.top = 0;
453 sd_crop.rect.width = 1;
454 sd_crop.rect.height = 1;
455 if (exynos_subdev_s_crop(dev->hdmi_mixer0, &sd_crop) < 0) {
456 ALOGE("%s: s_crop failed pad=%d", __func__, sd_crop.pad);
457 return -1;
458 }
459
460 fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
461 fmt.fmt.pix_mp.width = 1;
462 fmt.fmt.pix_mp.height = 1;
463 fmt.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_BGR32;
464 fmt.fmt.pix_mp.field = V4L2_FIELD_ANY;
465 fmt.fmt.pix_mp.num_planes = 1;
466 if (exynos_v4l2_s_fmt(dev->hdmi_layer1, &fmt) < 0) {
467 ALOGE("%s::videodev set format failed", __func__);
468 return -1;
469 }
470
471 reqbuf.count = 1;
472 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
473 reqbuf.memory = V4L2_MEMORY_MMAP;
474
475 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
476 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
477 return -1;
478 }
479
480 if (reqbuf.count != 1) {
481 ALOGE("%s: didn't get buffer", __func__);
482 return -1;
483 }
484
485 memset(&buffer, 0, sizeof(buffer));
486 buffer.type = reqbuf.type;
487 buffer.memory = V4L2_MEMORY_MMAP;
488 buffer.length = 1;
489 buffer.m.planes = planes;
490 if (exynos_v4l2_querybuf(dev->hdmi_layer1, &buffer) < 0) {
491 ALOGE("%s: exynos_v4l2_querybuf failed %d", __func__, errno);
492 return -1;
493 }
494
495 void *start = mmap(NULL, planes[0].length, PROT_READ | PROT_WRITE,
496 MAP_SHARED, dev->hdmi_layer1, planes[0].m.mem_offset);
497 if (start == MAP_FAILED) {
498 ALOGE("%s: mmap failed %d", __func__, errno);
499 return -1;
500 }
501
502 memset(start, 0, planes[0].length);
503
504 munmap(start, planes[0].length);
505
506 if (exynos_v4l2_qbuf(dev->hdmi_layer1, &buffer) < 0) {
507 ALOGE("%s: exynos_v4l2_qbuf failed %d", __func__, errno);
508 return -1;
509 }
510
511 if (exynos_v4l2_streamon(dev->hdmi_layer1, buffer.type) < 0) {
512 ALOGE("%s:stream on failed", __func__);
513 return -1;
514 }
515
516 if (exynos_v4l2_s_ctrl(dev->hdmi_layer1, V4L2_CID_TV_LAYER_PRIO, 0) < 0) {
517 ALOGE("%s: s_ctrl LAYER_PRIO failed", __func__);
518 return -1;
519 }
520
521 return 0;
522}
523
524static int hdmi_stop_background(struct exynos5_hwc_composer_device_1_t *dev)
525{
526 struct v4l2_requestbuffers reqbuf;
527
528 if (exynos_v4l2_streamoff(dev->hdmi_layer1, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) < 0) {
529 ALOGE("%s:stream off failed", __func__);
530 return -1;
531 }
532
533 memset(&reqbuf, 0, sizeof(reqbuf));
534 reqbuf.count = 0;
535 reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
536 reqbuf.memory = V4L2_MEMORY_MMAP;
537 if (exynos_v4l2_reqbufs(dev->hdmi_layer1, &reqbuf) < 0) {
538 ALOGE("%s: exynos_v4l2_reqbufs failed %d", __func__, errno);
539 return -1;
540 }
541
542 return 0;
543}
544
Benoit Gobycdd61b32012-07-09 12:09:59 -0700545static int hdmi_enable(struct exynos5_hwc_composer_device_1_t *dev)
546{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700547 if (dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700548 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700549
Benoit Gobyad4e3582012-08-30 17:17:34 -0700550 if (dev->hdmi_blanked)
551 return 0;
552
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700553 dev->hdmi_gsc = exynos_gsc_create_exclusive(3, GSC_OUTPUT_MODE, GSC_OUT_TV);
554 if (!dev->hdmi_gsc) {
555 ALOGE("%s: exynos_gsc_create_exclusive failed", __func__);
556 return -ENODEV;
557 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700558
Benoit Goby8bad7e32012-08-16 14:17:14 -0700559 memset(&dev->hdmi_src, 0, sizeof(dev->hdmi_src));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700560
Benoit Goby8bad7e32012-08-16 14:17:14 -0700561 if (hdmi_start_background(dev) < 0) {
562 ALOGE("%s: hdmi_start_background failed", __func__);
563 return -1;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700564 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700565
Benoit Goby8bad7e32012-08-16 14:17:14 -0700566 dev->hdmi_enabled = true;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700567 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700568}
569
570static void hdmi_disable(struct exynos5_hwc_composer_device_1_t *dev)
571{
Benoit Goby8bad7e32012-08-16 14:17:14 -0700572 if (!dev->hdmi_enabled)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700573 return;
574 exynos_gsc_destroy(dev->hdmi_gsc);
Benoit Gobyad4e3582012-08-30 17:17:34 -0700575 hdmi_stop_background(dev);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700576 dev->hdmi_gsc = NULL;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700577 dev->hdmi_enabled = false;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700578}
579
Benoit Goby8bad7e32012-08-16 14:17:14 -0700580static int hdmi_configure(struct exynos5_hwc_composer_device_1_t *dev,
581 exynos_gsc_img &src_cfg,
582 exynos_gsc_img &dst_cfg)
583{
584 if (!gsc_src_cfg_changed(src_cfg, dev->hdmi_src)
585 && !gsc_dst_cfg_changed(dst_cfg, dev->hdmi_dst))
586 return 0;
587
588 ALOGV("HDMI source config:");
589 dump_gsc_img(src_cfg);
590 ALOGV("HDMI dest config:");
591 dump_gsc_img(dst_cfg);
592
593 exynos_gsc_stop_exclusive(dev->hdmi_gsc);
594
595 int ret = exynos_gsc_config_exclusive(dev->hdmi_gsc, &src_cfg, &dst_cfg);
596 if (ret < 0) {
597 ALOGE("%s: exynos_gsc_config_exclusive failed %d", __func__, ret);
598 return ret;
599 }
600
601 dev->hdmi_src = src_cfg;
602 dev->hdmi_dst = dst_cfg;
603 return ret;
604}
605
606static int hdmi_configure_handle(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
607{
608 exynos_gsc_img src_cfg, dst_cfg;
609 memset(&src_cfg, 0, sizeof(src_cfg));
610 memset(&dst_cfg, 0, sizeof(dst_cfg));
611
612 src_cfg.w = src_cfg.fw = h->width;
613 src_cfg.h = src_cfg.fh = h->height;
614 src_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
615
616 dst_cfg.w = dst_cfg.fw = dev->hdmi_w;
617 dst_cfg.h = dst_cfg.fh = dev->hdmi_h;
618 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
619
620 return hdmi_configure(dev, src_cfg, dst_cfg);
621}
622
623static int hdmi_configure_layer(struct exynos5_hwc_composer_device_1_t *dev, hwc_layer_1_t &layer)
624{
625 exynos_gsc_img src_cfg, dst_cfg;
626 memset(&src_cfg, 0, sizeof(src_cfg));
627 memset(&dst_cfg, 0, sizeof(dst_cfg));
628 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
629
630 src_cfg.x = layer.sourceCrop.left;
631 src_cfg.y = layer.sourceCrop.top;
632 src_cfg.w = WIDTH(layer.sourceCrop);
633 src_cfg.fw = src_handle->stride;
634 src_cfg.h = HEIGHT(layer.sourceCrop);
635 src_cfg.fh = src_handle->vstride;
636 src_cfg.format = src_handle->format;
637
638 if (dev->hdmi_w * src_cfg.h < dev->hdmi_h * src_cfg.w) {
639 dst_cfg.w = dev->hdmi_w;
640 dst_cfg.fw = dev->hdmi_w;
641 dst_cfg.fh = dev->hdmi_h;
642 dst_cfg.h = dev->hdmi_w * src_cfg.h / src_cfg.w;
643 dst_cfg.y = (dev->hdmi_h - dst_cfg.h) / 2;
644 }
645 else {
646 dst_cfg.w = dev->hdmi_h * src_cfg.w / src_cfg.h;
647 dst_cfg.fw = dev->hdmi_w;
648 dst_cfg.h = dev->hdmi_h;
649 dst_cfg.fh = dev->hdmi_h;
650 dst_cfg.x = (dev->hdmi_w - dst_cfg.w) / 2;
651 }
652 dst_cfg.format = HAL_PIXEL_FORMAT_EXYNOS_YV12;
653 dst_cfg.rot = layer.transform;
654
655 return hdmi_configure(dev, src_cfg, dst_cfg);
656}
657
658static int hdmi_output(struct exynos5_hwc_composer_device_1_t *dev, private_handle_t *h)
Benoit Gobycdd61b32012-07-09 12:09:59 -0700659{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700660 exynos_gsc_img src_info;
661 exynos_gsc_img dst_info;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700662
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700663 memset(&src_info, 0, sizeof(src_info));
664 memset(&dst_info, 0, sizeof(dst_info));
Benoit Gobycdd61b32012-07-09 12:09:59 -0700665
Benoit Goby8bad7e32012-08-16 14:17:14 -0700666 src_info.yaddr = h->fd;
667 if (exynos5_format_is_ycrcb(h->format)) {
668 src_info.uaddr = h->fd2;
669 src_info.vaddr = h->fd1;
670 } else {
671 src_info.uaddr = h->fd1;
672 src_info.vaddr = h->fd2;
673 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700674
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700675 int ret = exynos_gsc_run_exclusive(dev->hdmi_gsc, &src_info, &dst_info);
676 if (ret < 0) {
677 ALOGE("%s: exynos_gsc_run_exclusive failed %d", __func__, ret);
678 return ret;
679 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700680
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700681 return 0;
Benoit Gobycdd61b32012-07-09 12:09:59 -0700682}
683
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700684bool exynos5_supports_overlay(hwc_layer_1_t &layer, size_t i)
685{
Greg Hackmannd82ad202012-07-24 13:49:47 -0700686 if (layer.flags & HWC_SKIP_LAYER) {
687 ALOGV("\tlayer %u: skipping", i);
688 return false;
689 }
690
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700691 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700692
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700693 if (!handle) {
694 ALOGV("\tlayer %u: handle is NULL", i);
695 return false;
696 }
Greg Hackmannf8c24e52012-08-14 15:50:51 -0700697 if (!exynos5_format_is_rgb(handle->format) &&
698 !exynos5_format_is_supported_by_gscaler(handle->format)) {
699 ALOGW("\tlayer %u: unexpected format %u", i, handle->format);
700 return false;
701 }
702
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700703 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann227ae8a2012-08-03 16:16:58 -0700704 if (!exynos5_supports_gscaler(layer, handle->format, false)) {
Greg Hackmann9130e702012-07-30 14:53:04 -0700705 ALOGV("\tlayer %u: gscaler required but not supported", i);
706 return false;
707 }
708 } else {
709 if (!exynos5_format_is_supported(handle->format)) {
710 ALOGV("\tlayer %u: pixel format %u not supported", i, handle->format);
711 return false;
712 }
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700713 if (is_scaled(layer)) {
714 ALOGV("\tlayer %u: scaling not supported", i);
715 return false;
716 }
717 if (is_transformed(layer)) {
718 ALOGV("\tlayer %u: transformations not supported", i);
719 return false;
720 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700721 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -0700722 if (!exynos5_blending_is_supported(layer.blending)) {
723 ALOGV("\tlayer %u: blending %d not supported", i, layer.blending);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700724 return false;
725 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700726
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700727 return true;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700728}
729
Greg Hackmann31991d52012-07-13 13:23:11 -0700730inline bool intersect(const hwc_rect &r1, const hwc_rect &r2)
731{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700732 return !(r1.left > r2.right ||
733 r1.right < r2.left ||
734 r1.top > r2.bottom ||
735 r1.bottom < r2.top);
Greg Hackmann31991d52012-07-13 13:23:11 -0700736}
737
738inline hwc_rect intersection(const hwc_rect &r1, const hwc_rect &r2)
739{
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700740 hwc_rect i;
741 i.top = max(r1.top, r2.top);
742 i.bottom = min(r1.bottom, r2.bottom);
743 i.left = max(r1.left, r2.left);
744 i.right = min(r1.right, r2.right);
745 return i;
Greg Hackmann31991d52012-07-13 13:23:11 -0700746}
747
Jesse Halle94046d2012-07-31 14:34:08 -0700748static int exynos5_prepare(hwc_composer_device_1_t *dev,
749 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700750{
Jesse Halle94046d2012-07-31 14:34:08 -0700751 if (!numDisplays || !displays)
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700752 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700753
Jesse Halle94046d2012-07-31 14:34:08 -0700754 ALOGV("preparing %u layers", displays[0]->numHwLayers);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700755
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700756 exynos5_hwc_composer_device_1_t *pdev =
757 (exynos5_hwc_composer_device_1_t *)dev;
758 memset(pdev->bufs.overlays, 0, sizeof(pdev->bufs.overlays));
Greg Hackmann9130e702012-07-30 14:53:04 -0700759 memset(pdev->bufs.gsc_map, 0, sizeof(pdev->bufs.gsc_map));
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700760
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700761 bool force_fb = false;
762 if (pdev->hdmi_hpd) {
763 hdmi_enable(pdev);
764 force_fb = true;
Benoit Goby8bad7e32012-08-16 14:17:14 -0700765 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
766 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
767 if (layer.flags & HWC_SKIP_LAYER)
768 continue;
769 private_handle_t *handle = private_handle_t::dynamicCast(layer.handle);
770 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP) {
771 force_fb = false;
772 break;
773 }
774 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700775 } else {
776 hdmi_disable(pdev);
777 }
Benoit Gobycdd61b32012-07-09 12:09:59 -0700778
Erik Gilling87e707e2012-06-29 17:35:13 -0700779 for (size_t i = 0; i < NUM_HW_WINDOWS; i++)
780 pdev->bufs.overlay_map[i] = -1;
781
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700782 bool fb_needed = false;
783 size_t first_fb = 0, last_fb = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700784
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700785 // find unsupported overlays
Jesse Halle94046d2012-07-31 14:34:08 -0700786 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
787 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700788
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700789 if (layer.compositionType == HWC_BACKGROUND && !force_fb) {
790 ALOGV("\tlayer %u: background supported", i);
Jesse Halle94046d2012-07-31 14:34:08 -0700791 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700792 continue;
793 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700794
Jesse Halle94046d2012-07-31 14:34:08 -0700795 if (exynos5_supports_overlay(displays[0]->hwLayers[i], i) && !force_fb) {
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700796 ALOGV("\tlayer %u: overlay supported", i);
797 layer.compositionType = HWC_OVERLAY;
Jesse Halle94046d2012-07-31 14:34:08 -0700798 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700799 continue;
800 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700801
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700802 if (!fb_needed) {
803 first_fb = i;
804 fb_needed = true;
805 }
806 last_fb = i;
807 layer.compositionType = HWC_FRAMEBUFFER;
Greg Hackmann9130e702012-07-30 14:53:04 -0700808
Jesse Halle94046d2012-07-31 14:34:08 -0700809 dump_layer(&displays[0]->hwLayers[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700810 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700811
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700812 // can't composite overlays sandwiched between framebuffers
813 if (fb_needed)
814 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700815 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700816
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700817 // Incrementally try to add our supported layers to hardware windows.
818 // If adding a layer would violate a hardware constraint, force it
819 // into the framebuffer and try again. (Revisiting the entire list is
820 // necessary because adding a layer to the framebuffer can cause other
821 // windows to retroactively violate constraints.)
822 bool changed;
823 do {
824 android::Vector<hwc_rect> rects;
825 android::Vector<hwc_rect> overlaps;
Greg Hackmann9130e702012-07-30 14:53:04 -0700826 size_t pixels_left, windows_left, gsc_left = NUM_GSC_UNITS;
Greg Hackmann31991d52012-07-13 13:23:11 -0700827
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700828 if (fb_needed) {
829 hwc_rect_t fb_rect;
830 fb_rect.top = fb_rect.left = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -0700831 fb_rect.right = pdev->xres - 1;
832 fb_rect.bottom = pdev->yres - 1;
833 pixels_left = MAX_PIXELS - pdev->xres * pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700834 windows_left = NUM_HW_WINDOWS - 1;
835 rects.push_back(fb_rect);
836 }
837 else {
838 pixels_left = MAX_PIXELS;
839 windows_left = NUM_HW_WINDOWS;
840 }
Benoit Goby8bad7e32012-08-16 14:17:14 -0700841 if (pdev->hdmi_enabled)
Greg Hackmann9130e702012-07-30 14:53:04 -0700842 gsc_left--;
843
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700844 changed = false;
Greg Hackmann31991d52012-07-13 13:23:11 -0700845
Jesse Halle94046d2012-07-31 14:34:08 -0700846 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
847 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann9130e702012-07-30 14:53:04 -0700848 if (layer.flags & HWC_SKIP_LAYER)
849 continue;
850
851 private_handle_t *handle = private_handle_t::dynamicCast(
852 layer.handle);
Greg Hackmann31991d52012-07-13 13:23:11 -0700853
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700854 // we've already accounted for the framebuffer above
855 if (layer.compositionType == HWC_FRAMEBUFFER)
856 continue;
Greg Hackmann31991d52012-07-13 13:23:11 -0700857
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700858 // only layer 0 can be HWC_BACKGROUND, so we can
859 // unconditionally allow it without extra checks
860 if (layer.compositionType == HWC_BACKGROUND) {
861 windows_left--;
862 continue;
863 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700864
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700865 size_t pixels_needed = WIDTH(layer.displayFrame) *
866 HEIGHT(layer.displayFrame);
867 bool can_compose = windows_left && pixels_needed <= pixels_left;
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700868 bool gsc_required = exynos5_format_requires_gscaler(handle->format);
Greg Hackmann9130e702012-07-30 14:53:04 -0700869 if (gsc_required)
870 can_compose = can_compose && gsc_left;
Greg Hackmann31991d52012-07-13 13:23:11 -0700871
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700872 // hwc_rect_t right and bottom values are normally exclusive;
873 // the intersection logic is simpler if we make them inclusive
874 hwc_rect_t visible_rect = layer.displayFrame;
875 visible_rect.right--; visible_rect.bottom--;
Greg Hackmann31991d52012-07-13 13:23:11 -0700876
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700877 // no more than 2 layers can overlap on a given pixel
878 for (size_t j = 0; can_compose && j < overlaps.size(); j++) {
879 if (intersect(visible_rect, overlaps.itemAt(j)))
880 can_compose = false;
881 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700882
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700883 if (!can_compose) {
884 layer.compositionType = HWC_FRAMEBUFFER;
885 if (!fb_needed) {
886 first_fb = last_fb = i;
887 fb_needed = true;
888 }
889 else {
890 first_fb = min(i, first_fb);
891 last_fb = max(i, last_fb);
892 }
893 changed = true;
894 break;
895 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700896
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700897 for (size_t j = 0; j < rects.size(); j++) {
898 const hwc_rect_t &other_rect = rects.itemAt(j);
899 if (intersect(visible_rect, other_rect))
900 overlaps.push_back(intersection(visible_rect, other_rect));
901 }
902 rects.push_back(visible_rect);
903 pixels_left -= pixels_needed;
904 windows_left--;
Greg Hackmann9130e702012-07-30 14:53:04 -0700905 if (gsc_required)
906 gsc_left--;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700907 }
Greg Hackmann31991d52012-07-13 13:23:11 -0700908
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700909 if (changed)
910 for (size_t i = first_fb; i < last_fb; i++)
Jesse Halle94046d2012-07-31 14:34:08 -0700911 displays[0]->hwLayers[i].compositionType = HWC_FRAMEBUFFER;
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700912 } while(changed);
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700913
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700914 unsigned int nextWindow = 0;
Greg Hackmann9130e702012-07-30 14:53:04 -0700915 int nextGsc = 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700916
Jesse Halle94046d2012-07-31 14:34:08 -0700917 for (size_t i = 0; i < displays[0]->numHwLayers; i++) {
918 hwc_layer_1_t &layer = displays[0]->hwLayers[i];
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700919
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700920 if (fb_needed && i == first_fb) {
921 ALOGV("assigning framebuffer to window %u\n",
922 nextWindow);
923 nextWindow++;
924 continue;
925 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700926
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700927 if (layer.compositionType != HWC_FRAMEBUFFER) {
928 ALOGV("assigning layer %u to window %u", i, nextWindow);
929 pdev->bufs.overlay_map[nextWindow] = i;
Greg Hackmann9130e702012-07-30 14:53:04 -0700930 if (layer.compositionType == HWC_OVERLAY) {
931 private_handle_t *handle =
932 private_handle_t::dynamicCast(layer.handle);
Greg Hackmann9e6b8ca2012-09-12 09:28:22 -0700933 if (exynos5_format_requires_gscaler(handle->format)) {
Greg Hackmann2ddbc742012-08-17 15:41:29 -0700934 ALOGV("\tusing gscaler %u", AVAILABLE_GSC_UNITS[nextGsc]);
Greg Hackmann3088b972012-09-12 15:07:23 -0700935 pdev->bufs.gsc_map[nextWindow].mode =
Greg Hackmann9130e702012-07-30 14:53:04 -0700936 exynos5_gsc_map_t::GSC_M2M;
Greg Hackmann3088b972012-09-12 15:07:23 -0700937 pdev->bufs.gsc_map[nextWindow].idx = nextGsc++;
Greg Hackmann9130e702012-07-30 14:53:04 -0700938 }
939 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700940 nextWindow++;
941 }
942 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700943
Greg Hackmann9130e702012-07-30 14:53:04 -0700944 for (size_t i = nextGsc; i < NUM_GSC_UNITS; i++) {
945 for (size_t j = 0; j < NUM_GSC_DST_BUFS; j++)
946 if (pdev->gsc[i].dst_buf[j])
947 pdev->alloc_device->free(pdev->alloc_device,
948 pdev->gsc[i].dst_buf[j]);
949 memset(&pdev->gsc[i], 0, sizeof(pdev->gsc[i]));
950 }
951
Greg Hackmannf6f2e542012-07-16 16:10:27 -0700952 if (fb_needed)
953 pdev->bufs.fb_window = first_fb;
954 else
955 pdev->bufs.fb_window = NO_FB_NEEDED;
Greg Hackmann86eb1c62012-05-30 09:25:51 -0700956
Greg Hackmann9130e702012-07-30 14:53:04 -0700957 return 0;
958}
959
Greg Hackmann9130e702012-07-30 14:53:04 -0700960static int exynos5_config_gsc_m2m(hwc_layer_1_t &layer,
961 alloc_device_t* alloc_device, exynos5_gsc_data_t *gsc_data,
962 int gsc_idx)
963{
964 ALOGV("configuring gscaler %u for memory-to-memory", gsc_idx);
965
966 private_handle_t *src_handle = private_handle_t::dynamicCast(layer.handle);
967 buffer_handle_t dst_buf;
968 private_handle_t *dst_handle;
969 int ret = 0;
970
971 exynos_gsc_img src_cfg, dst_cfg;
972 memset(&src_cfg, 0, sizeof(src_cfg));
973 memset(&dst_cfg, 0, sizeof(dst_cfg));
974
975 src_cfg.x = layer.sourceCrop.left;
976 src_cfg.y = layer.sourceCrop.top;
977 src_cfg.w = WIDTH(layer.sourceCrop);
978 src_cfg.fw = src_handle->stride;
979 src_cfg.h = HEIGHT(layer.sourceCrop);
Greg Hackmanneba34a92012-08-14 16:10:05 -0700980 src_cfg.fh = src_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -0700981 src_cfg.yaddr = src_handle->fd;
Greg Hackmann296668e2012-08-14 15:51:40 -0700982 if (exynos5_format_is_ycrcb(src_handle->format)) {
983 src_cfg.uaddr = src_handle->fd2;
984 src_cfg.vaddr = src_handle->fd1;
985 } else {
986 src_cfg.uaddr = src_handle->fd1;
987 src_cfg.vaddr = src_handle->fd2;
988 }
Greg Hackmann9130e702012-07-30 14:53:04 -0700989 src_cfg.format = src_handle->format;
Sanghee Kim7bd58622012-08-08 23:31:10 -0700990 src_cfg.drmMode = !!(src_handle->flags & GRALLOC_USAGE_PROTECTED);
Greg Hackmann9130e702012-07-30 14:53:04 -0700991
992 dst_cfg.x = 0;
993 dst_cfg.y = 0;
994 dst_cfg.w = WIDTH(layer.displayFrame);
995 dst_cfg.h = HEIGHT(layer.displayFrame);
Greg Hackmanna00c0432012-07-31 15:20:00 -0700996 dst_cfg.format = HAL_PIXEL_FORMAT_BGRA_8888;
Greg Hackmann9130e702012-07-30 14:53:04 -0700997 dst_cfg.rot = layer.transform;
Sanghee Kim6c195c52012-08-30 22:59:43 -0700998 dst_cfg.drmMode = src_cfg.drmMode;
Greg Hackmann9130e702012-07-30 14:53:04 -0700999
1000 ALOGV("source configuration:");
1001 dump_gsc_img(src_cfg);
1002
1003 if (gsc_src_cfg_changed(src_cfg, gsc_data->src_cfg) ||
1004 gsc_dst_cfg_changed(dst_cfg, gsc_data->dst_cfg)) {
1005 int dst_stride;
1006 int usage = GRALLOC_USAGE_SW_READ_NEVER |
1007 GRALLOC_USAGE_SW_WRITE_NEVER |
1008 GRALLOC_USAGE_HW_COMPOSER;
Sanghee Kim7bd58622012-08-08 23:31:10 -07001009
1010 if (src_handle->flags & GRALLOC_USAGE_PROTECTED)
1011 usage |= GRALLOC_USAGE_PROTECTED;
Greg Hackmann9130e702012-07-30 14:53:04 -07001012
1013 int w = ALIGN(WIDTH(layer.displayFrame), GSC_W_ALIGNMENT);
1014 int h = ALIGN(HEIGHT(layer.displayFrame), GSC_H_ALIGNMENT);
1015
1016 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1017 if (gsc_data->dst_buf[i]) {
1018 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1019 gsc_data->dst_buf[i] = NULL;
1020 }
1021
1022 int ret = alloc_device->alloc(alloc_device, w, h,
1023 HAL_PIXEL_FORMAT_RGBX_8888, usage, &gsc_data->dst_buf[i],
1024 &dst_stride);
1025 if (ret < 0) {
1026 ALOGE("failed to allocate destination buffer: %s",
1027 strerror(-ret));
1028 goto err_alloc;
1029 }
1030 }
1031
1032 gsc_data->current_buf = 0;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001033 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001034
Greg Hackmann9130e702012-07-30 14:53:04 -07001035 dst_buf = gsc_data->dst_buf[gsc_data->current_buf];
1036 dst_handle = private_handle_t::dynamicCast(dst_buf);
1037
1038 dst_cfg.fw = dst_handle->stride;
Greg Hackmanneba34a92012-08-14 16:10:05 -07001039 dst_cfg.fh = dst_handle->vstride;
Greg Hackmann9130e702012-07-30 14:53:04 -07001040 dst_cfg.yaddr = dst_handle->fd;
1041
1042 ALOGV("destination configuration:");
1043 dump_gsc_img(dst_cfg);
1044
Greg Hackmann2ddbc742012-08-17 15:41:29 -07001045 gsc_data->gsc = exynos_gsc_create_exclusive(AVAILABLE_GSC_UNITS[gsc_idx],
1046 GSC_M2M_MODE, GSC_DUMMY);
Greg Hackmann9130e702012-07-30 14:53:04 -07001047 if (!gsc_data->gsc) {
1048 ALOGE("failed to create gscaler handle");
1049 ret = -1;
1050 goto err_alloc;
1051 }
1052
1053 ret = exynos_gsc_config_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1054 if (ret < 0) {
1055 ALOGE("failed to configure gscaler %u", gsc_idx);
1056 goto err_gsc_config;
1057 }
1058
1059 ret = exynos_gsc_run_exclusive(gsc_data->gsc, &src_cfg, &dst_cfg);
1060 if (ret < 0) {
1061 ALOGE("failed to run gscaler %u", gsc_idx);
1062 goto err_gsc_config;
1063 }
1064
1065 gsc_data->src_cfg = src_cfg;
1066 gsc_data->dst_cfg = dst_cfg;
1067
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001068 return 0;
Greg Hackmann9130e702012-07-30 14:53:04 -07001069
1070err_gsc_config:
1071 exynos_gsc_destroy(gsc_data->gsc);
1072 gsc_data->gsc = NULL;
1073err_alloc:
1074 for (size_t i = 0; i < NUM_GSC_DST_BUFS; i++) {
1075 if (gsc_data->dst_buf[i]) {
1076 alloc_device->free(alloc_device, gsc_data->dst_buf[i]);
1077 gsc_data->dst_buf[i] = NULL;
1078 }
1079 }
Greg Hackmann7dddd2a2012-09-12 15:11:07 -07001080 memset(&gsc_data->src_cfg, 0, sizeof(gsc_data->src_cfg));
1081 memset(&gsc_data->dst_cfg, 0, sizeof(gsc_data->dst_cfg));
Greg Hackmann9130e702012-07-30 14:53:04 -07001082 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001083}
1084
1085static void exynos5_config_handle(private_handle_t *handle,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001086 hwc_rect_t &sourceCrop, hwc_rect_t &displayFrame,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001087 int32_t blending, s3c_fb_win_config &cfg)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001088{
1089 cfg.state = cfg.S3C_FB_WIN_STATE_BUFFER;
1090 cfg.fd = handle->fd;
1091 cfg.x = displayFrame.left;
1092 cfg.y = displayFrame.top;
1093 cfg.w = WIDTH(displayFrame);
1094 cfg.h = HEIGHT(displayFrame);
1095 cfg.format = exynos5_format_to_s3c_format(handle->format);
1096 uint8_t bpp = exynos5_format_to_bpp(handle->format);
1097 cfg.offset = (sourceCrop.top * handle->stride + sourceCrop.left) * bpp / 8;
1098 cfg.stride = handle->stride * bpp / 8;
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001099 cfg.blending = exynos5_blending_to_s3c_blending(blending);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001100}
1101
Erik Gilling87e707e2012-06-29 17:35:13 -07001102static void exynos5_config_overlay(hwc_layer_1_t *layer, s3c_fb_win_config &cfg,
Greg Hackmannd92fe212012-09-11 14:28:41 -07001103 exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001104{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001105 if (layer->compositionType == HWC_BACKGROUND) {
1106 hwc_color_t color = layer->backgroundColor;
1107 cfg.state = cfg.S3C_FB_WIN_STATE_COLOR;
1108 cfg.color = (color.r << 16) | (color.g << 8) | color.b;
1109 cfg.x = 0;
1110 cfg.y = 0;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001111 cfg.w = pdev->xres;
1112 cfg.h = pdev->yres;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001113 return;
1114 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001115
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001116 private_handle_t *handle = private_handle_t::dynamicCast(layer->handle);
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001117 exynos5_config_handle(handle, layer->sourceCrop, layer->displayFrame,
1118 layer->blending, cfg);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001119}
1120
1121static void exynos5_post_callback(void *data, private_handle_t *fb)
1122{
Benoit Goby8bad7e32012-08-16 14:17:14 -07001123 hwc_layer_1_t *hdmi_layer = NULL;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001124 exynos5_hwc_post_data_t *pdata = (exynos5_hwc_post_data_t *)data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001125
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001126 struct s3c_fb_win_config_data win_data;
1127 struct s3c_fb_win_config *config = win_data.config;
1128 memset(config, 0, sizeof(win_data.config));
Greg Hackmann9130e702012-07-30 14:53:04 -07001129
1130 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1131 if ( pdata->overlay_map[i] != -1) {
1132 hwc_layer_1_t &layer = pdata->overlays[i];
1133 private_handle_t *handle =
1134 private_handle_t::dynamicCast(layer.handle);
1135
1136 if (layer.acquireFenceFd != -1) {
1137 int err = sync_wait(layer.acquireFenceFd, 100);
1138 if (err != 0)
1139 ALOGW("fence for layer %zu didn't signal in 100 ms: %s",
1140 i, strerror(errno));
1141 close(layer.acquireFenceFd);
1142 }
1143
1144 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1145 int gsc_idx = pdata->gsc_map[i].idx;
1146 exynos5_config_gsc_m2m(layer, pdata->pdev->alloc_device,
1147 &pdata->pdev->gsc[gsc_idx], gsc_idx);
1148 }
1149 }
1150 }
1151
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001152 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1153 if (i == pdata->fb_window) {
1154 hwc_rect_t rect = { 0, 0, fb->width, fb->height };
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001155 int32_t blending = (i == 0) ? HWC_BLENDING_NONE :
1156 HWC_BLENDING_PREMULT;
1157 exynos5_config_handle(fb, rect, rect, blending, config[i]);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001158 } else if ( pdata->overlay_map[i] != -1) {
Greg Hackmann9130e702012-07-30 14:53:04 -07001159 hwc_layer_1_t &layer = pdata->overlays[i];
1160 private_handle_t *handle =
1161 private_handle_t::dynamicCast(layer.handle);
1162
1163 if (pdata->gsc_map[i].mode == exynos5_gsc_map_t::GSC_M2M) {
1164 int gsc_idx = pdata->gsc_map[i].idx;
1165 exynos5_gsc_data_t &gsc = pdata->pdev->gsc[gsc_idx];
1166
1167 if (!gsc.gsc) {
1168 ALOGE("failed to queue gscaler %u input for layer %u",
1169 gsc_idx, i);
1170 continue;
1171 }
1172
1173 int err = exynos_gsc_stop_exclusive(gsc.gsc);
1174 exynos_gsc_destroy(gsc.gsc);
1175 gsc.gsc = NULL;
1176 if (err < 0) {
1177 ALOGE("failed to dequeue gscaler output for layer %u", i);
1178 continue;
1179 }
1180
1181 buffer_handle_t dst_buf = gsc.dst_buf[gsc.current_buf];
1182 gsc.current_buf = (gsc.current_buf + 1) % NUM_GSC_DST_BUFS;
1183 private_handle_t *dst_handle =
1184 private_handle_t::dynamicCast(dst_buf);
Greg Hackmann90219f32012-08-16 17:28:57 -07001185 hwc_rect_t sourceCrop = { 0, 0,
1186 WIDTH(layer.displayFrame), HEIGHT(layer.displayFrame) };
1187 exynos5_config_handle(dst_handle, sourceCrop,
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001188 layer.displayFrame, layer.blending, config[i]);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001189
1190 if (handle->flags & GRALLOC_USAGE_EXTERNAL_DISP)
1191 hdmi_layer = &layer;
Greg Hackmann9130e702012-07-30 14:53:04 -07001192 }
1193 else {
Greg Hackmannd92fe212012-09-11 14:28:41 -07001194 exynos5_config_overlay(&layer, config[i], pdata->pdev);
Erik Gilling87e707e2012-06-29 17:35:13 -07001195 }
1196 }
Greg Hackmann93cc5e72012-08-03 13:29:33 -07001197 if (i == 0 && config[i].blending != S3C_FB_BLENDING_NONE) {
1198 ALOGV("blending not supported on window 0; forcing BLENDING_NONE");
1199 config[i].blending = S3C_FB_BLENDING_NONE;
1200 }
1201
Greg Hackmann9130e702012-07-30 14:53:04 -07001202 ALOGV("window %u configuration:", i);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001203 dump_config(config[i]);
1204 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001205
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001206 int ret = ioctl(pdata->pdev->fd, S3CFB_WIN_CONFIG, &win_data);
1207 if (ret < 0)
1208 ALOGE("ioctl S3CFB_WIN_CONFIG failed: %d", errno);
Greg Hackmann600867e2012-08-23 12:58:02 -07001209 else {
1210 memcpy(pdata->pdev->last_config, &win_data.config,
1211 sizeof(win_data.config));
1212 memcpy(pdata->pdev->last_gsc_map, pdata->gsc_map,
1213 sizeof(pdata->gsc_map));
1214 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1215 if (i == pdata->fb_window) {
1216 pdata->pdev->last_handles[i] = NULL;
1217 } else if (pdata->overlay_map[i] != -1) {
1218 hwc_layer_1_t &layer = pdata->overlays[i];
1219 pdata->pdev->last_handles[i] = layer.handle;
1220 }
1221 }
1222 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001223
Benoit Goby8bad7e32012-08-16 14:17:14 -07001224 if (pdata->pdev->hdmi_enabled) {
1225 if (hdmi_layer) {
1226 private_handle_t *handle =
1227 private_handle_t::dynamicCast(hdmi_layer->handle);
1228 hdmi_configure_layer(pdata->pdev, *hdmi_layer);
1229 hdmi_output(pdata->pdev, handle);
1230 } else {
1231 hdmi_configure_handle(pdata->pdev, fb);
1232 hdmi_output(pdata->pdev, fb);
1233 }
1234 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001235
Erik Gilling87e707e2012-06-29 17:35:13 -07001236 pthread_mutex_lock(&pdata->completion_lock);
1237 pdata->fence = win_data.fence;
1238 pthread_cond_signal(&pdata->completion);
1239 pthread_mutex_unlock(&pdata->completion_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001240}
1241
Jesse Halle94046d2012-07-31 14:34:08 -07001242static int exynos5_set(struct hwc_composer_device_1 *dev,
1243 size_t numDisplays, hwc_display_contents_1_t** displays)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001244{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001245 exynos5_hwc_composer_device_1_t *pdev =
1246 (exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001247
Jesse Halle94046d2012-07-31 14:34:08 -07001248 if (!numDisplays || !displays || !displays[0] || !displays[0]->dpy || !displays[0]->sur)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001249 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001250
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001251 hwc_callback_queue_t *queue = NULL;
1252 pthread_mutex_t *lock = NULL;
1253 exynos5_hwc_post_data_t *data = NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001254
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001255 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1256 if (pdev->bufs.overlay_map[i] != -1) {
1257 pdev->bufs.overlays[i] =
1258 displays[0]->hwLayers[pdev->bufs.overlay_map[i]];
Erik Gilling87e707e2012-06-29 17:35:13 -07001259 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001260 }
Erik Gilling87e707e2012-06-29 17:35:13 -07001261
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001262 data = (exynos5_hwc_post_data_t *)
1263 malloc(sizeof(exynos5_hwc_post_data_t));
1264 memcpy(data, &pdev->bufs, sizeof(pdev->bufs));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001265
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001266 data->fence = -1;
1267 pthread_mutex_init(&data->completion_lock, NULL);
1268 pthread_cond_init(&data->completion, NULL);
Erik Gilling87e707e2012-06-29 17:35:13 -07001269
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001270 if (displays[0]->numHwLayers && pdev->bufs.fb_window == NO_FB_NEEDED) {
1271 exynos5_post_callback(data, NULL);
1272 } else {
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001273
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001274 struct hwc_callback_entry entry;
1275 entry.callback = exynos5_post_callback;
1276 entry.data = data;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001277
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001278 queue = reinterpret_cast<hwc_callback_queue_t *>(
1279 pdev->gralloc_module->queue);
1280 lock = const_cast<pthread_mutex_t *>(
1281 &pdev->gralloc_module->queue_lock);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001282
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001283 pthread_mutex_lock(lock);
1284 queue->push_front(entry);
1285 pthread_mutex_unlock(lock);
Erik Gilling87e707e2012-06-29 17:35:13 -07001286
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001287 EGLBoolean success = eglSwapBuffers((EGLDisplay)displays[0]->dpy,
1288 (EGLSurface)displays[0]->sur);
1289 if (!success) {
1290 ALOGE("HWC_EGL_ERROR");
1291 if (displays[0]) {
1292 pthread_mutex_lock(lock);
1293 queue->removeAt(0);
1294 pthread_mutex_unlock(lock);
1295 free(data);
Erik Gilling87e707e2012-06-29 17:35:13 -07001296 }
Greg Hackmann0fbe1702012-08-22 11:27:38 -07001297 return HWC_EGL_ERROR;
Erik Gilling87e707e2012-06-29 17:35:13 -07001298 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001299 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001300
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001301
Erik Gilling87e707e2012-06-29 17:35:13 -07001302 pthread_mutex_lock(&data->completion_lock);
1303 while (data->fence == -1)
1304 pthread_cond_wait(&data->completion, &data->completion_lock);
1305 pthread_mutex_unlock(&data->completion_lock);
1306
1307 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1308 if (pdev->bufs.overlay_map[i] != -1) {
1309 int dup_fd = dup(data->fence);
1310 if (dup_fd < 0)
1311 ALOGW("release fence dup failed: %s", strerror(errno));
Jesse Halle94046d2012-07-31 14:34:08 -07001312 displays[0]->hwLayers[pdev->bufs.overlay_map[i]].releaseFenceFd = dup_fd;
Erik Gilling87e707e2012-06-29 17:35:13 -07001313 }
1314 }
1315 close(data->fence);
1316 free(data);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001317 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001318}
1319
Erik Gilling87e707e2012-06-29 17:35:13 -07001320static void exynos5_registerProcs(struct hwc_composer_device_1* dev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001321 hwc_procs_t const* procs)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001322{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001323 struct exynos5_hwc_composer_device_1_t* pdev =
1324 (struct exynos5_hwc_composer_device_1_t*)dev;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001325 pdev->procs = procs;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001326}
1327
Erik Gilling87e707e2012-06-29 17:35:13 -07001328static int exynos5_query(struct hwc_composer_device_1* dev, int what, int *value)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001329{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001330 struct exynos5_hwc_composer_device_1_t *pdev =
1331 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001332
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001333 switch (what) {
1334 case HWC_BACKGROUND_LAYER_SUPPORTED:
1335 // we support the background layer
1336 value[0] = 1;
1337 break;
1338 case HWC_VSYNC_PERIOD:
1339 // vsync period in nanosecond
Greg Hackmannd92fe212012-09-11 14:28:41 -07001340 value[0] = pdev->vsync_period;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001341 break;
1342 default:
1343 // unsupported query
1344 return -EINVAL;
1345 }
1346 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001347}
1348
Jesse Halle94046d2012-07-31 14:34:08 -07001349static int exynos5_eventControl(struct hwc_composer_device_1 *dev, int dpy,
1350 int event, int enabled)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001351{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001352 struct exynos5_hwc_composer_device_1_t *pdev =
1353 (struct exynos5_hwc_composer_device_1_t *)dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001354
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001355 switch (event) {
1356 case HWC_EVENT_VSYNC:
1357 __u32 val = !!enabled;
1358 int err = ioctl(pdev->fd, S3CFB_SET_VSYNC_INT, &val);
1359 if (err < 0) {
1360 ALOGE("vsync ioctl failed");
1361 return -errno;
1362 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001363
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001364 return 0;
1365 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001366
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001367 return -EINVAL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001368}
1369
Benoit Gobycdd61b32012-07-09 12:09:59 -07001370static void handle_hdmi_uevent(struct exynos5_hwc_composer_device_1_t *pdev,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001371 const char *buff, int len)
Benoit Gobycdd61b32012-07-09 12:09:59 -07001372{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001373 const char *s = buff;
1374 s += strlen(s) + 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001375
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001376 while (*s) {
1377 if (!strncmp(s, "SWITCH_STATE=", strlen("SWITCH_STATE=")))
1378 pdev->hdmi_hpd = atoi(s + strlen("SWITCH_STATE=")) == 1;
Benoit Gobycdd61b32012-07-09 12:09:59 -07001379
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001380 s += strlen(s) + 1;
1381 if (s - buff >= len)
1382 break;
1383 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001384
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001385 if (pdev->hdmi_hpd) {
1386 if (hdmi_get_config(pdev)) {
1387 ALOGE("Error reading HDMI configuration");
1388 pdev->hdmi_hpd = false;
1389 return;
1390 }
1391 }
1392
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001393 ALOGV("HDMI HPD changed to %s", pdev->hdmi_hpd ? "enabled" : "disabled");
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001394 if (pdev->hdmi_hpd)
Benoit Goby8bad7e32012-08-16 14:17:14 -07001395 ALOGI("HDMI Resolution changed to %dx%d", pdev->hdmi_h, pdev->hdmi_w);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001396
Jesse Hallda5a71d2012-08-21 12:12:55 -07001397 /* hwc_dev->procs is set right after the device is opened, but there is
1398 * still a race condition where a hotplug event might occur after the open
1399 * but before the procs are registered. */
1400 if (pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001401 pdev->procs->invalidate(pdev->procs);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001402}
1403
Greg Hackmann29724852012-07-23 15:31:10 -07001404static void handle_vsync_event(struct exynos5_hwc_composer_device_1_t *pdev)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001405{
Jesse Hallda5a71d2012-08-21 12:12:55 -07001406 if (!pdev->procs)
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001407 return;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001408
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001409 int err = lseek(pdev->vsync_fd, 0, SEEK_SET);
1410 if (err < 0) {
1411 ALOGE("error seeking to vsync timestamp: %s", strerror(errno));
1412 return;
1413 }
1414
Greg Hackmann29724852012-07-23 15:31:10 -07001415 char buf[4096];
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001416 err = read(pdev->vsync_fd, buf, sizeof(buf));
Greg Hackmann29724852012-07-23 15:31:10 -07001417 if (err < 0) {
1418 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1419 return;
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001420 }
Greg Hackmann29724852012-07-23 15:31:10 -07001421 buf[sizeof(buf) - 1] = '\0';
Greg Hackmann3464b1d2012-07-24 09:46:23 -07001422
Greg Hackmann29724852012-07-23 15:31:10 -07001423 errno = 0;
1424 uint64_t timestamp = strtoull(buf, NULL, 0);
1425 if (!errno)
1426 pdev->procs->vsync(pdev->procs, 0, timestamp);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001427}
1428
1429static void *hwc_vsync_thread(void *data)
1430{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001431 struct exynos5_hwc_composer_device_1_t *pdev =
1432 (struct exynos5_hwc_composer_device_1_t *)data;
1433 char uevent_desc[4096];
1434 memset(uevent_desc, 0, sizeof(uevent_desc));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001435
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001436 setpriority(PRIO_PROCESS, 0, HAL_PRIORITY_URGENT_DISPLAY);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001437
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001438 uevent_init();
Greg Hackmann29724852012-07-23 15:31:10 -07001439
Greg Hackmannfbeb8532012-07-26 14:21:16 -07001440 char temp[4096];
1441 int err = read(pdev->vsync_fd, temp, sizeof(temp));
1442 if (err < 0) {
1443 ALOGE("error reading vsync timestamp: %s", strerror(errno));
1444 return NULL;
1445 }
1446
Greg Hackmann29724852012-07-23 15:31:10 -07001447 struct pollfd fds[2];
1448 fds[0].fd = pdev->vsync_fd;
1449 fds[0].events = POLLPRI;
1450 fds[1].fd = uevent_get_fd();
1451 fds[1].events = POLLIN;
1452
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001453 while (true) {
Greg Hackmann29724852012-07-23 15:31:10 -07001454 int err = poll(fds, 2, -1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001455
Greg Hackmann29724852012-07-23 15:31:10 -07001456 if (err > 0) {
1457 if (fds[0].revents & POLLPRI) {
1458 handle_vsync_event(pdev);
1459 }
1460 else if (fds[1].revents & POLLIN) {
1461 int len = uevent_next_event(uevent_desc,
1462 sizeof(uevent_desc) - 2);
Benoit Gobycdd61b32012-07-09 12:09:59 -07001463
Greg Hackmann29724852012-07-23 15:31:10 -07001464 bool hdmi = !strcmp(uevent_desc,
1465 "change@/devices/virtual/switch/hdmi");
1466 if (hdmi)
1467 handle_hdmi_uevent(pdev, uevent_desc, len);
1468 }
1469 }
1470 else if (err == -1) {
1471 if (errno == EINTR)
1472 break;
1473 ALOGE("error in vsync thread: %s", strerror(errno));
1474 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001475 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001476
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001477 return NULL;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001478}
1479
Jesse Halle94046d2012-07-31 14:34:08 -07001480static int exynos5_blank(struct hwc_composer_device_1 *dev, int dpy, int blank)
Colin Cross00359a82012-07-12 17:54:17 -07001481{
1482 struct exynos5_hwc_composer_device_1_t *pdev =
1483 (struct exynos5_hwc_composer_device_1_t *)dev;
1484
1485 int fb_blank = blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK;
1486 int err = ioctl(pdev->fd, FBIOBLANK, fb_blank);
1487 if (err < 0) {
1488 ALOGE("%sblank ioctl failed", blank ? "" : "un");
1489 return -errno;
1490 }
1491
Benoit Gobyad4e3582012-08-30 17:17:34 -07001492 if (pdev->hdmi_hpd) {
1493 if (blank && !pdev->hdmi_blanked)
1494 hdmi_disable(pdev);
1495 pdev->hdmi_blanked = !!blank;
1496 }
1497
Colin Cross00359a82012-07-12 17:54:17 -07001498 return 0;
1499}
1500
Greg Hackmann600867e2012-08-23 12:58:02 -07001501static void exynos5_dump(hwc_composer_device_1* dev, char *buff, int buff_len)
1502{
1503 if (buff_len <= 0)
1504 return;
1505
1506 struct exynos5_hwc_composer_device_1_t *pdev =
1507 (struct exynos5_hwc_composer_device_1_t *)dev;
1508
1509 android::String8 result;
1510
Benoit Goby8bad7e32012-08-16 14:17:14 -07001511 result.appendFormat(" hdmi_enabled=%u\n", pdev->hdmi_enabled);
1512 if (pdev->hdmi_enabled)
1513 result.appendFormat(" w=%u, h=%u\n", pdev->hdmi_w, pdev->hdmi_h);
Greg Hackmann600867e2012-08-23 12:58:02 -07001514 result.append(
1515 " type | handle | color | blend | format | position | size | gsc \n"
1516 "----------+----------|----------+-------+--------+---------------+---------------------\n");
1517 // 8_______ | 8_______ | 8_______ | 5____ | 6_____ | [5____,5____] | [5____,5____] | 3__ \n"
1518
1519 for (size_t i = 0; i < NUM_HW_WINDOWS; i++) {
1520 struct s3c_fb_win_config &config = pdev->last_config[i];
1521 if (config.state == config.S3C_FB_WIN_STATE_DISABLED) {
1522 result.appendFormat(" %8s | %8s | %8s | %5s | %6s | %13s | %13s",
1523 "DISABLED", "-", "-", "-", "-", "-", "-");
1524 }
1525 else {
1526 if (config.state == config.S3C_FB_WIN_STATE_COLOR)
1527 result.appendFormat(" %8s | %8s | %8x | %5s | %6s", "COLOR",
1528 "-", config.color, "-", "-");
1529 else {
1530 if (pdev->last_handles[i])
1531 result.appendFormat(" %8s | %8x", "OVERLAY", intptr_t(pdev->last_handles[i]));
1532 else
1533 result.appendFormat(" %8s | %8s", "FB", "-");
1534
1535 result.appendFormat(" | %8s | %5x | %6x", "-", config.blending,
1536 config.format);
1537 }
1538
1539 result.appendFormat(" | [%5d,%5d] | [%5u,%5u]", config.x, config.y,
1540 config.w, config.h);
1541 }
1542 if (pdev->last_gsc_map[i].mode == exynos5_gsc_map_t::GSC_NONE)
1543 result.appendFormat(" | %3s", "-");
1544 else
1545 result.appendFormat(" | %3d",
1546 AVAILABLE_GSC_UNITS[pdev->last_gsc_map[i].idx]);
1547 result.append("\n");
1548 }
1549
1550 strlcpy(buff, result.string(), buff_len);
1551}
1552
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001553static int exynos5_close(hw_device_t* device);
1554
1555static int exynos5_open(const struct hw_module_t *module, const char *name,
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001556 struct hw_device_t **device)
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001557{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001558 int ret;
Greg Hackmannd92fe212012-09-11 14:28:41 -07001559 int refreshRate;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001560 int sw_fd;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001561
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001562 if (strcmp(name, HWC_HARDWARE_COMPOSER)) {
1563 return -EINVAL;
1564 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001565
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001566 struct exynos5_hwc_composer_device_1_t *dev;
1567 dev = (struct exynos5_hwc_composer_device_1_t *)malloc(sizeof(*dev));
1568 memset(dev, 0, sizeof(*dev));
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001569
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001570 if (hw_get_module(GRALLOC_HARDWARE_MODULE_ID,
1571 (const struct hw_module_t **)&dev->gralloc_module)) {
1572 ALOGE("failed to get gralloc hw module");
1573 ret = -EINVAL;
1574 goto err_get_module;
1575 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001576
Greg Hackmann9130e702012-07-30 14:53:04 -07001577 if (gralloc_open((const hw_module_t *)dev->gralloc_module,
1578 &dev->alloc_device)) {
1579 ALOGE("failed to open gralloc");
1580 ret = -EINVAL;
1581 goto err_get_module;
1582 }
1583
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001584 dev->fd = open("/dev/graphics/fb0", O_RDWR);
1585 if (dev->fd < 0) {
1586 ALOGE("failed to open framebuffer");
1587 ret = dev->fd;
Greg Hackmann9130e702012-07-30 14:53:04 -07001588 goto err_open_fb;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001589 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001590
Greg Hackmannd92fe212012-09-11 14:28:41 -07001591 struct fb_var_screeninfo info;
1592 if (ioctl(dev->fd, FBIOGET_VSCREENINFO, &info) == -1) {
1593 ALOGE("FBIOGET_VSCREENINFO ioctl failed: %s", strerror(errno));
1594 ret = -errno;
1595 goto err_ioctl;
1596 }
1597
1598 refreshRate = 1000000000000LLU /
1599 (
1600 uint64_t( info.upper_margin + info.lower_margin + info.yres )
1601 * ( info.left_margin + info.right_margin + info.xres )
1602 * info.pixclock
1603 );
1604
1605 if (refreshRate == 0) {
1606 ALOGW("invalid refresh rate, assuming 60 Hz");
1607 refreshRate = 60;
1608 }
1609
1610 dev->xres = info.xres;
1611 dev->yres = info.yres;
1612 dev->xdpi = 1000 * (info.xres * 25.4f) / info.width;
1613 dev->ydpi = 1000 * (info.yres * 25.4f) / info.height;
1614 dev->vsync_period = 1000000000 / refreshRate;
1615
1616 ALOGV("using\n"
1617 "xres = %d px\n"
1618 "yres = %d px\n"
1619 "width = %d mm (%f dpi)\n"
1620 "height = %d mm (%f dpi)\n"
1621 "refresh rate = %d Hz\n",
1622 dev->xres, dev->yres, info.width, dev->xdpi / 1000.0,
1623 info.height, dev->ydpi / 1000.0, refreshRate);
1624
Benoit Goby8bad7e32012-08-16 14:17:14 -07001625 dev->hdmi_mixer0 = open("/dev/v4l-subdev7", O_RDWR);
1626 if (dev->hdmi_layer0 < 0) {
1627 ALOGE("failed to open hdmi mixer0 subdev");
1628 ret = dev->hdmi_layer0;
Benoit Gobyd6bb7ce2012-08-09 16:11:22 -07001629 goto err_ioctl;
1630 }
1631
Benoit Goby8bad7e32012-08-16 14:17:14 -07001632 dev->hdmi_layer0 = open("/dev/video16", O_RDWR);
1633 if (dev->hdmi_layer0 < 0) {
1634 ALOGE("failed to open hdmi layer0 device");
1635 ret = dev->hdmi_layer0;
1636 goto err_mixer0;
1637 }
1638
1639 dev->hdmi_layer1 = open("/dev/video17", O_RDWR);
1640 if (dev->hdmi_layer1 < 0) {
1641 ALOGE("failed to open hdmi layer1 device");
1642 ret = dev->hdmi_layer1;
1643 goto err_hdmi0;
1644 }
1645
Greg Hackmann29724852012-07-23 15:31:10 -07001646 dev->vsync_fd = open("/sys/devices/platform/exynos5-fb.1/vsync", O_RDONLY);
1647 if (dev->vsync_fd < 0) {
1648 ALOGE("failed to open vsync attribute");
1649 ret = dev->vsync_fd;
Benoit Goby8bad7e32012-08-16 14:17:14 -07001650 goto err_hdmi1;
Greg Hackmann29724852012-07-23 15:31:10 -07001651 }
1652
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001653 sw_fd = open("/sys/class/switch/hdmi/state", O_RDONLY);
1654 if (sw_fd) {
1655 char val;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001656 if (read(sw_fd, &val, 1) == 1 && val == '1') {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001657 dev->hdmi_hpd = true;
Benoit Goby4e0f1682012-08-30 17:42:41 -07001658 if (hdmi_get_config(dev)) {
1659 ALOGE("Error reading HDMI configuration");
1660 dev->hdmi_hpd = false;
1661 }
1662 }
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001663 }
Benoit Gobycdd61b32012-07-09 12:09:59 -07001664
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001665 dev->base.common.tag = HARDWARE_DEVICE_TAG;
1666 dev->base.common.version = HWC_DEVICE_API_VERSION_1_0;
1667 dev->base.common.module = const_cast<hw_module_t *>(module);
1668 dev->base.common.close = exynos5_close;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001669
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001670 dev->base.prepare = exynos5_prepare;
1671 dev->base.set = exynos5_set;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001672 dev->base.eventControl = exynos5_eventControl;
1673 dev->base.blank = exynos5_blank;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001674 dev->base.query = exynos5_query;
Jesse Hallda5a71d2012-08-21 12:12:55 -07001675 dev->base.registerProcs = exynos5_registerProcs;
Greg Hackmann600867e2012-08-23 12:58:02 -07001676 dev->base.dump = exynos5_dump;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001677
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001678 dev->bufs.pdev = dev;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001679
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001680 *device = &dev->base.common;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001681
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001682 ret = pthread_create(&dev->vsync_thread, NULL, hwc_vsync_thread, dev);
1683 if (ret) {
1684 ALOGE("failed to start vsync thread: %s", strerror(ret));
1685 ret = -ret;
Greg Hackmann29724852012-07-23 15:31:10 -07001686 goto err_vsync;
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001687 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001688
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001689 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001690
Greg Hackmann29724852012-07-23 15:31:10 -07001691err_vsync:
1692 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001693err_mixer0:
1694 close(dev->hdmi_mixer0);
1695err_hdmi1:
1696 close(dev->hdmi_layer0);
1697err_hdmi0:
1698 close(dev->hdmi_layer1);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001699err_ioctl:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001700 close(dev->fd);
Greg Hackmann9130e702012-07-30 14:53:04 -07001701err_open_fb:
1702 gralloc_close(dev->alloc_device);
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001703err_get_module:
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001704 free(dev);
1705 return ret;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001706}
1707
1708static int exynos5_close(hw_device_t *device)
1709{
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001710 struct exynos5_hwc_composer_device_1_t *dev =
1711 (struct exynos5_hwc_composer_device_1_t *)device;
Greg Hackmann29724852012-07-23 15:31:10 -07001712 pthread_kill(dev->vsync_thread, SIGTERM);
1713 pthread_join(dev->vsync_thread, NULL);
Greg Hackmann9130e702012-07-30 14:53:04 -07001714 for (size_t i = 0; i < NUM_GSC_UNITS; i++) {
1715 if (dev->gsc[i].gsc)
1716 exynos_gsc_destroy(dev->gsc[i].gsc);
1717 for (size_t j = 0; i < NUM_GSC_DST_BUFS; j++)
1718 if (dev->gsc[i].dst_buf[j])
1719 dev->alloc_device->free(dev->alloc_device, dev->gsc[i].dst_buf[j]);
1720 }
1721 gralloc_close(dev->alloc_device);
Greg Hackmann29724852012-07-23 15:31:10 -07001722 close(dev->vsync_fd);
Benoit Goby8bad7e32012-08-16 14:17:14 -07001723 close(dev->hdmi_mixer0);
1724 close(dev->hdmi_layer0);
1725 close(dev->hdmi_layer1);
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001726 close(dev->fd);
1727 return 0;
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001728}
1729
1730static struct hw_module_methods_t exynos5_hwc_module_methods = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001731 open: exynos5_open,
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001732};
1733
1734hwc_module_t HAL_MODULE_INFO_SYM = {
Greg Hackmannf6f2e542012-07-16 16:10:27 -07001735 common: {
1736 tag: HARDWARE_MODULE_TAG,
1737 module_api_version: HWC_MODULE_API_VERSION_0_1,
1738 hal_api_version: HARDWARE_HAL_API_VERSION,
1739 id: HWC_HARDWARE_MODULE_ID,
1740 name: "Samsung exynos5 hwcomposer module",
1741 author: "Google",
1742 methods: &exynos5_hwc_module_methods,
1743 }
Greg Hackmann86eb1c62012-05-30 09:25:51 -07001744};