target: msm8996: Add addresses and clocks for secondary USB port
In SBC8096, secondary Port will be used for fastboot use cases.
We need secondary port controller and PHY addresses
to configure the right PHY for successful
USB enumeration.
Add secondary Port addresses define,
clocks lookup table and clock init sequence.
Change-Id: I4c9de8ea484bc2419c7a31a33d569774f9ed552e
diff --git a/platform/msm8996/acpuclock.c b/platform/msm8996/acpuclock.c
index 7ed7ff6..5d2e7eb 100644
--- a/platform/msm8996/acpuclock.c
+++ b/platform/msm8996/acpuclock.c
@@ -208,6 +208,40 @@
writel(reg, GCC_USB30_GDSCR);
}
+/* enables usb20 clocks */
+void clock_usb20_init(void)
+{
+ int ret;
+
+ ret = clk_get_set_enable("usb20_noc_usb20_clk", 0, true);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set usb20_noc_clk. ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("usb20_master_clk", 120000000, true);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set usb20_master_clk. ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("usb20_mock_utmi_clk", 60000000, true);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set usb20_mock_utmi_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+
+ ret = clk_get_set_enable("usb20_sleep_clk", 0, true);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to set usb2_sleep_clk ret = %d\n", ret);
+ ASSERT(0);
+ }
+}
+
/* enables usb30 clocks */
void clock_usb30_init(void)
{