target: msm8996: Add addresses and clocks for secondary USB port
In SBC8096, secondary Port will be used for fastboot use cases.
We need secondary port controller and PHY addresses
to configure the right PHY for successful
USB enumeration.
Add secondary Port addresses define,
clocks lookup table and clock init sequence.
Change-Id: I4c9de8ea484bc2419c7a31a33d569774f9ed552e
diff --git a/platform/msm8996/msm8996-clock.c b/platform/msm8996/msm8996-clock.c
index 782a624..8a02900 100644
--- a/platform/msm8996/msm8996-clock.c
+++ b/platform/msm8996/msm8996-clock.c
@@ -335,6 +335,16 @@
},
};
+static struct branch_clk gcc_periph_noc_usb20_ahb_clk = {
+ .cbcr_reg = (uint32_t *) PERIPH_NOC_USB20_AHB_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "periph_noc_usb20_ahb_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct clk_freq_tbl ftbl_gcc_usb30_master_clk[] = {
F( 19200000, cxo, 1, 0, 0),
F( 120000000, gpll0, 5, 0, 0),
@@ -342,6 +352,13 @@
F_END
};
+static struct clk_freq_tbl ftbl_gcc_usb20_master_clk[] = {
+ F( 19200000, cxo, 1, 0, 0),
+ F( 120000000, gpll0, 5, 0, 0),
+ F( 150000000, gpll0, 4, 0, 0),
+ F_END
+};
+
static struct rcg_clk usb30_master_clk_src = {
.cmd_reg = (uint32_t *) USB30_MASTER_CMD_RCGR,
.cfg_reg = (uint32_t *) USB30_MASTER_CFG_RCGR,
@@ -359,6 +376,23 @@
},
};
+static struct rcg_clk usb20_master_clk_src = {
+ .cmd_reg = (uint32_t *) USB20_MASTER_CMD_RCGR,
+ .cfg_reg = (uint32_t *) USB20_MASTER_CFG_RCGR,
+ .m_reg = (uint32_t *) USB20_MASTER_M,
+ .n_reg = (uint32_t *) USB20_MASTER_N,
+ .d_reg = (uint32_t *) USB20_MASTER_D,
+
+ .set_rate = clock_lib2_rcg_set_rate_mnd,
+ .freq_tbl = ftbl_gcc_usb20_master_clk,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "usb20_master_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
static struct branch_clk gcc_usb30_master_clk = {
.cbcr_reg = (uint32_t *) USB30_MASTER_CBCR,
.bcr_reg = (uint32_t *) USB_30_BCR,
@@ -370,6 +404,17 @@
},
};
+static struct branch_clk gcc_usb20_master_clk = {
+ .cbcr_reg = (uint32_t *) USB20_MASTER_CBCR,
+ .bcr_reg = (uint32_t *) USB_20_BCR,
+ .parent = &usb20_master_clk_src.c,
+
+ .c = {
+ .dbg_name = "usb20_master_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct branch_clk gcc_aggre2_usb3_axi_clk = {
.cbcr_reg = (uint32_t *) GCC_AGGRE2_USB3_AXI_CBCR,
.parent = &usb30_master_clk_src.c,
@@ -385,6 +430,11 @@
F_END
};
+static struct clk_freq_tbl ftbl_gcc_usb20_mock_utmi_clk_src[] = {
+ F( 60000000, gpll0, 10, 0, 0),
+ F_END
+};
+
static struct rcg_clk usb30_mock_utmi_clk_src = {
.cmd_reg = (uint32_t *) USB30_MOCK_UTMI_CMD_RCGR,
.cfg_reg = (uint32_t *) USB30_MOCK_UTMI_CFG_RCGR,
@@ -398,6 +448,19 @@
},
};
+static struct rcg_clk usb20_mock_utmi_clk_src = {
+ .cmd_reg = (uint32_t *) USB20_MOCK_UTMI_CMD_RCGR,
+ .cfg_reg = (uint32_t *) USB20_MOCK_UTMI_CFG_RCGR,
+ .set_rate = clock_lib2_rcg_set_rate_hid,
+ .freq_tbl = ftbl_gcc_usb20_mock_utmi_clk_src,
+ .current_freq = &rcg_dummy_freq,
+
+ .c = {
+ .dbg_name = "usb20_mock_utmi_clk_src",
+ .ops = &clk_ops_rcg,
+ },
+};
+
static struct branch_clk gcc_usb30_mock_utmi_clk = {
.cbcr_reg = (uint32_t *) USB30_MOCK_UTMI_CBCR,
.has_sibling = 0,
@@ -409,6 +472,18 @@
},
};
+static struct branch_clk gcc_usb20_mock_utmi_clk = {
+ .cbcr_reg = (uint32_t *) USB20_MOCK_UTMI_CBCR,
+ .has_sibling = 0,
+ .parent = &usb20_mock_utmi_clk_src.c,
+
+ .c = {
+ .dbg_name = "usb20_mock_utmi_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+
static struct branch_clk gcc_usb30_sleep_clk = {
.cbcr_reg = (uint32_t *) USB30_SLEEP_CBCR,
.has_sibling = 1,
@@ -419,6 +494,16 @@
},
};
+static struct branch_clk gcc_usb20_sleep_clk = {
+ .cbcr_reg = (uint32_t *) USB20_SLEEP_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "usb20_sleep_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
static struct clk_freq_tbl ftbl_gcc_usb30_phy_aux_clk_src[] = {
F( 1200000, cxo, 16, 0, 0),
F_END
@@ -750,6 +835,12 @@
CLK_LOOKUP("usb_phy_cfg_ahb2phy_clk", gcc_usb_phy_cfg_ahb2phy_clk.c),
+ /* USB20 clocks */
+ CLK_LOOKUP("usb20_noc_usb20_clk", gcc_periph_noc_usb20_ahb_clk.c),
+ CLK_LOOKUP("usb20_master_clk", gcc_usb20_master_clk.c),
+ CLK_LOOKUP("usb20_mock_utmi_clk", gcc_usb20_mock_utmi_clk.c),
+ CLK_LOOKUP("usb20_sleep_clk", gcc_usb20_sleep_clk.c),
+
/* mdss clocks */
CLK_LOOKUP("mdss_mdp_clk", mdss_mdp_clk.c),
CLK_LOOKUP("mdss_vsync_clk", mdss_vsync_clk.c),