diff --git a/platform/integrator/debug.c b/platform/integrator/debug.c
new file mode 100644
index 0000000..ab9f901
--- /dev/null
+++ b/platform/integrator/debug.c
@@ -0,0 +1,146 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <stdarg.h>
+#include <reg.h>
+#include <debug.h>
+#include <printf.h>
+#include <kernel/thread.h>
+#include <platform/debug.h>
+#include <arch/ops.h>
+#include <platform/integrator.h>
+
+static void write_uart_reg(int uart, int reg, unsigned char data)
+{
+	unsigned long base;
+	int mul = 4;
+
+	switch(uart) {
+		case 0: base = INTEGRATOR_UART0_REG_BASE; break;
+		case 1: base = INTEGRATOR_UART1_REG_BASE; break;
+		default: return;
+	}
+
+	*(volatile unsigned char *)(base + reg * mul) = data;
+}
+
+static unsigned char read_uart_reg(int uart, int reg)
+{
+	unsigned long base;
+	int mul = 4;
+
+	switch(uart) {
+		case 0: base = INTEGRATOR_UART0_REG_BASE; break;
+		case 1: base = INTEGRATOR_UART1_REG_BASE; break;
+		default: return 0;
+	}
+
+	return *(volatile unsigned char *)(base + reg * mul);
+}
+
+static int uart_init(void)
+{
+#if 0
+	/* clear the tx & rx fifo and disable */
+	write_uart_reg(0, UART_FCR, 0x6);
+#endif
+
+	return 0;
+}
+
+static int uart_putc(int port, char c )
+{
+	write_uart_reg(0, PL011_UARTDR, c);
+#if 0
+	while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the shift register to empty
+		;
+  	write_uart_reg(port, UART_THR, c);
+#endif
+	return 0;
+}
+
+static int uart_getc(int port, bool wait)  /* returns -1 if no data available */
+{
+#if 0
+	if (wait) {
+		while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo
+			;
+	} else {
+		if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
+			return -1;
+	}
+	return read_uart_reg(port, UART_RHR);
+#endif
+	return -1;
+}
+
+void dputc(char c)
+{
+	uart_putc(0, c);
+}
+
+int dgetc(char *c)
+{
+	int result = uart_getc(0, false);
+
+	if (result < 0)
+		return -1;
+
+	*c = result;
+	return 0;
+}
+
+void debug_dump_regs(void)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+void debug_halt(void)
+{
+	dprintf("HALT: spinning forever...\n");
+	for(;;);
+}
+
+void debug_dump_memory_bytes(void *mem, int len)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+void debug_dump_memory_halfwords(void *mem, int len)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+void debug_dump_memory_words(void *mem, int len)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+void debug_set_trace_level(int trace_type, int level)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+uint32_t debug_cycle_count()
+{
+	PANIC_UNIMPLEMENTED;
+}
diff --git a/platform/integrator/include/platform/integrator.h b/platform/integrator/include/platform/integrator.h
new file mode 100644
index 0000000..47eaacb
--- /dev/null
+++ b/platform/integrator/include/platform/integrator.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __INTEGRATOR_H
+#define __INTEGRATOR_H
+
+/* memory map */
+#define SDRAM_BASE	0x00000000
+
+#define INTEGRATOR_CORE_REG_BASE  0x10000000
+#define INTEGRATOR_SYS_REG_BASE   0x11000000
+#define INTEGRATOR_EBI_REG_BASE   0x12000000
+#define INTEGRATOR_TIMER_REG_BASE 0x13000000
+#define INTEGRATOR_INT_REG_BASE   0x14000000
+#define INTEGRATOR_UART0_REG_BASE 0x16000000
+#define INTEGRATOR_UART1_REG_BASE 0x17000000
+#define INTEGRATOR_LEDS_REG_BASE  0x1a000000
+#define INTEGRATOR_GPIO_REG_BASE  0x1b000000
+
+/* uart stuff */
+#define PL011_UARTDR (0)
+#define PL011_UARTRSR (1)
+#define PL011_UARTECR (1)
+#define PL011_UARTFR (6)
+#define PL011_UARTILPR (8)
+#define PL011_UARTIBRD (9)
+#define PL011_UARTFBRD (10)
+#define PL011_UARTLCR_H (11)
+#define PL011_UARTCR (12)
+#define PL011_UARTIFLS (13)
+#define PL011_UARTIMSC (14)
+#define PL011_UARTTRIS (15)
+#define PL011_UARTTMIS (16)
+#define PL011_UARTICR (17)
+#define PL011_UARTMACR (18)
+
+#define INT_VECTORS 32 // XXX just made this up
+
+#endif
+
diff --git a/platform/integrator/interrupts.c b/platform/integrator/interrupts.c
new file mode 100644
index 0000000..ef5f221
--- /dev/null
+++ b/platform/integrator/interrupts.c
@@ -0,0 +1,238 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <err.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <reg.h>
+#include <kernel/thread.h>
+#include <platform/interrupts.h>
+#include <arch/ops.h>
+#include <arch/arm.h>
+#include "platform_p.h"
+#include <platform/integrator.h>
+
+struct int_handler_struct {
+	int_handler handler;
+	void *arg;
+};
+
+static struct int_handler_struct int_handler_table[INT_VECTORS];
+
+#if 0
+static const uint32_t icBase[5] = {
+	INTCON0_BASE, INTCON1_BASE, INTCON2_BASE, INTCON3_BASE, INTCON4_BASE };
+
+/* a bitmap of the level triggered interrupt vectors */
+static uint32_t level_trigger[5] = {
+	0xb3fefe8f,	// level 1 0-31
+	0xfdb3c1fd,	// level 2 0-31
+	0xfffff7ff, // level 2 32-63
+	0xbfffffff, // level 2 64-95
+	0xffffffff // level 2 96-128
+};
+
+inline volatile uint32_t *ICReg(uint controller, uint reg)
+{
+	return (volatile uint32_t *)(icBase[controller] + reg);
+}
+
+inline uint32_t readICReg(uint controller, uint reg)
+{
+	return *ICReg(controller, reg);
+}
+inline void writeICReg(uint controller, uint reg, uint val)
+{
+	*ICReg(controller, reg) = val;
+}
+
+inline uint vectorToController(uint vector)
+{
+	return vector / 32;
+}
+#endif
+
+void platform_init_interrupts(void)
+{
+#if 0
+	unsigned int i;
+
+	// mask all interrupts
+	*ICReg(0, INTCON_MIR) = 0xfffffffa;
+	*ICReg(1, INTCON_MIR) = 0xffffffff;
+	*ICReg(2, INTCON_MIR) = 0xffffffff;
+	*ICReg(3, INTCON_MIR) = 0xffffffff;
+	*ICReg(4, INTCON_MIR) = 0xffffffff;
+
+	// set up each of the interrupts
+	for (i = 0; i < INT_VECTORS; i++) {
+		// set each vector up as high priority, IRQ, and default edge/level sensitivity
+		*ICReg(i / 32, INTCON_ILR_BASE + 4*(i%32)) = ((level_trigger[i/32] & (1<<(i%32))) ? (1<<1) : (0<<1)) | 0;
+	}
+
+	// clear any pending interrupts
+	*ICReg(0, INTCON_ITR) = 0;
+	*ICReg(1, INTCON_ITR) = 0;
+	*ICReg(2, INTCON_ITR) = 0;
+	*ICReg(3, INTCON_ITR) = 0;
+	*ICReg(4, INTCON_ITR) = 0;
+
+	// globally unmask interrupts
+	*ICReg(1, INTCON_CONTROL) = 3;
+	*ICReg(0, INTCON_CONTROL) = 3;
+	*ICReg(0, INTCON_GMR) = 0;
+
+	dprintf("end of platform_init_interrupts\n");
+
+#if 0
+	arch_enable_ints();
+
+	dprintf("&ITR0 0x%x\n", (uint32_t)ICReg(0, INTCON_ITR));
+
+	dprintf("ITR0 0x%x\n", *ICReg(0, INTCON_ITR));
+	dprintf("MIR0 0x%x\n", *ICReg(0, INTCON_MIR));
+	dprintf("SIR_IRQ0 0x%x\n", *ICReg(0, INTCON_SIR_IRQ));
+
+	*ICReg(0, INTCON_ILR_BASE + 4*7) = 0;
+	*ICReg(0, INTCON_MIR) &= ~0x80;
+
+	dprintf("triggering int\n");
+	
+	*ICReg(0, INTCON_SISR) = 0x80;
+
+	dprintf("ITR0 0x%x\n", *ICReg(0, INTCON_ITR));
+	dprintf("MIR0 0x%x\n", *ICReg(0, INTCON_MIR));
+	dprintf("SIR_IRQ0 0x%x\n", *ICReg(0, INTCON_SIR_IRQ));
+
+	for(;;);
+#endif
+#endif
+}
+
+status_t mask_interrupt(unsigned int vector, bool *oldstate)
+{
+#if 0
+	if (vector >= INT_VECTORS)
+		return ERR_INVALID_ARGS;
+
+//	dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
+
+	enter_critical_section();
+
+	if (oldstate)
+		*oldstate = false;
+
+	volatile uint32_t *mir = ICReg(vectorToController(vector), INTCON_MIR);
+	*mir = *mir | (1<<(vector % 32));
+
+	exit_critical_section();
+#endif
+
+	return NO_ERROR;
+}
+
+status_t unmask_interrupt(unsigned int vector, bool *oldstate)
+{
+#if 0
+	if (vector >= INT_VECTORS)
+		return ERR_INVALID_ARGS;
+
+//	dprintf("%s: vector %d\n", __PRETTY_FUNCTION__, vector);
+
+	enter_critical_section();
+
+	if (oldstate)
+		*oldstate = false;
+
+	volatile uint32_t *mir = ICReg(vectorToController(vector), INTCON_MIR);
+	*mir = *mir & ~(1<<(vector % 32));
+
+	exit_critical_section();
+#endif
+
+	return NO_ERROR;
+}
+
+void platform_irq(struct arm_iframe *frame)
+{
+	PANIC_UNIMPLEMENTED;
+#if 0
+	// get the current vector
+	unsigned int vector;
+   
+	inc_critical_section();
+
+	// read from the first level int handler
+	vector = *ICReg(0, INTCON_SIR_IRQ);
+	
+	// see if it's coming from the second level handler
+	if (vector == 0) {
+		vector = *ICReg(1, INTCON_SIR_IRQ) + 32;
+	}
+
+//	dprintf("platform_irq: spsr 0x%x, pc 0x%x, currthread %p, vector %d\n", frame->spsr, frame->pc, current_thread, vector);
+
+	// deliver the interrupt
+	enum handler_return ret; 
+
+	ret = INT_NO_RESCHEDULE;
+	if (int_handler_table[vector].handler)
+		ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
+
+	// ack the interrupt
+	if (vector >= 32) {
+		// interrupt is chained, so ack the second level first, and then the first
+		*ICReg(vector / 32, INTCON_ITR) = ~(1 << (vector % 32));
+		*ICReg(1, INTCON_CONTROL) |= 1;
+		vector = 0; // force the following code to ack the chained first level vector
+	} 
+
+	*ICReg(0, INTCON_ITR) = ~(1 << vector);
+	*ICReg(0, INTCON_CONTROL) = 1;
+
+	if (ret == INT_RESCHEDULE)
+		thread_preempt();
+
+	dec_critical_section();
+
+//	dprintf("platform_irq: exit\n");
+#endif
+}
+
+void platform_fiq(struct arm_iframe *frame)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+void register_int_handler(unsigned int vector, int_handler handler, void *arg)
+{
+	if (vector >= INT_VECTORS)
+		panic("register_int_handler: vector out of range %d\n", vector);
+
+	enter_critical_section();
+
+	int_handler_table[vector].handler = handler;
+	int_handler_table[vector].arg = arg;
+
+	exit_critical_section();
+}
+
diff --git a/platform/integrator/platform.c b/platform/integrator/platform.c
new file mode 100644
index 0000000..5b31242
--- /dev/null
+++ b/platform/integrator/platform.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <err.h>
+#include <debug.h>
+#include <platform.h>
+#include "platform_p.h"
+#include <platform/integrator.h>
+#include <arch/arm/mmu.h>
+
+void platform_init_mmu_mappings(void)
+{
+}
+
+void platform_early_init(void)
+{
+#if 0
+	/* do some memory map initialization */
+	addr_t addr;
+	arm_mmu_map_section(SDRAM_BASE, 0, MMU_FLAG_CACHED|MMU_FLAG_BUFFERED);
+	for (addr = SDRAM_BASE; addr < SDRAM_BASE + SDRAM_SIZE; addr += (1024*1024)) {
+		arm_mmu_map_section(addr, addr, MMU_FLAG_CACHED|MMU_FLAG_BUFFERED|MMU_FLAG_READWRITE);
+	}
+
+	/* initialize the interrupt controller */
+	platform_init_interrupts();
+
+	/* initialize the timer block */
+	platform_init_timer();
+#endif
+}
+
+void platform_init(void)
+{
+}
+
diff --git a/platform/integrator/platform_p.h b/platform/integrator/platform_p.h
new file mode 100644
index 0000000..872ea2b
--- /dev/null
+++ b/platform/integrator/platform_p.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef __PLATFORM_P_H
+#define __PLATFORM_P_H
+
+void platform_init_interrupts(void);
+void platform_init_timer(void);
+
+#endif
+
diff --git a/platform/integrator/rules.mk b/platform/integrator/rules.mk
new file mode 100644
index 0000000..a189153
--- /dev/null
+++ b/platform/integrator/rules.mk
@@ -0,0 +1,26 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ARCH := arm
+ARM_CPU := arm926ej-s
+CPU := generic
+
+INCLUDES += \
+	-I$(LOCAL_DIR)/include
+
+OBJS += \
+	$(LOCAL_DIR)/debug.o \
+	$(LOCAL_DIR)/platform.o \
+	$(LOCAL_DIR)/interrupts.o \
+	$(LOCAL_DIR)/timer.o \
+
+#	$(LOCAL_DIR)/net.o \
+
+
+#	$(LOCAL_DIR)/console.o \
+
+MEMBASE ?= 0x0
+MEMSIZE ?= 0x08000000	# 128MB
+
+LINKER_SCRIPT += \
+	$(BUILDDIR)/system-onesegment.ld
+
diff --git a/platform/integrator/timer.c b/platform/integrator/timer.c
new file mode 100644
index 0000000..55d14de
--- /dev/null
+++ b/platform/integrator/timer.c
@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2008 Travis Geiselbrecht
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files
+ * (the "Software"), to deal in the Software without restriction,
+ * including without limitation the rights to use, copy, modify, merge,
+ * publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
+ * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include <sys/types.h>
+#include <err.h>
+#include <kernel/thread.h>
+#include <debug.h>
+#include <platform.h>
+#include <platform/interrupts.h>
+#include <platform/timer.h>
+#include <platform/integrator.h>
+#include "platform_p.h"
+
+static time_t system_time = 0;
+
+static time_t tick_interval;
+static uint32_t ticks_per_interval;
+static platform_timer_callback t_callback;
+static void *callback_arg;
+
+status_t platform_set_periodic_timer(platform_timer_callback callback, void *arg, time_t interval)
+{
+#if 0
+	enter_critical_section();
+
+	t_callback = callback;
+	callback_arg = arg;
+	tick_interval = interval;
+	ticks_per_interval = interval * 32768 / 1000; // interval is in ms
+
+	OS_TIMER_CTRL_REG = 0; // stop it
+	OS_TIMER_TICK_VALUE_REG = ticks_per_interval;
+	OS_TIMER_CTRL_REG = (1<<3) | (1<<2) | (1<<1) | (1<<0);
+
+	exit_critical_section();
+#endif
+
+	return NO_ERROR;
+}
+
+time_t current_time(void)
+{
+#if 0
+	time_t t;
+	uint32_t delta_ticks;
+	uint32_t delta_ticks2;
+	
+retry:
+	delta_ticks = OS_TIMER_TICK_COUNTER_REG;
+	t = system_time;
+	delta_ticks2 = OS_TIMER_TICK_COUNTER_REG;
+	if (delta_ticks2 > delta_ticks)
+		goto retry;
+
+	t += ((ticks_per_interval - delta_ticks2) * tick_interval) / ticks_per_interval;
+
+	return t;
+#else
+	static time_t time = 0;
+	return time++;
+#endif
+
+}
+
+static enum handler_return os_timer_tick(void *arg)
+{
+	system_time += tick_interval;
+//	dprintf("os_timer_tick %d\n", system_time);
+
+	return t_callback(callback_arg, system_time);
+}
+
+void platform_init_timer(void)
+{
+#if 0
+	OS_TIMER_CTRL_REG = 0; // stop the timer if it's already running
+
+	register_int_handler(IRQ_OS_TIMER, &os_timer_tick, NULL);
+	unmask_interrupt(IRQ_OS_TIMER, NULL);
+#endif
+}
+