diff --git a/platform/msm7k/debug.c b/platform/msm7k/debug.c
new file mode 100644
index 0000000..312d7f6
--- /dev/null
+++ b/platform/msm7k/debug.c
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <printf.h>
+#include <arch/arm/dcc.h>
+#include <dev/uart.h>
+
+#define DCC_DEBUG 0
+
+void _dputc(char c)
+{
+#if DCC_DEBUG
+	if (c == '\n') {
+		while (dcc_putc('\r') < 0);
+	}
+	while (dcc_putc(c) < 0);
+#else
+	uart_putc(0, c);
+#endif
+}
+
+int dgetc(char *c)
+{
+#if DCC_DEBUG
+	int n = dcc_getc();
+	if (n < 0) {
+		return -1;
+	} else {
+		*c = n;
+		return 0;
+	}
+#else
+	return uart_getc(0, 1);
+#endif
+}
+
+void platform_halt(void)
+{
+	dprintf(INFO, "HALT: spinning forever...\n");
+	for(;;);
+}
+
+uint32_t debug_cycle_count(void)
+{
+    return 0;
+}
diff --git a/platform/msm7k/include/platform/iomap.h b/platform/msm7k/include/platform/iomap.h
new file mode 100644
index 0000000..48be851
--- /dev/null
+++ b/platform/msm7k/include/platform/iomap.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM7K_IOMAP_H_
+#define _PLATFORM_MSM7K_IOMAP_H_
+
+#define MSM_UART1_BASE	0xA9A00000
+#define MSM_UART2_BASE	0xA9B00000
+#define MSM_UART3_BASE	0xA9C00000
+
+#define MSM_VIC_BASE	0xC0000000
+#define MSM_GPT_BASE	0xC0100000
+#define MSM_CSR_BASE	0xC0100000
+
+#define MSM_SHARED_BASE 0x01F00000
+
+#endif
diff --git a/platform/msm7k/include/platform/irqs.h b/platform/msm7k/include/platform/irqs.h
new file mode 100644
index 0000000..1d5dd7f
--- /dev/null
+++ b/platform/msm7k/include/platform/irqs.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM7K_IRQS_H_
+#define _PLATFORM_MSM7K_IRQS_H_
+
+#define INT_A9_M2A_0         0
+#define INT_A9_M2A_1         1
+#define INT_A9_M2A_2         2
+#define INT_A9_M2A_3         3
+#define INT_A9_M2A_4         4
+#define INT_A9_M2A_5         5
+#define INT_A9_M2A_6         6
+#define INT_GP_TIMER_EXP     7
+#define INT_DEBUG_TIMER_EXP  8
+#define INT_UART1            9
+#define INT_UART2            10
+#define INT_UART3            11
+#define INT_UART1_RX         12
+#define INT_UART2_RX         13
+#define INT_UART3_RX         14
+#define INT_USB_OTG          15
+#define INT_MDDI_PRI         16
+#define INT_MDDI_EXT         17
+#define INT_MDDI_CLIENT      18
+#define INT_MDP              19
+#define INT_GRAPHICS         20
+#define INT_ADM_AARM         21
+#define INT_ADSP_A11         22
+#define INT_ADSP_A9_A11      23
+#define INT_SDC1_0           24
+#define INT_SDC1_1           25
+#define INT_SDC2_0           26
+#define INT_SDC2_1           27
+#define INT_KEYSENSE         28
+#define INT_TCHSCRN_SSBI     29
+#define INT_TCHSCRN1         30
+#define INT_TCHSCRN2         31
+
+#define INT_GPIO_GROUP1      (32 + 0)
+#define INT_GPIO_GROUP2      (32 + 1)
+#define INT_PWB_I2C          (32 + 2)
+#define INT_NAND_WR_ER_DONE  (32 + 3)
+#define INT_NAND_OP_DONE     (32 + 4)
+#define INT_SOFTRESET        (32 + 5)
+#define INT_PBUS_ARM11       (32 + 6)
+#define INT_AXI_MPU_SMI      (32 + 7)
+#define INT_AXI_MPU_EBI1     (32 + 8)
+#define INT_AD_HSSD          (32 + 9)
+#define INT_ARM11_PM         (32 + 10)
+#define INT_ARM11_DMA        (32 + 11)
+#define INT_TSIF_IRQ         (32 + 12)
+#define INT_UART1DM_IRQ      (32 + 13)
+#define INT_UART1DM_RX       (32 + 14)
+#define INT_SPARE0           (32 + 15)
+
+#define MSM_IRQ_BIT(irq)     (1 << ((irq) & 31))
+
+#define NR_IRQS 48
+
+#endif
diff --git a/platform/msm7k/interrupts.c b/platform/msm7k/interrupts.c
new file mode 100644
index 0000000..3e2ea2f
--- /dev/null
+++ b/platform/msm7k/interrupts.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <arch/arm.h>
+#include <reg.h>
+#include <kernel/thread.h>
+#include <platform/interrupts.h>
+
+#include <platform/irqs.h>
+#include <platform/iomap.h>
+
+#define VIC_REG(off) (MSM_VIC_BASE + (off))
+
+#define VIC_INT_SELECT0     VIC_REG(0x0000)  /* 1: FIQ, 0: IRQ */
+#define VIC_INT_SELECT1     VIC_REG(0x0004)  /* 1: FIQ, 0: IRQ */
+#define VIC_INT_EN0         VIC_REG(0x0010)
+#define VIC_INT_EN1         VIC_REG(0x0014)
+#define VIC_INT_ENCLEAR0    VIC_REG(0x0020)
+#define VIC_INT_ENCLEAR1    VIC_REG(0x0024)
+#define VIC_INT_ENSET0      VIC_REG(0x0030)
+#define VIC_INT_ENSET1      VIC_REG(0x0034)
+#define VIC_INT_TYPE0       VIC_REG(0x0040)  /* 1: EDGE, 0: LEVEL  */
+#define VIC_INT_TYPE1       VIC_REG(0x0044)  /* 1: EDGE, 0: LEVEL  */
+#define VIC_INT_POLARITY0   VIC_REG(0x0050)  /* 1: NEG, 0: POS */
+#define VIC_INT_POLARITY1   VIC_REG(0x0054)  /* 1: NEG, 0: POS */
+#define VIC_NO_PEND_VAL     VIC_REG(0x0060)
+#define VIC_INT_MASTEREN    VIC_REG(0x0064)  /* 1: IRQ, 2: FIQ     */
+#define VIC_PROTECTION      VIC_REG(0x006C)  /* 1: ENABLE          */
+#define VIC_CONFIG          VIC_REG(0x0068)  /* 1: USE ARM1136 VIC */
+#define VIC_IRQ_STATUS0     VIC_REG(0x0080)
+#define VIC_IRQ_STATUS1     VIC_REG(0x0084)
+#define VIC_FIQ_STATUS0     VIC_REG(0x0090)
+#define VIC_FIQ_STATUS1     VIC_REG(0x0094)
+#define VIC_RAW_STATUS0     VIC_REG(0x00A0)
+#define VIC_RAW_STATUS1     VIC_REG(0x00A4)
+#define VIC_INT_CLEAR0      VIC_REG(0x00B0)
+#define VIC_INT_CLEAR1      VIC_REG(0x00B4)
+#define VIC_SOFTINT0        VIC_REG(0x00C0)
+#define VIC_SOFTINT1        VIC_REG(0x00C4)
+#define VIC_IRQ_VEC_RD      VIC_REG(0x00D0)  /* pending int # */
+#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4)  /* pending vector addr */
+#define VIC_IRQ_VEC_WR      VIC_REG(0x00D8)
+#define VIC_IRQ_IN_SERVICE  VIC_REG(0x00E0)
+#define VIC_IRQ_IN_STACK    VIC_REG(0x00E4)
+#define VIC_TEST_BUS_SEL    VIC_REG(0x00E8)
+
+struct ihandler {
+	int_handler func;
+	void *arg;
+};
+
+static struct ihandler handler[NR_IRQS];
+
+void platform_init_interrupts(void)
+{
+	writel(0xffffffff, VIC_INT_CLEAR0);
+	writel(0xffffffff, VIC_INT_CLEAR1);
+	writel(0, VIC_INT_SELECT0);
+	writel(0, VIC_INT_SELECT1);
+	writel(0xffffffff, VIC_INT_TYPE0);
+	writel(0xffffffff, VIC_INT_TYPE1);
+	writel(0, VIC_CONFIG);
+	writel(1, VIC_INT_MASTEREN);
+}
+
+enum handler_return platform_irq(struct arm_iframe *frame)
+{
+	unsigned num;
+	enum handler_return ret;
+	num = readl(VIC_IRQ_VEC_RD);
+	num = readl(VIC_IRQ_VEC_PEND_RD);
+	if (num > NR_IRQS)
+		return 0;
+	writel(1 << (num & 31), (num > 31) ? VIC_INT_CLEAR1 : VIC_INT_CLEAR0);
+	ret = handler[num].func(handler[num].arg);
+	writel(0, VIC_IRQ_VEC_WR);
+	return ret;
+}
+
+void platform_fiq(struct arm_iframe *frame)
+{
+	PANIC_UNIMPLEMENTED;
+}
+
+status_t mask_interrupt(unsigned int vector)
+{
+	unsigned reg = (vector > 31) ? VIC_INT_ENCLEAR1 : VIC_INT_ENCLEAR0;
+	unsigned bit = 1 << (vector & 31);
+	writel(bit, reg);
+	return 0;
+}
+
+status_t unmask_interrupt(unsigned int vector)
+{
+	unsigned reg = (vector > 31) ? VIC_INT_ENSET1 : VIC_INT_ENSET0;
+	unsigned bit = 1 << (vector & 31);
+	writel(bit, reg);
+	return 0;
+}
+
+void register_int_handler(unsigned int vector, int_handler func, void *arg)
+{
+	if (vector >= NR_IRQS)
+		return;
+
+	enter_critical_section();
+	handler[vector].func = func;
+	handler[vector].arg = arg;
+	exit_critical_section();
+}
+
diff --git a/platform/msm7k/platform.c b/platform/msm7k/platform.c
new file mode 100644
index 0000000..21d3e50
--- /dev/null
+++ b/platform/msm7k/platform.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+
+#include <kernel/thread.h>
+#include <platform/debug.h>
+
+void platform_init_interrupts(void);
+void platform_init_timer();
+
+void platform_early_init(void)
+{
+	platform_init_interrupts();
+	platform_init_timer();
+}
+
+void platform_init(void)
+{
+	dprintf(INFO, "platform_init()\n");
+}
diff --git a/platform/msm7k/rules.mk b/platform/msm7k/rules.mk
new file mode 100644
index 0000000..93a7e05
--- /dev/null
+++ b/platform/msm7k/rules.mk
@@ -0,0 +1,17 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ARCH := arm
+ARM_CPU := arm1136j-s
+CPU := generic
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+OBJS += \
+	$(LOCAL_DIR)/platform.o \
+	$(LOCAL_DIR)/interrupts.o \
+	$(LOCAL_DIR)/debug.o
+
+LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
+
+include platform/msm_shared/rules.mk
+
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
new file mode 100644
index 0000000..3d2fc4b
--- /dev/null
+++ b/platform/msm_shared/rules.mk
@@ -0,0 +1,7 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+OBJS += \
+	$(LOCAL_DIR)/uart.o \
+	$(LOCAL_DIR)/timer.o 
+
+
diff --git a/platform/msm_shared/timer.c b/platform/msm_shared/timer.c
new file mode 100644
index 0000000..842188a
--- /dev/null
+++ b/platform/msm_shared/timer.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <reg.h>
+#include <sys/types.h>
+
+#include <platform/timer.h>
+#include <platform/irqs.h>
+#include <platform/iomap.h>
+#include <platform/interrupts.h>
+#include <kernel/thread.h>
+
+#define GPT_REG(off) (MSM_GPT_BASE + (off))
+
+#define GPT_MATCH_VAL        GPT_REG(0x0000)
+#define GPT_COUNT_VAL        GPT_REG(0x0004)
+#define GPT_ENABLE           GPT_REG(0x0008)
+#define GPT_ENABLE_CLR_ON_MATCH_EN        2
+#define GPT_ENABLE_EN                     1
+#define GPT_CLEAR            GPT_REG(0x000C)
+
+#define DGT_MATCH_VAL        GPT_REG(0x0010)
+#define DGT_COUNT_VAL        GPT_REG(0x0014)
+#define DGT_ENABLE           GPT_REG(0x0018)
+#define DGT_ENABLE_CLR_ON_MATCH_EN        2
+#define DGT_ENABLE_EN                     1
+#define DGT_CLEAR            GPT_REG(0x001C)
+
+
+static platform_timer_callback timer_callback;
+static void *timer_arg;
+static time_t timer_interval;
+
+static volatile uint32_t ticks;
+
+static enum handler_return timer_irq(void *arg)
+{
+	ticks += timer_interval;
+	return timer_callback(timer_arg, ticks);
+}
+
+status_t platform_set_periodic_timer(
+	platform_timer_callback callback,
+	void *arg, time_t interval)
+{
+	enter_critical_section();
+
+	timer_callback = callback;
+	timer_arg = arg;
+	timer_interval = interval;
+
+	writel(timer_interval * 19200, DGT_MATCH_VAL);
+	writel(0, DGT_CLEAR);
+	writel(DGT_ENABLE_EN | DGT_ENABLE_CLR_ON_MATCH_EN, DGT_ENABLE);
+	
+	register_int_handler(INT_DEBUG_TIMER_EXP, timer_irq, 0);
+	unmask_interrupt(INT_DEBUG_TIMER_EXP);
+
+	exit_critical_section();
+	return 0;
+}
+
+
+time_t current_time(void)
+{
+	return ticks;
+}
+
+void platform_init_timer(void)
+{
+	writel(0, DGT_ENABLE);
+}
+
diff --git a/platform/msm_shared/uart.c b/platform/msm_shared/uart.c
new file mode 100644
index 0000000..8fc92bc
--- /dev/null
+++ b/platform/msm_shared/uart.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the 
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <platform/iomap.h>
+#include <dev/uart.h>
+#include <reg.h>
+
+#define UART_MR1         0x0000
+
+#define UART_MR1_AUTO_RFR_LEVEL0(n) (((n) & 0x3f) << 8)
+#define UART_MR1_RX_RDY_CTL    (1 << 7)
+#define UART_MR1_CTS_CTL       (1 << 6)
+#define UART_MR1_AUTO_RFR_LEVEL1(n) ((n) & 0x3f)
+
+#define UART_MR2         0x0004
+#define UART_MR2_ERROR_MODE        (1 << 6)
+#define UART_MR2_BITS_PER_CHAR_5   (0 << 4)
+#define UART_MR2_BITS_PER_CHAR_6   (1 << 4)
+#define UART_MR2_BITS_PER_CHAR_7   (2 << 4)
+#define UART_MR2_BITS_PER_CHAR_8   (3 << 4)
+#define UART_MR2_STOP_BIT_LEN_0563 (0 << 2)
+#define UART_MR2_STOP_BIT_LEN_1000 (1 << 2)
+#define UART_MR2_STOP_BIT_LEN_1563 (2 << 2)
+#define UART_MR2_STOP_BIT_LEN_2000 (3 << 2)
+#define UART_MR2_PARITY_MODE_NONE  (0)
+#define UART_MR2_PARITY_MODE_ODD   (1)
+#define UART_MR2_PARITY_MODE_EVEN  (2)
+#define UART_MR2_PARITY_MODE_SPACE (3)
+
+#define UART_CSR         0x0008
+#define UART_CSR_115200  0xFF
+#define UART_CSR_57600   0xEE
+#define UART_CSR_38400   0xDD
+#define UART_CSR_19200   0xBB
+
+#define UART_TF          0x000C
+
+#define UART_CR          0x0010
+#define UART_CR_CMD_NULL           (0 << 4)
+#define UART_CR_CMD_RESET_RX       (1 << 4)
+#define UART_CR_CMD_RESET_TX       (2 << 4)
+#define UART_CR_CMD_RESET_ERR      (3 << 4)
+#define UART_CR_CMD_RESET_BCI      (4 << 4)
+#define UART_CR_CMD_START_BREAK    (5 << 4)
+#define UART_CR_CMD_STOP_BREAK     (6 << 4)
+#define UART_CR_CMD_RESET_CTS_N    (7 << 4)
+#define UART_CR_CMD_PACKET_MODE    (9 << 4)
+#define UART_CR_CMD_MODE_RESET     (12<< 4)
+#define UART_CR_CMD_SET_RFR_N      (13<< 4)
+#define UART_CR_CMD_RESET_RFR_ND   (14<< 4)
+#define UART_CR_TX_DISABLE         (1 << 3)
+#define UART_CR_TX_ENABLE          (1 << 3)
+#define UART_CR_RX_DISABLE         (1 << 3)
+#define UART_CR_RX_ENABLE          (1 << 3)
+
+#define UART_IMR         0x0014
+#define UART_IMR_RXLEV (1 << 4)
+#define UART_IMR_TXLEV (1 << 0)
+
+#define UART_IPR         0x0018
+#define UART_TFWR        0x001C
+#define UART_RFWR        0x0020
+#define UART_HCR         0x0024
+
+#define UART_MREG        0x0028
+#define UART_NREG        0x002C
+#define UART_DREG        0x0030
+#define UART_MNDREG      0x0034
+#define UART_IRDA        0x0038
+#define UART_MISR_MODE   0x0040
+#define UART_MISR_RESET  0x0044
+#define UART_MISR_EXPORT 0x0048
+#define UART_MISR_VAL    0x004C
+#define UART_TEST_CTRL   0x0050
+
+#define UART_SR          0x0008
+#define UART_SR_HUNT_CHAR      (1 << 7)
+#define UART_SR_RX_BREAK       (1 << 6)
+#define UART_SR_PAR_FRAME_ERR  (1 << 5)
+#define UART_SR_OVERRUN        (1 << 4)
+#define UART_SR_TX_EMPTY       (1 << 3)
+#define UART_SR_TX_READY       (1 << 2)
+#define UART_SR_RX_FULL        (1 << 1)
+#define UART_SR_RX_READY       (1 << 0)
+
+#define UART_RF          0x000C
+#define UART_MISR        0x0010
+#define UART_ISR         0x0014
+
+
+static unsigned uart_base = MSM_UART3_BASE;
+
+#define uwr(v,a) writel(v, uart_base + (a))
+#define urd(a) readl(uart_base + (a))
+
+void uart_init(void)
+{
+#if 0
+	mdelay(100);
+
+	uwr(0x0A, UART_CR);  /* disable TX and RX */
+	
+	uwr(0x30, UART_CR);  /* reset error status */
+	uwr(0x10, UART_CR);  /* reset receiver */
+	uwr(0x20, UART_CR);  /* reset transmitter */
+	
+	mdelay(100);
+	
+        /* configuration for 19.2MHz TCXO */
+	uwr(0xC0, UART_MREG);
+	uwr(0xAF, UART_NREG);
+	uwr(0x80, UART_DREG);
+	uwr(0x19, UART_MNDREG);    
+	
+	uwr(0x10, UART_CR);  /* reset RX */
+	uwr(0x20, UART_CR);  /* reset TX */
+	uwr(0x30, UART_CR);  /* reset error status */
+	uwr(0x40, UART_CR);  /* reset RX break */
+	uwr(0x70, UART_CR);  /* rest? */
+	uwr(0xD0, UART_CR);  /* reset */
+	
+	uwr(0x7BF, UART_IPR); /* stale timeout = 630 * bitrate */
+	uwr(0, UART_IMR);
+	uwr(115, UART_RFWR); /* RX watermark = 58 * 2 - 1 */
+	uwr(10, UART_TFWR);  /* TX watermark */
+	
+	uwr(0, UART_RFWR); 
+	
+	uwr(UART_CSR_115200, UART_CSR);
+	uwr(0, UART_IRDA);
+	uwr(0x1E, UART_HCR);
+//    uwr(0x7F4, UART_MR1); /* RFS/ CTS/ 500chr RFR */
+	uwr(16, UART_MR1);
+	uwr(0x34, UART_MR2); /* 8N1 */
+	
+	mdelay(100);
+	
+	uwr(0x05, UART_CR); /* enable TX & RX */
+	mdelay(100);
+#endif
+}
+
+int uart_putc(int port, char c)
+{
+	while (!(urd(UART_SR) & UART_SR_TX_READY)) ;
+	uwr(c, UART_TF);
+	return 0;
+}
+
+int uart_getc(int port, bool wait)
+{
+	for (;;) {
+		while (!(urd(UART_SR) & UART_SR_RX_READY)) ;	
+		if (!wait)
+			return -1;
+	}
+
+	return urd(UART_RF);
+}
+
diff --git a/project/surf-test/init.c b/project/surf-test/init.c
new file mode 100644
index 0000000..87be66d
--- /dev/null
+++ b/project/surf-test/init.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *  * Neither the name of Google, Inc. nor the names of its contributors
+ *    may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <arch/arm.h>
+#include <app/console.h>
+#include <app/tests.h>
+
+extern int string_tests(void);
+extern int thread_tests(void);
+
+#define LED0 0x9C004282
+#define LED1 0x9C004284
+
+void project_init(void)
+{
+	dprintf(INFO, "project init\n");
+	console_init();
+	tests_init();
+	console_start();
+}
diff --git a/project/surf-test/rules.mk b/project/surf-test/rules.mk
new file mode 100644
index 0000000..59b2f9b
--- /dev/null
+++ b/project/surf-test/rules.mk
@@ -0,0 +1,17 @@
+# top level project rules for the armemu-test project
+#
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+ifeq ($(PROJECT_TARGET),)
+TARGET := surf-msm7k
+else
+TARGET := $(PROJECT_TARGET)
+endif
+
+MODULES += \
+	app/tests \
+	app/console
+
+OBJS += \
+	$(LOCAL_DIR)/init.o
+
diff --git a/target/surf-msm7k/rules.mk b/target/surf-msm7k/rules.mk
new file mode 100644
index 0000000..ba3f9d4
--- /dev/null
+++ b/target/surf-msm7k/rules.mk
@@ -0,0 +1,10 @@
+LOCAL_DIR := $(GET_LOCAL_DIR)
+
+INCLUDES += -I$(LOCAL_DIR)/include
+
+PLATFORM := msm7k
+
+MEMBASE := 0x00000000 # SMI
+MEMSIZE := 0x00800000 # 8MB
+
+DEFINES += SDRAM_SIZE=$(MEMSIZE) MEMBASE=$(MEMBASE)