target: msm8610: Add support for sdhci
Target specific changes to support sdhci
Change-Id: I20e424b7610601735f63cf06c01b23625f1c43c6
diff --git a/target/msm8610/init.c b/target/msm8610/init.c
index da32049..92c9855 100644
--- a/target/msm8610/init.c
+++ b/target/msm8610/init.c
@@ -28,6 +28,7 @@
#include <debug.h>
#include <platform/iomap.h>
+#include <platform/irqs.h>
#include <reg.h>
#include <target.h>
#include <platform.h>
@@ -54,9 +55,19 @@
HW_PLATFORM_SUBTYPE_SKUAB = 3,
};
-static uint32_t mmc_sdc_base[] =
+static void set_sdc_power_ctrl(void);
+
+static uint32_t mmc_pwrctl_base[] =
{ MSM_SDC1_BASE, MSM_SDC2_BASE };
+static uint32_t mmc_sdhci_base[] =
+ { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
+
+static uint32_t mmc_sdc_pwrctl_irq[] =
+ { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
+
+struct mmc_device *dev;
+
void target_early_init(void)
{
#if WITH_DEBUG_UART
@@ -98,38 +109,60 @@
keys_post_event(KEY_VOLUMEUP, 1);
}
-void target_init(void)
+void target_sdc_init()
{
- uint32_t base_addr;
- uint8_t slot;
+ struct mmc_config_data config;
- dprintf(INFO, "target_init()\n");
-
- spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
-
- target_keystatus();
+ /* Set drive strength & pull ctrl values */
+ set_sdc_power_ctrl();
/* Display splash screen if enabled */
dprintf(SPEW, "Display Init: Start\n");
display_init();
dprintf(SPEW, "Display Init: Done\n");
- /* Trying Slot 1*/
- slot = 1;
- base_addr = mmc_sdc_base[slot - 1];
- if (mmc_boot_main(slot, base_addr))
+ config.bus_width = DATA_BUS_WIDTH_8BIT;
+ config.max_clk_rate = MMC_CLK_200MHZ;
+
+ /* Try slot 1*/
+ config.slot = 1;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
+
+ if (!(dev = mmc_init(&config)))
{
- /* Trying Slot 2 next */
- slot = 2;
- base_addr = mmc_sdc_base[slot - 1];
+ /* Try slot 2 */
+ config.slot = 2;
+ config.sdhc_base = mmc_sdhci_base[config.slot - 1];
+ config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
+ config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
- if (mmc_boot_main(slot, base_addr))
+ if (!(dev = mmc_init(&config)))
{
dprintf(CRITICAL, "mmc init failed!");
ASSERT(0);
}
}
+
+ /* MMC initialization is complete, read the partition table info */
+ if (partition_read_table())
+ {
+ dprintf(CRITICAL, "Error reading the partition table info\n");
+ ASSERT(0);
+ }
+}
+
+void target_init(void)
+{
+ dprintf(INFO, "target_init()\n");
+
+ spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
+
+ target_keystatus();
+
+ target_sdc_init();
}
/* Do any target specific intialization needed before entering fastboot mode */
@@ -295,13 +328,30 @@
return 0;
}
-/*
- * Function to set the capabilities for the host
- */
-void target_mmc_caps(struct mmc_host *host)
+static void set_sdc_power_ctrl()
{
- host->caps.ddr_mode = 0;
- host->caps.hs200_mode = 0;
- host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT;
- host->caps.hs_clk_rate = MMC_CLK_50MHZ;
+ /* Drive strength configs for sdc pins */
+ struct tlmm_cfgs sdc1_hdrv_cfg[] =
+ {
+ { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
+ { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
+ };
+
+ /* Pull configs for sdc pins */
+ struct tlmm_cfgs sdc1_pull_cfg[] =
+ {
+ { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
+ { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
+ };
+
+ /* Set the drive strength & pull control values */
+ tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
+ tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
+}
+
+struct mmc_device *target_mmc_device()
+{
+ return dev;
}