commit 2655ea6b2d5e3454e40872a0983bd825e8521f53
author Padmanabhan Komanduru <pkomandu@codeaurora.org> Mon Jun 08 12:23:32 2015 +0530
committer Padmanabhan Komanduru <pkomandu@codeaurora.org> Mon Jun 15 15:16:41 2015 +0530
tree 5e589992a4d53aa767042283aba906fc7e5849d3
parent 3f7f44f1ff7f7467fa9c8c518b5726c3b9de3ada

platform: msm8952: add support for display clocks for 8956

msm8956 has a different clock plan for MDP clock when compared
to msm8952 and this includes GPLL6. msm8956 supports two DSI
devices. Add support for MDP clock, escape clock for DSI1
controller and update the 8952 clock header with the register
offsets for DSI1 clocks.

Change-Id: I9dd7f59f908f98f7dbf99ff277015f3ec4c4f172

platform/msm8952/include/platform/iomap.h

diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 8ea20f4..003050a 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -99,6 +99,7 @@
 #define APCS_CLOCK_BRANCH_ENA_VOTE         (CLK_CTL_BASE + 0x45004)
 #define GPLL4_MODE                         (CLK_CTL_BASE + 0x24000)
 #define GPLL4_STATUS                       (CLK_CTL_BASE + 0x24024)
+#define GPLL6_STATUS                       (CLK_CTL_BASE + 0x3701C)
 
 /* SDCC */
 #define SDC1_HDRV_PULL_CTL                 (TLMM_BASE_ADDR + 0x10A000)