platform: msm8952: add display support for msm8956/8976 v1.1
DSI0/DSI1 byte/pixel clocks can be sourced from DSI PLL0 on
msm8956/8976 v1.1 and DSI PLL1 need not be enabled from split DSI
cases. Add change to take care of this.
Change-Id: I458b69a88e65f1e6c695b99b3ef52f8ab54a64bd
diff --git a/target/msm8952/target_display.c b/target/msm8952/target_display.c
index b2585fc..0598833 100644
--- a/target/msm8952/target_display.c
+++ b/target/msm8952/target_display.c
@@ -330,15 +330,16 @@
if (!ret)
dprintf(CRITICAL, "Not able to enable master pll\n");
- if (platform_is_msm8956() && pinfo->mipi.dual_dsi) {
+ if (platform_is_msm8956() && pinfo->mipi.dual_dsi &&
+ !platform_is_msm8976_v_1_1()) {
ret = mdss_dsi_pll_config(pinfo->mipi.spll_base,
pinfo->mipi.sctl_base, pll_data);
if (!ret)
dprintf(CRITICAL, "Not able to enable second pll\n");
}
- gcc_dsi_clocks_enable(flags, pll_data->pclk_m, pll_data->pclk_n,
- pll_data->pclk_d);
+ gcc_dsi_clocks_enable(flags, pinfo->mipi.use_dsi1_pll,
+ pll_data->pclk_m, pll_data->pclk_n, pll_data->pclk_d);
} else if(!target_cont_splash_screen()) {
gcc_dsi_clocks_disable(flags);
mdp_clock_disable();