platform: msm8994: Add support for crypto clock
Add support to reset, enable and disable crypto clock.
Change-Id: Id38be5430449eb58f69238830ba33822b6ea143a
diff --git a/platform/msm8994/acpuclock.c b/platform/msm8994/acpuclock.c
index 5e2d5a6..ba84606 100644
--- a/platform/msm8994/acpuclock.c
+++ b/platform/msm8994/acpuclock.c
@@ -33,6 +33,26 @@
#include <clock.h>
#include <platform/clock.h>
#include <platform/iomap.h>
+#include <rpm-smd.h>
+#include <regulator.h>
+
+#define RPM_CE_CLK_TYPE 0x6563
+#define CE2_CLK_ID 0x1
+#define RPM_SMD_KEY_RATE 0x007A484B
+
+uint32_t CE2_CLK[][8]=
+{
+ {
+ RPM_CE_CLK_TYPE, CE2_CLK_ID,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_DISABLE,
+ RPM_SMD_KEY_RATE, 4, 0,
+ },
+ {
+ RPM_CE_CLK_TYPE, CE2_CLK_ID,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_ENABLE,
+ RPM_SMD_KEY_RATE, 4, 176128,
+ },
+};
void hsusb_clock_init(void)
{
@@ -194,14 +214,42 @@
*/
static void ce_async_reset(uint8_t instance)
{
+ if (instance == 2)
+ {
+ /* Start the block reset for CE */
+ writel(1, GCC_CE2_BCR);
+ udelay(2);
+ /* Take CE block out of reset */
+ writel(0, GCC_CE2_BCR);
+ udelay(2);
+ }
+ else
+ {
+ dprintf(CRITICAL, "Unsupported CE instance: %u\n", instance);
+ ASSERT(0);
+ }
}
void clock_ce_enable(uint8_t instance)
{
+ if (instance == 2)
+ rpm_send_data(&CE2_CLK[GENERIC_ENABLE][0], 24, RPM_REQUEST_TYPE);
+ else
+ {
+ dprintf(CRITICAL, "Unsupported CE instance: %u\n", instance);
+ ASSERT(0);
+ }
}
void clock_ce_disable(uint8_t instance)
{
+ if (instance == 2)
+ rpm_send_data(&CE2_CLK[GENERIC_DISABLE][0], 24, RPM_REQUEST_TYPE);
+ else
+ {
+ dprintf(CRITICAL, "Unsupported CE instance: %u\n", instance);
+ ASSERT(0);
+ }
}
void clock_config_ce(uint8_t instance)
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index 341c0a6..db20bf9 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -197,6 +197,7 @@
#define MSM_CE2_BAM_BASE 0xFD444000
#define MSM_CE2_BASE 0xFD45A000
+#define GCC_CE2_BCR (CLK_CTL_BASE + 0x1080)
#define TLMM_BASE_ADDR 0xFD510000
#define GPIO_CONFIG_ADDR(x) (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)