| commit | 35f771808e64a7b3768f72f9be5781d8e8e8d6af | [log] [tgz] |
|---|---|---|
| author | Chandan Uddaraju <chandanu@codeaurora.org> | Thu Sep 23 15:21:45 2010 -0700 |
| committer | Chandan Uddaraju <chandanu@codeaurora.org> | Thu Sep 23 15:36:02 2010 -0700 |
| tree | ecb8d4deea3271306655fa0a444df6e3dba3b369 | |
| parent | 9539c2d9b26e9606f95306aa22961461eef10567 [diff] |
[platform/msm7x30]: Add code to bump up the ACPU clock. Add code to enable PLL2. Modify the clock source to use PLL2. This will bump up the ACPU clock of 7x30/8x55 targets to 806MHz/1GHz. Change-Id: I7be42a45dca8996cf6374982f982b078994a855c