target/platform: msm8994: Fix usb code & clock driver
Add support for phy2ahb usb config clock & fix the clock
look up table. Override usb pll values for qmp phy.
CRs-Fixed: 673769
Change-Id: Ie6a4b44a85b50770040a21f55b41da72c2130cea
diff --git a/platform/msm8994/acpuclock.c b/platform/msm8994/acpuclock.c
index 64c2a14..fc495ac 100644
--- a/platform/msm8994/acpuclock.c
+++ b/platform/msm8994/acpuclock.c
@@ -257,6 +257,13 @@
ASSERT(0);
}
+ ret = clk_get_set_enable("usb_phy_cfg_ahb2phy_clk", 0, 1);
+ if(ret)
+ {
+ dprintf(CRITICAL, "failed to enable usb_phy_cfg_ahb2phy_clk = %d\n", ret);
+ ASSERT(0);
+ }
+
pm8x41_lnbb_clock_ctrl(1);
}
diff --git a/platform/msm8994/include/platform/iomap.h b/platform/msm8994/include/platform/iomap.h
index 2472fce..fd51de5 100644
--- a/platform/msm8994/include/platform/iomap.h
+++ b/platform/msm8994/include/platform/iomap.h
@@ -144,6 +144,7 @@
#define USB30PHY_PHY_BCR (CLK_CTL_BASE + 0x1404)
#define GCC_USB30_GDSCR (CLK_CTL_BASE + 0x03C4)
#define GCC_QUSB2_PHY_BCR (CLK_CTL_BASE + 0x04B8)
+#define USB_PHY_CFG_AHB2PHY_CBCR (CLK_CTL_BASE + 0x1A84)
/* SDCC */
#define SDCC1_BCR (CLK_CTL_BASE + 0x4C0) /* block reset */
diff --git a/platform/msm8994/msm8994-clock.c b/platform/msm8994/msm8994-clock.c
index b3f0ea7..68343bf 100644
--- a/platform/msm8994/msm8994-clock.c
+++ b/platform/msm8994/msm8994-clock.c
@@ -468,7 +468,7 @@
};
static struct reset_clk gcc_usb30_phy_reset = {
- .bcr_reg = (uint32_t *)USB30_PHY_BCR,
+ .bcr_reg = (uint32_t )USB30_PHY_BCR,
.c = {
.dbg_name = "usb30_phy_reset",
@@ -476,6 +476,17 @@
},
};
+static struct branch_clk gcc_usb_phy_cfg_ahb2phy_clk = {
+ .cbcr_reg = (uint32_t *)USB_PHY_CFG_AHB2PHY_CBCR,
+ .has_sibling = 1,
+
+ .c = {
+ .dbg_name = "usb_phy_cfg_ahb2phy_clk",
+ .ops = &clk_ops_branch,
+ },
+};
+
+
/* Clock lookup table */
static struct clk_lookup msm_8994_clocks[] =
{
@@ -491,12 +502,14 @@
/* USB30 clocks */
CLK_LOOKUP("usb2b_phy_sleep_clk", gcc_usb2b_phy_sleep_clk.c),
CLK_LOOKUP("usb30_master_clk", gcc_usb30_master_clk.c),
- CLK_LOOKUP("usb30_iface_clk", gcc_sys_noc_usb30_axi_clk),
+ CLK_LOOKUP("usb30_iface_clk", gcc_sys_noc_usb30_axi_clk.c),
CLK_LOOKUP("usb30_mock_utmi_clk", gcc_usb30_mock_utmi_clk.c),
CLK_LOOKUP("usb30_sleep_clk", gcc_usb30_sleep_clk.c),
CLK_LOOKUP("usb30_phy_aux_clk", gcc_usb30_phy_aux_clk.c),
CLK_LOOKUP("usb30_pipe_clk", gcc_usb30_pipe_clk.c),
CLK_LOOKUP("usb30_phy_reset", gcc_usb30_phy_reset.c),
+
+ CLK_LOOKUP("usb_phy_cfg_ahb2phy_clk", gcc_usb_phy_cfg_ahb2phy_clk.c),
};
void platform_clock_init(void)