| commit | 3ccc0552ef942b93863dad3ebe5c9f65869f462a | [log] [tgz] |
|---|---|---|
| author | Padmanabhan Komanduru <pkomandu@codeaurora.org> | Mon Apr 27 16:46:33 2015 -0700 |
| committer | Padmanabhan Komanduru <pkomandu@codeaurora.org> | Mon May 04 16:16:40 2015 -0700 |
| tree | 519e301044a2d1814fb042b3b30d47b6d470ece6 | |
| parent | c0766c810d26587210eb942dfb059caa8f43c50a [diff] |
target: msm8994: set the correct parent for DSI RCG clocks The parent of DSI RCG clocks can be either DSI0 PLL or DSI1 PLL based on the use case. In the current implementation, the parent is always set to DSI0 PLL. Add change to set the parent correctly based on the PLL used. Change-Id: I72c7c96b23663b205fccbd920e839acf85b36cd6