platform: msmtitanium: Adding Platform specific files

Initializing Clocks and Board specific functions.
Adding iomap for Crypto and Gpll.

Change-Id: I7a4d1bfd470ae4e7fad0bb13fbd40558230a0229
diff --git a/platform/msmtitanium/acpuclock.c b/platform/msmtitanium/acpuclock.c
old mode 100644
new mode 100755
index 3bfa673..25c1eff
--- a/platform/msmtitanium/acpuclock.c
+++ b/platform/msmtitanium/acpuclock.c
@@ -49,7 +49,9 @@
 /* Configure MMC clock */
 void clock_config_mmc(uint32_t interface, uint32_t freq)
 {
-	mmc_boot_mci_clk_enable();
+	char clk_name[64];
+
+	snprintf(clk_name, sizeof(clk_name), "sdc%u_core_clk", interface);
 }
 
 /* Configure UART clock based on the UART block id*/
diff --git a/platform/msmtitanium/include/platform/iomap.h b/platform/msmtitanium/include/platform/iomap.h
old mode 100644
new mode 100755
index d27ce1e..c429f35
--- a/platform/msmtitanium/include/platform/iomap.h
+++ b/platform/msmtitanium/include/platform/iomap.h
@@ -78,12 +78,21 @@
 /* CRYPTO ENGINE */
 #define  MSM_CE1_BASE                      0x073A000
 #define  MSM_CE1_BAM_BASE                  0x0704000
+#define  GCC_CRYPTO_BCR                    (CLK_CTL_BASE + 0x16000)
+#define  GCC_CRYPTO_CMD_RCGR               (CLK_CTL_BASE + 0x16004)
+#define  GCC_CRYPTO_CFG_RCGR               (CLK_CTL_BASE + 0x16008)
+#define  GCC_CRYPTO_CBCR                   (CLK_CTL_BASE + 0x1601C)
+#define  GCC_CRYPTO_AXI_CBCR               (CLK_CTL_BASE + 0x16020)
+#define  GCC_CRYPTO_AHB_CBCR               (CLK_CTL_BASE + 0x16024)
 
 
 /* GPLL */
 #define GPLL0_STATUS                       (CLK_CTL_BASE + 0x2101C)
 #define APCS_GPLL_ENA_VOTE                 (CLK_CTL_BASE + 0x45000)
 #define APCS_CLOCK_BRANCH_ENA_VOTE         (CLK_CTL_BASE + 0x45004)
+#define GPLL4_MODE                         (CLK_CTL_BASE + 0x24000)
+#define GPLL4_STATUS                       (CLK_CTL_BASE + 0x24024)
+#define GPLL6_STATUS                       (CLK_CTL_BASE + 0x3701C)
 
 /* SDCC */
 #define SDC1_HDRV_PULL_CTL                 (TLMM_BASE_ADDR + 0x10A000)
@@ -96,6 +105,25 @@
 #define SDCC1_N                            (CLK_CTL_BASE + 0x42010) /* n */
 #define SDCC1_D                            (CLK_CTL_BASE + 0x42014) /* d */
 
+/* SDHCI */
+#define MSM_SDC1_SDHCI_BASE                (PERIPH_SS_BASE + 0x00024900)
+#define MSM_SDC2_SDHCI_BASE                (PERIPH_SS_BASE + 0x00064900)
+
+#define SDCC_MCI_HC_MODE                   (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG          (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG            (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG           (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG             (0x000000E8)
+
+#define SDCC2_BCR                          (CLK_CTL_BASE + 0x43000) /* block reset */
+#define SDCC2_APPS_CBCR                    (CLK_CTL_BASE + 0x43018) /* branch control */
+#define SDCC2_AHB_CBCR                     (CLK_CTL_BASE + 0x4301C)
+#define SDCC2_CMD_RCGR                     (CLK_CTL_BASE + 0x43004) /* cmd */
+#define SDCC2_CFG_RCGR                     (CLK_CTL_BASE + 0x43008) /* cfg */
+#define SDCC2_M                            (CLK_CTL_BASE + 0x4300C) /* m */
+#define SDCC2_N                            (CLK_CTL_BASE + 0x43010) /* n */
+#define SDCC2_D                            (CLK_CTL_BASE + 0x43014) /* d */
+
 /* UART */
 #define BLSP1_AHB_CBCR                     (CLK_CTL_BASE + 0x1008)
 #define BLSP1_UART2_APPS_CBCR              (CLK_CTL_BASE + 0x302C)
diff --git a/platform/msmtitanium/include/platform/irqs.h b/platform/msmtitanium/include/platform/irqs.h
old mode 100644
new mode 100755
index 9b13607..db33501
--- a/platform/msmtitanium/include/platform/irqs.h
+++ b/platform/msmtitanium/include/platform/irqs.h
@@ -47,6 +47,8 @@
 #define USB30_EE1_IRQ                          (GIC_SPI_START + 134)
 #define USB1_HS_BAM_IRQ                        (GIC_SPI_START + 135)
 #define USB1_HS_IRQ                            (GIC_SPI_START + 134)
+#define SDCC1_PWRCTL_IRQ                       (GIC_SPI_START + 138)
+#define SDCC2_PWRCTL_IRQ                       (GIC_SPI_START + 221)
 
 /* Retrofit universal macro names */
 #define INT_USB_HS                             USB1_HS_IRQ
diff --git a/platform/msmtitanium/platform.c b/platform/msmtitanium/platform.c
old mode 100644
new mode 100755
index b745cb0..6e851b1
--- a/platform/msmtitanium/platform.c
+++ b/platform/msmtitanium/platform.c
@@ -29,14 +29,21 @@
 #include <debug.h>
 #include <reg.h>
 #include <platform/iomap.h>
+#include <platform/irqs.h>
+#include <platform/clock.h>
 #include <qgic.h>
 #include <qtimer.h>
 #include <mmu.h>
 #include <arch/arm/mmu.h>
 #include <smem.h>
+#include <board.h>
+#include <boot_stats.h>
+#include <platform.h>
 
 void platform_early_init(void)
 {
+	board_init();
+	platform_clock_init();
 	qgic_init();
 	qtimer_init();
 	scm_init();
diff --git a/platform/msmtitanium/rules.mk b/platform/msmtitanium/rules.mk
old mode 100644
new mode 100755
index 6e34d91..2734fb6
--- a/platform/msmtitanium/rules.mk
+++ b/platform/msmtitanium/rules.mk
@@ -16,6 +16,7 @@
 OBJS += \
        $(LOCAL_DIR)/platform.o \
        $(LOCAL_DIR)/acpuclock.o \
+       $(LOCAL_DIR)/msmtitanium-clock.o \
        $(LOCAL_DIR)/gpio.o
 
 LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld