mmc: mmc_sdhci: Fix pwr_irq data type & clocks
Fix the data type for pwr_irs & initialize the clocks
before accessing sdcc registers
CRs-Fixed: 524540
Change-Id: I2020d86fef12c9e7f120f0dd5d0c6c4cb2491461
diff --git a/platform/msm_shared/include/mmc_sdhci.h b/platform/msm_shared/include/mmc_sdhci.h
index 79d3965..feae9f3 100644
--- a/platform/msm_shared/include/mmc_sdhci.h
+++ b/platform/msm_shared/include/mmc_sdhci.h
@@ -281,7 +281,7 @@
/* mmc device config data */
struct mmc_config_data {
uint8_t slot; /* Sdcc slot used */
- uint8_t pwr_irq; /* Power Irq from card to host */
+ uint32_t pwr_irq; /* Power Irq from card to host */
uint32_t sdhc_base; /* Base address for the sdhc */
uint32_t pwrctl_base; /* Base address for power control registers */
uint16_t bus_width; /* Bus width used */
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 8dae760..5487d94 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -907,6 +907,11 @@
data.pwrctl_base = cfg->pwrctl_base;
data.pwr_irq = cfg->pwr_irq;
+ /* Initialize any clocks needed for SDC controller */
+ clock_init_mmc(cfg->slot);
+
+ clock_config_mmc(cfg->slot, cfg->max_clk_rate);
+
/*
* MSM specific sdhc init
*/
@@ -918,12 +923,7 @@
*/
sdhci_init(host);
- /* Initialize any clocks needed for SDC controller */
- clock_init_mmc(cfg->slot);
-
/* Setup initial freq to 400KHz */
- clock_config_mmc(cfg->slot, cfg->max_clk_rate);
-
mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
return mmc_ret;