commit 4d637e4e4a82bf8db11c249d388632727e6d842e
author Unnati Gandhi <ugandhi@codeaurora.org> Fri Jul 11 14:47:25 2014 +0530
committer Gerrit - the friendly Code Review server <code-review@localhost> Wed Jul 16 22:54:14 2014 -0700
tree 4b1b86d6f0180937494cd9239f63a14420b8a10d
parent b3820bc2fae32977a7db0df9dac57d0f0714082d

platform/target: Add SDHCI support for Ferrum

Add SDHCI support for Ferrum.

Change-Id: I8af069c86ce089ed8459bc9a1591e19bc21b0676

platform/ferrum/include/platform/iomap.h

diff --git a/platform/ferrum/include/platform/iomap.h b/platform/ferrum/include/platform/iomap.h
index 14109d7..5ac39ac 100644
--- a/platform/ferrum/include/platform/iomap.h
+++ b/platform/ferrum/include/platform/iomap.h
@@ -47,7 +47,16 @@
 #define PERIPH_SS_BASE              0x07800000
 
 #define MSM_SDC1_BASE               (PERIPH_SS_BASE + 0x00024000)
+#define MSM_SDC1_SDHCI_BASE         (PERIPH_SS_BASE + 0x00024900)
 #define MSM_SDC2_BASE               (PERIPH_SS_BASE + 0x00064000)
+#define MSM_SDC2_SDHCI_BASE         (PERIPH_SS_BASE + 0x00064900)
+
+/* SDHCI */
+#define SDCC_MCI_HC_MODE            (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG   (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG     (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG    (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG      (0x000000E8)
 
 #define BLSP1_UART0_BASE            (PERIPH_SS_BASE + 0x000AF000)
 #define BLSP1_UART1_BASE            (PERIPH_SS_BASE + 0x000B0000)