platform: msm_shared: Fix clock supply to card
When enabling HS400 mode the sdcc clock is run at 400MHZ and is not
reverted back to 200MHZ after enabling hs200 mode, due to this
clock supply to the card in DDR, HS_TIMING mode is double of the
value given by the spec. Revert back to 200MHZ after executing tuning
and disable mci clock divider so that we can use sdhc clock divider to
supply clock to the card.
CRs-Fixed: 703891
Change-Id: Id6e19f2df6ef0139bcfcb104c04f64fddc0c0d64
diff --git a/platform/msm_shared/mmc_sdhci.c b/platform/msm_shared/mmc_sdhci.c
index 7b76875..982af7a 100644
--- a/platform/msm_shared/mmc_sdhci.c
+++ b/platform/msm_shared/mmc_sdhci.c
@@ -878,15 +878,27 @@
sdhci_msm_set_mci_clk(host);
clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
}
+
+ /* Execute Tuning for hs200 mode */
+ if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
+ dprintf(CRITICAL, "Tuning for hs200 failed\n");
+
+ /* Once the tuning is executed revert back the clock to 200MHZ
+ * and disable the MCI_CLK divider so that we can use SDHC clock
+ * divider to supply clock to the card
+ */
+ if (host->timing == MMC_HS400_TIMING)
+ {
+ MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
+ sdhci_msm_set_mci_clk(host);
+ clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
+ }
else
{
/* Save the timing value, before changing the clock */
MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
}
- /* Execute Tuning for hs200 mode */
- if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
- dprintf(CRITICAL, "Tuning for hs200 failed\n");
DBG("\n Enabling HS200 Mode Done\n");
@@ -1034,6 +1046,8 @@
* Enable HS400 mode
*/
sdhci_msm_set_mci_clk(host);
+ /* Set the clock back to 400 MHZ */
+ clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
/* 7. Execute Tuning for hs400 mode */
if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))