| commit | 65df150b03c12c584c4849cff938df0e49e6a019 | [log] [tgz] |
|---|---|---|
| author | Deepa Dinamani <deepad@codeaurora.org> | Mon Jul 29 13:23:04 2013 -0700 |
| committer | Deepa Dinamani <deepad@codeaurora.org> | Mon Aug 12 10:35:00 2013 -0700 |
| tree | ea13a638522e29a3ea6a446b320fdd9d753d2eb1 | |
| parent | 52eb0b34e09dab86b4601872fca0fab3a22019a2 [diff] [blame] |
arch: arm: Add support to clean and invalidate cache at unaligned addresses. Change-Id: I2006160a4486685525092b78b1cb138ffea1ec68
diff --git a/arch/arm/include/arch/defines.h b/arch/arm/include/arch/defines.h index d08988e..f1e5228 100644 --- a/arch/arm/include/arch/defines.h +++ b/arch/arm/include/arch/defines.h
@@ -48,5 +48,6 @@ #define dsb() __asm__ volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0): "memory"); #endif -#endif +#define GET_CAHE_LINE_START_ADDR(addr) ROUNDDOWN(addr, CACHE_LINE) +#endif