platform: msm9640: Update the SDCC1 freq table
Due to hw limitation sdcc1 clock can be run only at 171Mhz. Update
the frequency table for sdcc1 to support 171Mhz.
Change-Id: I7e9fb9366bd3de89bc459f00f3a40904af987d96
diff --git a/platform/mdm9640/acpuclock.c b/platform/mdm9640/acpuclock.c
index 59ff6b3..40827eb 100644
--- a/platform/mdm9640/acpuclock.c
+++ b/platform/mdm9640/acpuclock.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -150,9 +150,9 @@
{
ret = clk_get_set_enable(clk_name, 200000000, 1);
}
- else if(freq == MMC_CLK_177MHZ)
+ else if(freq == MMC_CLK_171MHZ)
{
- ret = clk_get_set_enable(clk_name, 177770000, 1);
+ ret = clk_get_set_enable(clk_name, 171430000, 1);
}
else
{