dev: gcdb: display: update pll settings to support new frequency range
Update the min and max frequencies that the PLL will support.
Modify the auto calculator to support this frequency range.
Change-Id: Id767d8b0d08eeefb5e1387c64acf41ea84edafe8
diff --git a/dev/gcdb/display/gcdb_autopll.c b/dev/gcdb/display/gcdb_autopll.c
index e2e497f..cff176f 100755
--- a/dev/gcdb/display/gcdb_autopll.c
+++ b/dev/gcdb/display/gcdb_autopll.c
@@ -144,7 +144,7 @@
{
uint32_t refclk = 19200000;
uint32_t vco_rate = pll_data.vco_clock;
- uint32_t tmp, mod;
+ uint32_t tmp;
vco_rate /= 2;
pll_data.dec_start = vco_rate / refclk;
@@ -157,16 +157,13 @@
pll_data.frac_start = tmp;
vco_rate *= 2; /* restore */
- tmp = vco_rate / refclk;/* div 1000 first */
- mod = vco_rate % refclk;
- tmp *= 127;
- mod *= 127;
- mod /= refclk;
- tmp += mod;
+ tmp = vco_rate / (refclk / 1000);/* div 1000 first */
+ tmp *= 1024;
+ tmp /= 1000;
tmp /= 10;
- pll_data.lock_comp = tmp;
+ pll_data.lock_comp = tmp - 1;
- dprintf(SPEW, "%s: dec_start=%u dec_frac=%u lock_comp=%u\n", __func__,
+ dprintf(SPEW, "%s: dec_start=0x%x dec_frac=0x%x lock_comp=0x%x\n", __func__,
pll_data.dec_start, pll_data.frac_start, pll_data.lock_comp);
}