msm8660: Add support to shutdown the device in case of RTC alarm.

Change-Id: Idb0d42b2e7bc662d608edc6eb4eb41ebbf80d244
diff --git a/platform/msm8x60/gpio.c b/platform/msm8x60/gpio.c
index b57d893..d7bd786 100644
--- a/platform/msm8x60/gpio.c
+++ b/platform/msm8x60/gpio.c
@@ -87,3 +87,8 @@
 	}
 }
 
+void gpio_config_pshold(void)
+{
+	gpio_tlmm_config(92, 1, GPIO_OUTPUT, GPIO_NO_PULL, GPIO_12MA, GPIO_DISABLE);
+}
+
diff --git a/platform/msm8x60/include/platform/iomap.h b/platform/msm8x60/include/platform/iomap.h
index bd55f18..39fa22b 100755
--- a/platform/msm8x60/include/platform/iomap.h
+++ b/platform/msm8x60/include/platform/iomap.h
@@ -53,11 +53,13 @@
 #define MSM_ACC0_BASE	0x02041000
 #define MSM_ACC1_BASE	0x02051000
 
+#define TLMM_BASE_ADDR      0x00800000
+
 #define TCSR_WDOG_CFG   0x30
 #define MSM_WDT0_RST    (MSM_TMR_BASE + 0x38)
 #define MSM_WDT0_EN     (MSM_TMR_BASE + 0x40)
 #define MSM_WDT0_BT     (MSM_TMR_BASE + 0x4C)
-
+#define MSM_PSHOLD_CTL_SU   (TLMM_BASE_ADDR + 0x820)
 
 #define MSM_SDC1_BASE       0x12400000
 #define MSM_CRYPTO_BASE     0x18500000
diff --git a/platform/msm8x60/pmic.c b/platform/msm8x60/pmic.c
index 1c4bbfc..189060f 100755
--- a/platform/msm8x60/pmic.c
+++ b/platform/msm8x60/pmic.c
@@ -29,12 +29,44 @@
 
 #include <debug.h>
 #include <reg.h>
+#include <bits.h>
 #include <platform/iomap.h>
 #include <platform/pmic.h>
 
 #define TRUE  1
 #define FALSE 0
 
+/* FTS regulator PMR registers */
+#define SSBI_REG_ADDR_S1_PMR		(0xA7)
+#define SSBI_REG_ADDR_S2_PMR		(0xA8)
+#define SSBI_REG_ADDR_S3_PMR		(0xA9)
+#define SSBI_REG_ADDR_S4_PMR		(0xAA)
+
+#define REGULATOR_PMR_STATE_MASK	0x60
+#define REGULATOR_PMR_STATE_OFF		0x20
+
+/* Regulator control registers for shutdown/reset */
+#define SSBI_REG_ADDR_L22_CTRL		0x121
+
+/* SLEEP CNTL register */
+#define SSBI_REG_ADDR_SLEEP_CNTL	0x02B
+
+#define PM8058_SLEEP_SMPL_EN_MASK	0x04
+#define PM8058_SLEEP_SMPL_EN_RESET	0x04
+#define PM8058_SLEEP_SMPL_EN_PWR_OFF	0x00
+
+/* PON CNTL 1 register */
+#define SSBI_REG_ADDR_PON_CNTL_1	0x01C
+
+#define PM8058_PON_PUP_MASK		0xF0
+
+#define PM8058_PON_WD_EN_MASK		0x08
+#define PM8058_PON_WD_EN_RESET		0x08
+#define PM8058_PON_WD_EN_PWR_OFF	0x00
+
+#define PM8058_RTC_CTRL		0x1E8
+#define PM8058_RTC_ALARM_ENABLE	BIT(1)
+
 #define PM_IRQ_ID_TO_BLOCK_INDEX(id) (uint8_t)(id / 8)
 #define PM_IRQ_ID_TO_BIT_MASK(id)    (uint8_t)(1 << (id % 8))
 
@@ -186,3 +218,113 @@
     reg |= (*buffer & mask);
     return pm8901_write(&reg, 1, addr);
 }
+
+int pm8901_reset_pwr_off(int reset)
+{
+	int rc = 0, i;
+	uint8_t pmr;
+	uint8_t pmr_addr[4] = {
+		SSBI_REG_ADDR_S2_PMR,
+		SSBI_REG_ADDR_S3_PMR,
+		SSBI_REG_ADDR_S4_PMR,
+		SSBI_REG_ADDR_S1_PMR,
+	};
+
+	/* Turn off regulators S1, S2, S3, S4 when shutting down. */
+	if (!reset) {
+		for (i = 0; i < 4; i++) {
+			rc = pm8901_read(&pmr, 1, pmr_addr[i]);
+			if (rc) {
+				goto get_out;
+			}
+
+			pmr &= ~REGULATOR_PMR_STATE_MASK;
+			pmr |= REGULATOR_PMR_STATE_OFF;
+
+			rc = pm8901_write(&pmr, 1, pmr_addr[i]);
+			if (rc) {
+				goto get_out;
+			}
+		}
+	}
+
+get_out:
+	return rc;
+}
+
+int pm8058_reset_pwr_off(int reset)
+{
+	int rc;
+	uint8_t pon, ctrl, smpl;
+
+	/* Set regulator L22 to 1.225V in high power mode. */
+	rc = pm8058_read(SSBI_REG_ADDR_L22_CTRL, &ctrl, 1);
+	if (rc) {
+		goto get_out3;
+	}
+	/* Leave pull-down state intact. */
+	ctrl &= 0x40;
+	ctrl |= 0x93;
+
+	rc = pm8058_write(SSBI_REG_ADDR_L22_CTRL, &ctrl, 1);
+	if (rc) {
+	}
+
+get_out3:
+	if (!reset) {
+		/* Only modify the SLEEP_CNTL reg if shutdown is desired. */
+		rc = pm8058_read(SSBI_REG_ADDR_SLEEP_CNTL, &smpl, 1);
+		if (rc) {
+			goto get_out2;
+		}
+
+		smpl &= ~PM8058_SLEEP_SMPL_EN_MASK;
+		smpl |= PM8058_SLEEP_SMPL_EN_PWR_OFF;
+
+		rc = pm8058_write(SSBI_REG_ADDR_SLEEP_CNTL, &smpl, 1);
+		if (rc)
+		{
+		}
+	}
+
+get_out2:
+	rc = pm8058_read(SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);
+	if (rc) {
+		goto get_out;
+	}
+
+	pon &= ~PM8058_PON_WD_EN_MASK;
+	pon |= reset ? PM8058_PON_WD_EN_RESET : PM8058_PON_WD_EN_PWR_OFF;
+
+	/* Enable all pullups */
+	pon |= PM8058_PON_PUP_MASK;
+
+	rc = pm8058_write(SSBI_REG_ADDR_PON_CNTL_1, &pon, 1);
+	if (rc) {
+		goto get_out;
+	}
+
+get_out:
+	return rc;
+}
+
+int pm8058_rtc0_alarm_irq_disable(void)
+{
+	int rc;
+	uint8_t reg;
+
+	rc = pm8058_read(PM8058_RTC_CTRL, &reg, 1);
+	if (rc)
+	{
+		return rc;
+	}
+	reg = (reg & ~PM8058_RTC_ALARM_ENABLE);
+
+	rc = pm8058_write(PM8058_RTC_CTRL, &reg, 1);
+	if (rc) {
+		return rc;
+	}
+
+	return rc;
+}
+
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 63fbabf..85da9f1 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -297,5 +297,6 @@
 
 /* Power on reason/status info */
 #define PWR_ON_EVENT_USB_CHG 0x20
+#define PWR_ON_EVENT_RTC_ALARM 0x2
 
 #endif /* __PLATFORM_MSM_SHARED_SMEM_H */