platform: apq8084: Reset phy common control block
Reset common phy control block during usb init. If we do
not reset phy common block the registers are not in reset
state & that causes issues with USB enumeration.
CRs-Fixed: 568715
Change-Id: I5273e9a62499a48932881ff12b2c61984789b990
diff --git a/platform/apq8084/include/platform/iomap.h b/platform/apq8084/include/platform/iomap.h
index 38ffe6c..55e0002 100644
--- a/platform/apq8084/include/platform/iomap.h
+++ b/platform/apq8084/include/platform/iomap.h
@@ -126,6 +126,7 @@
#define GCC_USB3_PHY_BCR (CLK_CTL_BASE + 0x03FC)
#define GCC_USB30_GDSCR (CLK_CTL_BASE + 0x1E84)
+#define GCC_USB30_PHY_COM_BCR (CLK_CTL_BASE + 0x1E80)
/* USB30 base */
#define MSM_USB30_BASE 0xF9200000
diff --git a/target/apq8084/init.c b/target/apq8084/init.c
index 7e3e458..bf6aedc 100644
--- a/target/apq8084/init.c
+++ b/target/apq8084/init.c
@@ -525,4 +525,10 @@
writel(val, COPSS_USB_CONTROL_WITH_JDR);
udelay(10);
writel(val & ~BIT(11), COPSS_USB_CONTROL_WITH_JDR);
+
+ /* PHY_COMMON reset */
+ val = readl(GCC_USB30_PHY_COM_BCR) | BIT(0);
+ writel(val, GCC_USB30_PHY_COM_BCR);
+ udelay(10);
+ writel(val & ~BIT(0), GCC_USB30_PHY_COM_BCR);
}