mmc: sdhci: Use sdhci_reset to reset cmd & data lines
Use sdhci_reset to reset cmd & data lines, also use timeout
for reset complete check.
CRs-Fixed: 525369
Change-Id: I0158d4515064f52285cfcd6e58f524f7bd111820
diff --git a/platform/msm_shared/include/sdhci.h b/platform/msm_shared/include/sdhci.h
index ef48d1d..976b5e3 100644
--- a/platform/msm_shared/include/sdhci.h
+++ b/platform/msm_shared/include/sdhci.h
@@ -160,6 +160,7 @@
#define SDHCI_SOFT_RESET BIT(0)
#define SOFT_RESET_CMD BIT(1)
#define SOFT_RESET_DATA BIT(2)
+#define SDHCI_RESET_MAX_TIMEOUT 0x64
#define SDHCI_1_8_VOL_SET BIT(3)
/*
@@ -281,7 +282,6 @@
/*
* Power control relatd macros
*/
-#define SDHCI_SOFT_RESET_MASK (BIT(0) | BIT(1) | BIT(2))
#define SDCC_HC_PWR_CTRL_INT 0xF
#define SDCC_HC_BUS_ON BIT(0)
#define SDCC_HC_BUS_OFF BIT(1)
diff --git a/platform/msm_shared/sdhci.c b/platform/msm_shared/sdhci.c
index ce54433..03996f9 100644
--- a/platform/msm_shared/sdhci.c
+++ b/platform/msm_shared/sdhci.c
@@ -40,6 +40,38 @@
/*
+ * Function: sdhci reset
+ * Arg : Host structure & mask to write to reset register
+ * Return : None
+ * Flow: : Reset the host controller
+ */
+static void sdhci_reset(struct sdhci_host *host, uint8_t mask)
+{
+ uint32_t reg;
+ uint32_t timeout = SDHCI_RESET_MAX_TIMEOUT;
+
+ REG_WRITE8(host, mask, SDHCI_RESET_REG);
+
+ /* Wait for the reset to complete */
+ do {
+ reg = REG_READ8(host, SDHCI_RESET_REG);
+ reg &= mask;
+
+ if (!reg)
+ break;
+ if (!timeout)
+ {
+ dprintf(CRITICAL, "Error: sdhci reset failed for: %x\n", mask);
+ break;
+ }
+
+ timeout--;
+ mdelay(1);
+
+ } while(1);
+}
+
+/*
* Function: sdhci error status enable
* Arg : Host structure
* Return : None
@@ -424,14 +456,14 @@
if (sdhci_cmd_err_status(host)) {
dprintf(CRITICAL, "Error: Command completed with errors\n");
/* Reset the command & Data line */
- REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
+ sdhci_reset(host, (SOFT_RESET_CMD | SOFT_RESET_DATA));
return 1;
}
}
/* Reset data & command line */
if (cmd->data_present)
- REG_WRITE8(host, (SOFT_RESET_CMD | SOFT_RESET_DATA), SDHCI_RESET_REG);
+ sdhci_reset(host, (SOFT_RESET_CMD | SOFT_RESET_DATA));
return 0;
}
@@ -714,28 +746,6 @@
}
/*
- * Function: sdhci reset
- * Arg : Host structure
- * Return : None
- * Flow: : Reset the host controller
- */
-static void sdhci_reset(struct sdhci_host *host)
-{
- uint32_t reg;
-
- REG_WRITE8(host, SDHCI_SOFT_RESET, SDHCI_RESET_REG);
-
- /* Wait for the reset to complete */
- do {
- reg = REG_READ8(host, SDHCI_RESET_REG);
- reg &= SDHCI_SOFT_RESET_MASK;
-
- if (!reg)
- break;
- } while(1);
-}
-
-/*
* Function: sdhci init
* Arg : Host structure
* Return : None
@@ -754,7 +764,7 @@
/*
* Reset the controller
*/
- sdhci_reset(host);
+ sdhci_reset(host, SDHCI_SOFT_RESET);
/* Read the capabilities register & store the info */
caps[0] = REG_READ32(host, SDHCI_CAPS_REG1);