| commit | 7e9ce93dad4450cda462679359f0699c2a599aa3 | [log] [tgz] |
|---|---|---|
| author | Dhaval Patel <pdhaval@codeaurora.org> | Wed Apr 16 10:54:32 2014 -0700 |
| committer | Dhaval Patel <pdhaval@codeaurora.org> | Mon Apr 21 11:50:32 2014 -0700 |
| tree | c79cd9dcaa76ba09297a1e74ced6fbb6932d91c1 | |
| parent | e5ad19959848f391ecfb7b1b09d7ee6c6a6396ba [diff] |
target: Remove pll configuration for DSI1 PHY Remove pll configuration for dsi1_phy because pclk0 and pclk1 are sourced from dsi0 PHY in all dual dsi cases. CRs-fixed: 642087 Change-Id: I180320e4378b6c094cbe952a7dcfeffedd27074f