platform: msm_shared: Ignore End Of Transfer(EOT) interrupt
Ignore End Of Transfer interrupt as we may receive late EOT
in certain cases. If we dont clear them it might affect the subsequent
BAM interrupts.
Change-Id: I4363074a56115d1261b6e55153e55758634e12e3
diff --git a/platform/msm_shared/bam.c b/platform/msm_shared/bam.c
index bd7a595..b2b9e22 100644
--- a/platform/msm_shared/bam.c
+++ b/platform/msm_shared/bam.c
@@ -79,6 +79,7 @@
enum p_int_type interrupt)
{
uint32_t val;
+ uint32_t bamsts;
while (1)
{
@@ -90,8 +91,12 @@
} while (!((val & 0x7FFF) & (1 << bam->pipe[pipe_num].pipe_num)));
/* Check the reason for this BAM interrupt */
- if (readl(BAM_IRQ_STTS(bam->base)))
+ bamsts = readl(BAM_IRQ_STTS(bam->base));
+ if (bamsts)
+ {
+ dprintf(CRITICAL,"ERROR:BAM_IRQ_STTS %u \n", bamsts);
goto bam_wait_int_error;
+ }
/* Check the interrupt type */
/* Read interrupt status register */
@@ -109,17 +114,11 @@
writel (val, BAM_P_IRQ_CLRn(bam->pipe[pipe_num].pipe_num, bam->base));
return BAM_RESULT_SUCCESS;
}
- else if (val & P_TRNSFR_END_EN_MASK)
- {
- dprintf(CRITICAL,
- "Trasfer end signalled before the last descc was processed\n");
- goto bam_wait_int_error;
- }
}
bam_wait_int_error:
- dprintf(CRITICAL, "Unexpected interrupt\n");
+ dprintf(CRITICAL, "Unexpected interrupt : val %u\n", val);
return BAM_RESULT_FAILURE;
}
@@ -128,7 +127,7 @@
{
uint32_t int_mask = P_ERR_EN_MASK | P_OUT_OF_DESC_EN_MASK |
- P_PRCSD_DESC_EN_MASK | P_TRNSFR_END_EN_MASK;
+ P_PRCSD_DESC_EN_MASK;
uint32_t val;
/* Leave BAM error interrupts disabled. */