Merge "platform: msm_shared: Do not return pointer allocated on stack"
diff --git a/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h b/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h
new file mode 100644
index 0000000..cffc982
--- /dev/null
+++ b/dev/gcdb/display/include/panel_ili9806e_fwvga_video.h
@@ -0,0 +1,814 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are
+* met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above
+* copyright notice, this list of conditions and the following
+* disclaimer in the documentation and/or other materials provided
+* with the distribution.
+* * Neither the name of The Linux Foundation nor the names of its
+* contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+/*---------------------------------------------------------------------------
+ * This file is autogenerated file using gcdb parser. Please do not edit it.
+ * Update input XML file to add a new entry or update variable in this file
+ * VERSION = "1.0"
+ *---------------------------------------------------------------------------*/
+
+#ifndef _PANEL_ILI9806E_FWVGA_VIDEO_H_
+#define _PANEL_ILI9806E_FWVGA_VIDEO_H_
+/*---------------------------------------------------------------------------*/
+/* HEADER files */
+/*---------------------------------------------------------------------------*/
+#include "panel.h"
+
+/*---------------------------------------------------------------------------*/
+/* Panel configuration */
+/*---------------------------------------------------------------------------*/
+static struct panel_config ili9806e_fwvga_video_panel_data = {
+ "qcom,mdss_dsi_ili9806e_fwvga_video", "dsi:0:", "qcom,mdss-dsi-panel",
+ 10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel resolution */
+/*---------------------------------------------------------------------------*/
+static struct panel_resolution ili9806e_fwvga_video_panel_res = {
+ 480, 854, 52, 100, 24, 0, 8, 20, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel color information */
+/*---------------------------------------------------------------------------*/
+static struct color_info ili9806e_fwvga_video_color = {
+ 24, 0, 0xff, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel on/off command information */
+/*---------------------------------------------------------------------------*/
+static char ili9806e_fwvga_video_on_cmd0[] = {
+ 0x06, 0x00, 0x39, 0xC0,
+ 0xFF, 0xFF, 0x98, 0x06,
+ 0x04, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd1[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x08, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd2[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x21, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd3[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x30, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd4[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x31, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd5[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x40, 0x16, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd6[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x41, 0x33, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd7[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x42, 0x03, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd8[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x43, 0x89, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd9[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x44, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd10[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x50, 0x80, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd11[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x51, 0x80, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd12[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x52, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd13[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x53, 0x43, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd14[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x60, 0x07, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd15[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x61, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd16[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x62, 0x07, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd17[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x63, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd18[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA0, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd19[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA1, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd20[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA2, 0x0A, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd21[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA3, 0x10, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd22[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA4, 0x0B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd23[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA5, 0x1C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd24[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA6, 0x0B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd25[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA7, 0x09, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd26[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA8, 0x05, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd27[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xA9, 0x0B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd28[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAA, 0x07, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd29[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAB, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd30[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAC, 0x0E, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd31[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAD, 0x29, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd32[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAE, 0x25, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd33[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xAF, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd34[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC0, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd35[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC1, 0x02, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd36[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC2, 0x07, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd37[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC3, 0x0C, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd38[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC4, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd39[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC5, 0x18, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd40[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC6, 0x0B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd41[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC7, 0x0A, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd42[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC8, 0x02, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd43[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xC9, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd44[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCA, 0x03, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd45[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCB, 0x03, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd46[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCC, 0x0B, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd47[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCD, 0x2A, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd48[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCE, 0x25, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd49[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0xCF, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd50[] = {
+ 0x06, 0x00, 0x39, 0xC0,
+ 0xFF, 0xFF, 0x98, 0x06,
+ 0x04, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd51[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x00, 0x20, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd52[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x01, 0x0A, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd53[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x02, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd54[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x03, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd55[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x04, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd56[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x05, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd57[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x06, 0x98, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd58[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x07, 0x06, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd59[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x08, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd60[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x09, 0x80, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd61[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd62[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd63[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0C, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd64[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0D, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd65[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0E, 0x05, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd66[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x0F, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd67[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x10, 0xF0, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd68[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x11, 0xF4, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd69[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x12, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd70[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x13, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd71[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x14, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd72[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x15, 0xC0, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd73[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x16, 0x08, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd74[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x17, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd75[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x18, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd76[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x19, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd77[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x1A, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd78[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x1B, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd79[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x1C, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd80[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x1D, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd81[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x20, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd82[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x21, 0x23, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd83[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x22, 0x45, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd84[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x23, 0x67, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd85[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x24, 0x01, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd86[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x25, 0x23, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd87[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x26, 0x45, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd88[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x27, 0x67, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd89[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x30, 0x11, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd90[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x31, 0x11, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd91[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x32, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd92[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x33, 0xEE, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd93[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x34, 0xFF, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd94[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x35, 0xBB, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd95[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x36, 0xAA, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd96[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x37, 0xDD, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd97[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x38, 0xCC, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd98[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x39, 0x66, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd99[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3A, 0x77, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd100[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3B, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd101[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3C, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd102[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3D, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd103[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3E, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd104[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x3F, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd105[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x40, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd106[] = {
+ 0x06, 0x00, 0x39, 0xC0,
+ 0xFF, 0xFF, 0x98, 0x06,
+ 0x04, 0x07, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd107[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x17, 0x22, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd108[] = {
+ 0x02, 0x00, 0x39, 0xC0,
+ 0x02, 0x77, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd109[] = {
+ 0x06, 0x00, 0x39, 0xC0,
+ 0xFF, 0xFF, 0x98, 0x06,
+ 0x04, 0x00, 0xFF, 0xFF,
+};
+
+static char ili9806e_fwvga_video_on_cmd110[] = {
+ 0x11, 0x00, 0x05, 0x80
+};
+
+static char ili9806e_fwvga_video_on_cmd111[] = {
+ 0x29, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd ili9806e_fwvga_video_on_command[] = {
+ {0xc, ili9806e_fwvga_video_on_cmd0, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd1, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd2, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd3, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd4, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd5, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd6, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd7, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd8, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd9, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd10, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd11, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd12, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd13, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd14, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd15, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd16, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd17, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd18, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd19, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd20, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd21, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd22, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd23, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd24, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd25, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd26, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd27, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd28, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd29, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd30, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd31, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd32, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd33, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd34, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd35, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd36, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd37, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd38, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd39, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd40, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd41, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd42, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd43, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd44, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd45, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd46, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd47, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd48, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd49, 0x00},
+ {0xc, ili9806e_fwvga_video_on_cmd50, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd51, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd52, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd53, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd54, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd55, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd56, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd57, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd58, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd59, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd60, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd61, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd62, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd63, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd64, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd65, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd66, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd67, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd68, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd69, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd70, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd71, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd72, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd73, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd74, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd75, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd76, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd77, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd78, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd79, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd80, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd81, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd82, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd83, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd84, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd85, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd86, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd87, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd88, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd89, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd90, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd91, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd92, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd93, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd94, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd95, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd96, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd97, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd98, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd99, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd100, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd101, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd102, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd103, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd104, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd105, 0x00},
+ {0xc, ili9806e_fwvga_video_on_cmd106, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd107, 0x00},
+ {0x8, ili9806e_fwvga_video_on_cmd108, 0x00},
+ {0xc, ili9806e_fwvga_video_on_cmd109, 0x00},
+ {0x4, ili9806e_fwvga_video_on_cmd110, 0x96},
+ {0x4, ili9806e_fwvga_video_on_cmd111, 0x78}
+};
+
+#define ILI9806E_FWVGA_VIDEO_ON_COMMAND 112
+
+
+static char ili9806e_fwvga_videooff_cmd0[] = {
+ 0x28, 0x00, 0x05, 0x80
+};
+
+static char ili9806e_fwvga_videooff_cmd1[] = {
+ 0x10, 0x00, 0x05, 0x80
+};
+
+static struct mipi_dsi_cmd ili9806e_fwvga_video_off_command[] = {
+ {0x4, ili9806e_fwvga_videooff_cmd0, 0x32},
+ {0x4, ili9806e_fwvga_videooff_cmd1, 0x78}
+};
+
+#define ILI9806E_FWVGA_VIDEO_OFF_COMMAND 2
+
+
+static struct command_state ili9806e_fwvga_video_state = {
+ 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Command mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct commandpanel_info ili9806e_fwvga_video_command_panel = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Video mode panel information */
+/*---------------------------------------------------------------------------*/
+static struct videopanel_info ili9806e_fwvga_video_video_panel = {
+ 1, 0, 0, 0, 1, 1, 2, 0, 0x9
+};
+
+/*---------------------------------------------------------------------------*/
+/* Lane configuration */
+/*---------------------------------------------------------------------------*/
+static struct lane_configuration ili9806e_fwvga_video_lane_config = {
+ 2, 0, 1, 1, 0, 0
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel timing */
+/*---------------------------------------------------------------------------*/
+static const uint32_t ili9806e_fwvga_video_timings[] = {
+ 0x73, 0x21, 0x1A, 0x00, 0x31, 0x30, 0x1E, 0x23, 0x2B, 0x03, 0x04, 0x00
+};
+
+static struct panel_timing ili9806e_fwvga_video_timing_info = {
+ 0, 4, 0x20, 0x2C
+};
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence */
+/*---------------------------------------------------------------------------*/
+static struct panel_reset_sequence ili9806e_fwvga_video_reset_seq = {
+ {1, 0, 1, }, {20, 20, 20, }, 2
+};
+
+/*---------------------------------------------------------------------------*/
+/* Backlight setting */
+/*---------------------------------------------------------------------------*/
+static struct backlight ili9806e_fwvga_video_backlight = {
+ 1, 1, 4095, 100, 1, "PMIC_8941"
+};
+
+#define ILI9806E_FWVGA_VIDEO_SIGNATURE 0xFFFF
+#endif /*_PANEL_ILI9806E_FWVGA_VIDEO_H_*/
diff --git a/platform/msm_shared/mipi_dsi.c b/platform/msm_shared/mipi_dsi.c
index 641c4d1..1932549 100644
--- a/platform/msm_shared/mipi_dsi.c
+++ b/platform/msm_shared/mipi_dsi.c
@@ -487,6 +487,51 @@
return 0;
}
+void mdss_dsi_panel_shutdown(struct msm_panel_info *pinfo)
+{
+#if (DISPLAY_TYPE_MDSS == 1)
+ unsigned long read_val = 0;
+ if (pinfo->mipi.panel_off_cmds) {
+ /*
+ * Once MDP TG is disabled, reset of DSI controller is
+ * needed before we send panel OFF commands.
+ */
+ if (pinfo->type == MIPI_VIDEO_PANEL) {
+ read_val = readl(MIPI_DSI0_BASE + CTRL);
+ writel((read_val & ~BIT(0)), MIPI_DSI0_BASE + CTRL);
+ writel(0x0001, MIPI_DSI0_BASE + SOFT_RESET);
+ dsb();
+ writel(0x0000, MIPI_DSI0_BASE + SOFT_RESET);
+ dsb();
+ /* Enable cmd mode only */
+ writel(((read_val & ~BIT(1)) | BIT(2)),
+ MIPI_DSI0_BASE + CTRL);
+ }
+
+ if (pinfo->mipi.broadcast) {
+ if (pinfo->type == MIPI_VIDEO_PANEL) {
+ read_val = readl(MIPI_DSI1_BASE + CTRL);
+ writel((read_val & ~BIT(0)),
+ MIPI_DSI1_BASE + CTRL);
+
+ writel(0x0001, MIPI_DSI1_BASE + SOFT_RESET);
+ dsb();
+ writel(0x0000, MIPI_DSI1_BASE + SOFT_RESET);
+ dsb();
+
+ writel(((read_val & ~BIT(1)) | BIT(2)),
+ MIPI_DSI1_BASE + CTRL);
+ }
+ mdss_dual_dsi_cmds_tx(pinfo->mipi.panel_off_cmds,
+ pinfo->mipi.num_of_panel_off_cmds);
+ } else {
+ mipi_dsi_cmds_tx(pinfo->mipi.panel_off_cmds,
+ pinfo->mipi.num_of_panel_off_cmds);
+ }
+ }
+#endif
+}
+
int mdss_dsi_panel_initialize(struct mipi_dsi_panel_config *pinfo, uint32_t
broadcast)
{
@@ -902,11 +947,8 @@
{
if(!target_cont_splash_screen())
{
+ mdss_dsi_panel_shutdown(pinfo);
writel(0, DSI_CLK_CTRL);
- writel(0x1F1, DSI_CTRL);
- mdelay(10);
- writel(0x0001, DSI_SOFT_RESET);
- writel(0x0000, DSI_SOFT_RESET);
writel(0, DSI_CTRL);
}
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index cbc89f3..c22c8e9 100755
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -349,6 +349,7 @@
endif
ifeq ($(PLATFORM),mdm9640)
+DEFINES += DISPLAY_TYPE_QPIC=1
OBJS += $(LOCAL_DIR)/qgic.o \
$(LOCAL_DIR)/uart_dm.o \
$(LOCAL_DIR)/interrupts.o \
@@ -365,7 +366,10 @@
$(LOCAL_DIR)/gpio.o \
$(LOCAL_DIR)/scm.o \
$(LOCAL_DIR)/qmp_usb30_phy.o \
- $(LOCAL_DIR)/qusb2_phy.o
+ $(LOCAL_DIR)/qusb2_phy.o \
+ $(LOCAL_DIR)/display.o \
+ $(LOCAL_DIR)/qpic.o \
+ $(LOCAL_DIR)/qpic_panel.o
endif
ifeq ($(PLATFORM),fsm9900)
diff --git a/platform/msm_shared/smem.h b/platform/msm_shared/smem.h
index 254d6a4..b9cb855 100644
--- a/platform/msm_shared/smem.h
+++ b/platform/msm_shared/smem.h
@@ -398,6 +398,7 @@
MDM9309 = 261,
MDM9609 = 262,
MSM8239 = 263,
+ APQ8009 = 265,
};
enum platform {
diff --git a/target/fsm9900/rules.mk b/target/fsm9900/rules.mk
index 0416f39..e4909eb 100644
--- a/target/fsm9900/rules.mk
+++ b/target/fsm9900/rules.mk
@@ -4,15 +4,15 @@
PLATFORM := fsm9900
-MEMBASE := 0x0F900000 # SDRAM
+MEMBASE := 0x1e000000 # SDRAM
MEMSIZE := 0x00100000 # 1MB
-BASE_ADDR := 0x00000
+BASE_ADDR := 0x0b600000
TAGS_ADDR := BASE_ADDR+0x00000100
KERNEL_ADDR := BASE_ADDR+0x00008000
RAMDISK_ADDR := BASE_ADDR+0x01000000
-SCRATCH_ADDR := 0x11000000
+SCRATCH_ADDR := 0x0c000000
MODULES += \
dev/keys \
diff --git a/target/mdm9640/init.c b/target/mdm9640/init.c
index 9a4d870..a43af16 100644
--- a/target/mdm9640/init.c
+++ b/target/mdm9640/init.c
@@ -160,7 +160,6 @@
update_ptable_names();
flash_set_ptable(&flash_ptable);
- rpm_smd_init();
}
}
@@ -327,9 +326,14 @@
}
}
+int target_cont_splash_screen()
+{
+ /* FOR OEMs - Set cont_splash_screen to keep the splash enable after LK.*/
+ return false;
+}
+
void target_uninit(void)
{
- rpm_smd_uninit();
if (platform_boot_dev_isemmc())
{
mmc_put_card_to_sleep(dev);
diff --git a/target/mdm9640/qpic_panel_drv.c b/target/mdm9640/qpic_panel_drv.c
new file mode 100755
index 0000000..2c1f776
--- /dev/null
+++ b/target/mdm9640/qpic_panel_drv.c
@@ -0,0 +1,183 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <endian.h>
+#include <platform/gpio.h>
+#include <platform/clock.h>
+#include <regulator.h>
+#include <rpm-smd.h>
+#include <platform/timer.h>
+
+#include "qpic.h"
+#include "qpic_panel.h"
+
+#define GPIOMUX_FUNC_2 2
+#define GPIOMUX_FUNC_GPIO 0
+
+#define RST_GPIO_ID 23
+#define CS_GPIO_ID 21
+#define AD8_GPIO_ID 20
+#define TE_GPIO_ID 22
+#define BL_GPIO_ID 68
+
+#define MEM_ACCESS_MODE 0x48
+#define MEM_ACCESS_FORMAT 0x66
+
+static uint32_t ldo6[][11] = {
+ {
+ LDOA_RES_TYPE, 6,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_DISABLE,
+ KEY_LDO_SOFTWARE_MODE, 4, SW_MODE_LDO_IPEAK,
+ KEY_MICRO_VOLT, 4, 0,
+ },
+ {
+ LDOA_RES_TYPE, 6,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_ENABLE,
+ KEY_LDO_SOFTWARE_MODE, 4, SW_MODE_LDO_IPEAK,
+ KEY_MICRO_VOLT, 4, 1800000,
+ },
+};
+
+static uint32_t ldo12[][11] = {
+ {
+ LDOA_RES_TYPE, 12,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_DISABLE,
+ KEY_LDO_SOFTWARE_MODE, 4, SW_MODE_LDO_IPEAK,
+ KEY_MICRO_VOLT, 4, 0,
+ },
+ {
+ LDOA_RES_TYPE, 12,
+ KEY_SOFTWARE_ENABLE, 4, GENERIC_ENABLE,
+ KEY_LDO_SOFTWARE_MODE, 4, SW_MODE_LDO_IPEAK,
+ KEY_MICRO_VOLT, 4, 2700000,
+ },
+};
+
+static void panel_io_off(struct qpic_panel_io_desc *qpic_panel_io)
+{
+ /* Turning off all gpios */
+ gpio_tlmm_config(RST_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_10MA, GPIO_DISABLE);
+ gpio_tlmm_config(CS_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_10MA, GPIO_DISABLE);
+ gpio_tlmm_config(AD8_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_10MA, GPIO_DISABLE);
+ gpio_tlmm_config(TE_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_10MA, GPIO_DISABLE);
+ gpio_tlmm_config(BL_GPIO_ID, GPIOMUX_FUNC_GPIO, GPIO_INPUT,GPIO_NO_PULL,
+ GPIO_10MA, GPIO_ENABLE);
+ gpio_set(BL_GPIO_ID, 0x0);
+
+ /* Disabling vdd & avdd voltage */
+ rpm_send_data(&ldo6[GENERIC_DISABLE][0], 36, RPM_REQUEST_TYPE);
+ rpm_send_data(&ldo12[GENERIC_DISABLE][0], 36, RPM_REQUEST_TYPE);
+
+ return;
+}
+
+static int panel_io_on(struct qpic_panel_io_desc *qpic_panel_io)
+{
+ int rc = 0;
+
+ /* Setting vdd & avdd voltage */
+ rpm_send_data(&ldo6[GENERIC_ENABLE][0], 36, RPM_REQUEST_TYPE);
+ rpm_send_data(&ldo12[GENERIC_ENABLE][0], 36, RPM_REQUEST_TYPE);
+
+ /* Turning on all gpios */
+ gpio_tlmm_config(RST_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT,GPIO_NO_PULL,
+ GPIO_10MA, GPIO_ENABLE);
+ gpio_tlmm_config(CS_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT,GPIO_NO_PULL,
+ GPIO_10MA, GPIO_ENABLE);
+ gpio_tlmm_config(AD8_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT,GPIO_NO_PULL,
+ GPIO_10MA, GPIO_ENABLE);
+ gpio_tlmm_config(TE_GPIO_ID, GPIOMUX_FUNC_2, GPIO_INPUT,GPIO_NO_PULL,
+ GPIO_10MA, GPIO_ENABLE);
+ gpio_tlmm_config(BL_GPIO_ID, GPIOMUX_FUNC_GPIO, GPIO_INPUT, GPIO_NO_PULL,
+ GPIO_10MA, GPIO_DISABLE);
+ gpio_set(BL_GPIO_ID, 0x2);
+ mdelay(20);
+ return rc;
+}
+
+void ili9341_off(struct qpic_panel_io_desc *qpic_panel_io)
+{
+ panel_io_off(qpic_panel_io);
+}
+
+int ili9341_on(struct qpic_panel_io_desc *qpic_panel_io)
+{
+ uint8_t param[4];
+ int ret;
+
+ ret = panel_io_on(qpic_panel_io);
+ if (ret)
+ return ret;
+ qpic_send_pkt(OP_SOFT_RESET, NULL, 0);
+ /* wait for 120 ms after reset as panel spec suggests */
+ mdelay(120);
+ qpic_send_pkt(OP_SET_DISPLAY_OFF, NULL, 0);
+ /* wait for 20 ms after disply off */
+ mdelay(20);
+
+ /* set memory access control */
+ param[0] = MEM_ACCESS_MODE;
+ qpic_send_pkt(OP_SET_ADDRESS_MODE, param, 1);
+ /* wait for 20 ms after command sent as panel spec suggests */
+ mdelay(20);
+
+ param[0] = MEM_ACCESS_FORMAT;
+ qpic_send_pkt(OP_SET_PIXEL_FORMAT, param, 1);
+ mdelay(20);
+
+ /* set interface */
+ param[0] = 1;
+ param[1] = 0;
+ param[2] = 0;
+ qpic_send_pkt(OP_ILI9341_INTERFACE_CONTROL, param, 3);
+ mdelay(20);
+
+ qpic_send_pkt(OP_EXIT_SLEEP_MODE, NULL, 0);
+ mdelay(20);
+
+ qpic_send_pkt(OP_ENTER_NORMAL_MODE, NULL, 0);
+ mdelay(20);
+
+ qpic_send_pkt(OP_SET_DISPLAY_ON, NULL, 0);
+ mdelay(20);
+
+ param[0] = 0;
+ qpic_send_pkt(OP_ILI9341_TEARING_EFFECT_LINE_ON, param, 1);
+
+ param[0] = qpic_read_data(OP_GET_PIXEL_FORMAT, 1);
+
+ return 0;
+}
+
diff --git a/target/mdm9640/rules.mk b/target/mdm9640/rules.mk
index fd47476..f8c6d35 100644
--- a/target/mdm9640/rules.mk
+++ b/target/mdm9640/rules.mk
@@ -15,15 +15,17 @@
KERNEL_REGION := 0x80000000
KERNEL_REGION_SIZE := 0x01200000 # 18MB
-
+DEFINES += DISPLAY_SPLASH_SCREEN=0
DEFINES += NO_KEYPAD_DRIVER=1
DEFINES += PERIPH_BLK_BLSP=1
+DEVS += fbcon
MODULES += \
dev/keys \
lib/ptable \
dev/pmic/pm8x41 \
- lib/libfdt
+ lib/libfdt \
+ dev/fbcon
DEFINES += \
MEMBASE=$(MEMBASE) \
@@ -41,4 +43,6 @@
OBJS += \
$(LOCAL_DIR)/init.o \
$(LOCAL_DIR)/meminfo.o \
+ $(LOCAL_DIR)/target_display.o \
+ $(LOCAL_DIR)/qpic_panel_drv.o \
$(LOCAL_DIR)/keypad.o
diff --git a/target/mdm9640/target_display.c b/target/mdm9640/target_display.c
new file mode 100644
index 0000000..d3a2fb8
--- /dev/null
+++ b/target/mdm9640/target_display.c
@@ -0,0 +1,74 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of The Linux Foundation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <err.h>
+#include <msm_panel.h>
+#include "splash.h"
+
+/* PANEL INFO */
+#define HVGA_PANEL_XRES 320
+#define HVGA_PANEL_YRES 480
+#define BPP_16 16
+
+/* FB Base Address */
+#define QPIC_FB_ADDR 0x80000000
+
+static struct msm_fb_panel_data panel;
+
+void target_display_init(const char *panel_name)
+{
+ uint32_t ret = 0;
+ dprintf(SPEW, "%s: Panel name = %s\n", __func__, panel_name);
+
+ /* Setting panel info */
+ panel.panel_info.xres = HVGA_PANEL_XRES;
+ panel.panel_info.yres = HVGA_PANEL_YRES;
+ panel.panel_info.bpp = BPP_16;
+ panel.panel_info.type = QPIC_PANEL;
+
+ /* Setting FB info */
+ panel.fb.width = panel.panel_info.xres;
+ panel.fb.height = panel.panel_info.yres;
+ panel.fb.stride = panel.panel_info.xres;
+ panel.fb.bpp = panel.panel_info.bpp;
+ panel.fb.format = FB_FORMAT_RGB565;
+ panel.fb.base = QPIC_FB_ADDR;
+
+ rpm_smd_init();
+ ret = msm_display_init(&panel);
+ if (ret)
+ dprintf(CRITICAL, "%s: ERROR: Display init failed\n", __func__);
+}
+
+void target_display_shutdown(void)
+{
+ msm_display_off();
+ rpm_smd_uninit();
+}
diff --git a/target/msm8909/oem_panel.c b/target/msm8909/oem_panel.c
index 8d69778..014a012 100644
--- a/target/msm8909/oem_panel.c
+++ b/target/msm8909/oem_panel.c
@@ -40,6 +40,7 @@
#include "include/panel_hx8394d_720p_video.h"
#include "include/panel_hx8379a_fwvga_skua_video.h"
#include "include/panel_sharp_qhd_video.h"
+#include "include/panel_ili9806e_fwvga_video.h"
#define DISPLAY_MAX_PANEL_DETECTION 0
@@ -58,6 +59,7 @@
HX8394D_720P_VIDEO_PANEL,
HX8379A_FWVGA_SKUA_VIDEO_PANEL,
SHARP_QHD_VIDEO_PANEL,
+ ILI9806E_FWVGA_VIDEO_PANEL,
UNKNOWN_PANEL
};
@@ -68,7 +70,8 @@
static struct panel_list supp_panels[] = {
{"hx8394d_720p_video", HX8394D_720P_VIDEO_PANEL},
{"hx8379a_fwvga_skua_video", HX8379A_FWVGA_SKUA_VIDEO_PANEL},
- {"sharp_qhd_video", SHARP_QHD_VIDEO_PANEL}
+ {"sharp_qhd_video", SHARP_QHD_VIDEO_PANEL},
+ {"ili9806e_fwvga_video",ILI9806E_FWVGA_VIDEO_PANEL},
};
static uint32_t panel_id;
@@ -176,6 +179,31 @@
= SHARP_QHD_VIDEO_OFF_COMMAND;
memcpy(phy_db->timing, sharp_qhd_video_timings, TIMING_SIZE);
break;
+ case ILI9806E_FWVGA_VIDEO_PANEL:
+ panelstruct->paneldata = &ili9806e_fwvga_video_panel_data;
+ panelstruct->panelres = &ili9806e_fwvga_video_panel_res;
+ panelstruct->color = &ili9806e_fwvga_video_color;
+ panelstruct->videopanel = &ili9806e_fwvga_video_video_panel;
+ panelstruct->commandpanel = &ili9806e_fwvga_video_command_panel;
+ panelstruct->state = &ili9806e_fwvga_video_state;
+ panelstruct->laneconfig = &ili9806e_fwvga_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &ili9806e_fwvga_video_timing_info;
+ panelstruct->panelresetseq
+ = &ili9806e_fwvga_video_reset_seq;
+ panelstruct->backlightinfo = &ili9806e_fwvga_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = ili9806e_fwvga_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = ILI9806E_FWVGA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = ili9806e_fwvga_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = ILI9806E_FWVGA_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ ili9806e_fwvga_video_timings, TIMING_SIZE);
+ pinfo->mipi.signature = ILI9806E_FWVGA_VIDEO_SIGNATURE;
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
@@ -233,6 +261,8 @@
panel_id = HX8379A_FWVGA_SKUA_VIDEO_PANEL;
break;
case QRD_SKUC:
+ panel_id = ILI9806E_FWVGA_VIDEO_PANEL;
+ break;
case QRD_SKUE:
default:
dprintf(CRITICAL, "QRD Display not enabled for %d type\n",
diff --git a/target/msm8916/include/target/display.h b/target/msm8916/include/target/display.h
old mode 100755
new mode 100644
index 1b6b775..d58aff8
--- a/target/msm8916/include/target/display.h
+++ b/target/msm8916/include/target/display.h
@@ -89,6 +89,10 @@
"msmgpio", 8, 3, 1, 0, 1
};
+static struct gpio_pin enable_gpio_skut2 = {
+ "msmgpio", 22, 3, 1, 0, 1
+};
+
/*---------------------------------------------------------------------------*/
/* Target Physical configuration */
/*---------------------------------------------------------------------------*/
@@ -163,6 +167,8 @@
HX8379A_FWVGA_VIDEO_PANEL,
HX8394D_720P_VIDEO_PANEL,
NT35521_WXGA_VIDEO_PANEL,
+ SAMSUNG_WXGA_VIDEO_PANEL,
+ HX8279A_WSVGA_VIDEO_PANEL,
UNKNOWN_PANEL
};
diff --git a/target/msm8916/oem_panel.c b/target/msm8916/oem_panel.c
old mode 100755
new mode 100644
index 5ab2079..d322d2a
--- a/target/msm8916/oem_panel.c
+++ b/target/msm8916/oem_panel.c
@@ -53,10 +53,13 @@
#include "include/panel_hx8379a_fwvga_video.h"
#include "include/panel_hx8394d_720p_video.h"
#include "include/panel_nt35521_wxga_video.h"
+#include "include/panel_samsung_wxga_video.h"
+#include "include/panel_hx8279a_wsvga_video.h"
#define DISPLAY_MAX_PANEL_DETECTION 2
#define OTM8019A_FWVGA_VIDEO_PANEL_ON_DELAY 50
#define NT35590_720P_CMD_PANEL_ON_DELAY 40
+#define SAMSUNG_WXGA_VIDEO_PANEL_ON_DELAY 100
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -83,7 +86,9 @@
{"jdi_fhd_video", JDI_FHD_VIDEO_PANEL},
{"hx8379a_wvga_video", HX8379A_FWVGA_VIDEO_PANEL},
{"hx8394d_720p_video", HX8394D_720P_VIDEO_PANEL},
- {"nt35521_wxga_video", NT35521_WXGA_VIDEO_PANEL}
+ {"nt35521_wxga_video", NT35521_WXGA_VIDEO_PANEL},
+ {"samsung_wxga_video", SAMSUNG_WXGA_VIDEO_PANEL},
+ {"hx8279a_wsvga_video", HX8279A_WSVGA_VIDEO_PANEL}
};
static uint32_t panel_id;
@@ -105,6 +110,9 @@
} else if (panel_id == NT35590_720P_CMD_PANEL) {
/* needs extra delay to avoid snow screen artifacts */
mdelay(NT35590_720P_CMD_PANEL_ON_DELAY);
+ } else if (panel_id == SAMSUNG_WXGA_VIDEO_PANEL) {
+ /* needs extra delay to avoid unexpected artifacts */
+ mdelay(SAMSUNG_WXGA_VIDEO_PANEL_ON_DELAY);
}
return NO_ERROR;
@@ -423,6 +431,54 @@
memcpy(phy_db->timing,
nt35521_wxga_video_timings, TIMING_SIZE);
break;
+ case SAMSUNG_WXGA_VIDEO_PANEL:
+ panelstruct->paneldata = &samsung_wxga_video_panel_data;
+ panelstruct->panelres = &samsung_wxga_video_panel_res;
+ panelstruct->color = &samsung_wxga_video_color;
+ panelstruct->videopanel = &samsung_wxga_video_video_panel;
+ panelstruct->commandpanel = &samsung_wxga_video_command_panel;
+ panelstruct->state = &samsung_wxga_video_state;
+ panelstruct->laneconfig = &samsung_wxga_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &samsung_wxga_video_timing_info;
+ panelstruct->panelresetseq
+ = &samsung_wxga_video_reset_seq;
+ panelstruct->backlightinfo = &samsung_wxga_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = samsung_wxga_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = SAMSUNG_WXGA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = samsung_wxga_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = SAMSUNG_WXGA_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ samsung_wxga_video_timings, TIMING_SIZE);
+ break;
+ case HX8279A_WSVGA_VIDEO_PANEL:
+ panelstruct->paneldata = &hx8279a_wsvga_video_panel_data;
+ panelstruct->panelres = &hx8279a_wsvga_video_panel_res;
+ panelstruct->color = &hx8279a_wsvga_video_color;
+ panelstruct->videopanel = &hx8279a_wsvga_video_video_panel;
+ panelstruct->commandpanel = &hx8279a_wsvga_video_command_panel;
+ panelstruct->state = &hx8279a_wsvga_video_state;
+ panelstruct->laneconfig = &hx8279a_wsvga_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &hx8279a_wsvga_video_timing_info;
+ panelstruct->panelresetseq
+ = &hx8279a_wsvga_video_reset_seq;
+ panelstruct->backlightinfo = &hx8279a_wsvga_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = hx8279a_wsvga_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = HX8279A_WSVGA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = hx8279a_wsvga_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = HX8279A_WSVGA_VIDEO_OFF_COMMAND;
+ memcpy(phy_db->timing,
+ hx8279a_wsvga_video_timings, TIMING_SIZE);
+ break;
case UNKNOWN_PANEL:
default:
memset(panelstruct, 0, sizeof(struct panel_struct));
@@ -528,8 +584,15 @@
panel_id = HX8379A_FWVGA_VIDEO_PANEL;
break;
case HW_PLATFORM_SUBTYPE_SKUT1:
- /* qrd SKUT1 */
- panel_id = NT35521_WXGA_VIDEO_PANEL;
+ if ((plat_hw_ver_major & 0x0F) == 0x1)
+ /* qrd SKUT1 */
+ panel_id = NT35521_WXGA_VIDEO_PANEL;
+ else if ((plat_hw_ver_major & 0x0F) == 0x2)
+ /* qrd SKUT2 */
+ panel_id = SAMSUNG_WXGA_VIDEO_PANEL;
+ else if ((plat_hw_ver_major & 0x0F) == 0x3)
+ /* qrd SKUT3 */
+ panel_id = HX8279A_WSVGA_VIDEO_PANEL;
break;
default:
dprintf(CRITICAL, "Invalid subtype id %d for QRD HW\n",
diff --git a/target/msm8916/target_display.c b/target/msm8916/target_display.c
old mode 100755
new mode 100644
index 539883d..45baa2b
--- a/target/msm8916/target_display.c
+++ b/target/msm8916/target_display.c
@@ -291,13 +291,20 @@
uint32_t hw_id = board_hardware_id();
uint32_t hw_subtype = board_hardware_subtype();
uint32_t panel_id = get_panel_id();
+ uint32_t target_id, plat_hw_ver_major;
if (enable) {
if (pinfo->mipi.use_enable_gpio) {
/* set enable gpio pin for SKUT1 */
if ((hw_id == HW_PLATFORM_QRD) &&
- (hw_subtype == HW_PLATFORM_SUBTYPE_SKUT1))
- enable_gpio = enable_gpio_skut1;
+ (hw_subtype == HW_PLATFORM_SUBTYPE_SKUT1)) {
+ target_id = board_target_id();
+ plat_hw_ver_major = ((target_id >> 16) & 0xFF);
+ if ((plat_hw_ver_major & 0x0F) == 0x1)
+ enable_gpio = enable_gpio_skut1;
+ else
+ enable_gpio = enable_gpio_skut2;
+ }
gpio_tlmm_config(enable_gpio.pin_id, 0,
enable_gpio.pin_direction, enable_gpio.pin_pull,
enable_gpio.pin_strength,
diff --git a/target/msm8994/init.c b/target/msm8994/init.c
index 137891d..c4e3c4f 100644
--- a/target/msm8994/init.c
+++ b/target/msm8994/init.c
@@ -359,6 +359,7 @@
case HW_PLATFORM_MTP:
case HW_PLATFORM_FLUID:
case HW_PLATFORM_LIQUID:
+ case HW_PLATFORM_DRAGON:
dprintf(SPEW, "Target_cont_splash=1\n");
splash_screen = 1;
break;
diff --git a/target/msm8994/oem_panel.c b/target/msm8994/oem_panel.c
index 19fb5c7..020c81b 100644
--- a/target/msm8994/oem_panel.c
+++ b/target/msm8994/oem_panel.c
@@ -45,6 +45,7 @@
#include "include/panel_jdi_qhd_dualdsi_cmd.h"
#include "include/panel_jdi_4k_dualdsi_video.h"
#include "include/panel_jdi_1080p_video.h"
+#include "include/panel_hx8379a_truly_fwvga_video.h"
/*---------------------------------------------------------------------------*/
/* static panel selection variable */
@@ -55,6 +56,7 @@
JDI_QHD_DUALDSI_CMD_PANEL,
JDI_4K_DUALDSI_VIDEO_PANEL,
JDI_1080P_VIDEO_PANEL,
+HX8379A_TRULY_FWVGA_VIDEO_PANEL,
UNKNOWN_PANEL
};
@@ -68,6 +70,7 @@
{"jdi_qhd_dualdsi_cmd", JDI_QHD_DUALDSI_CMD_PANEL},
{"jdi_4k_dualdsi_video", JDI_4K_DUALDSI_VIDEO_PANEL},
{"jdi_1080p_video", JDI_1080P_VIDEO_PANEL},
+ {"hx8379a_truly_fwvga_video", HX8379A_TRULY_FWVGA_VIDEO_PANEL},
};
static uint32_t panel_id;
@@ -241,6 +244,33 @@
memcpy(phy_db->timing,
jdi_1080p_video_timings, TIMING_SIZE);
break;
+ case HX8379A_TRULY_FWVGA_VIDEO_PANEL:
+ pan_type = PANEL_TYPE_DSI;
+ pinfo->lcd_reg_en = 1;
+ panelstruct->paneldata = &hx8379a_truly_fwvga_video_panel_data;
+ panelstruct->panelres = &hx8379a_truly_fwvga_video_panel_res;
+ panelstruct->color = &hx8379a_truly_fwvga_video_color;
+ panelstruct->videopanel = &hx8379a_truly_fwvga_video_video_panel;
+ panelstruct->commandpanel = &hx8379a_truly_fwvga_video_command_panel;
+ panelstruct->state = &hx8379a_truly_fwvga_video_state;
+ panelstruct->laneconfig = &hx8379a_truly_fwvga_video_lane_config;
+ panelstruct->paneltiminginfo
+ = &hx8379a_truly_fwvga_video_timing_info;
+ panelstruct->panelresetseq
+ = &hx8379a_truly_fwvga_video_reset_seq;
+ panelstruct->backlightinfo = &hx8379a_truly_fwvga_video_backlight;
+ pinfo->mipi.panel_on_cmds
+ = hx8379a_truly_fwvga_video_on_command;
+ pinfo->mipi.num_of_panel_on_cmds
+ = HX8379A_TRULY_FWVGA_VIDEO_ON_COMMAND;
+ pinfo->mipi.panel_off_cmds
+ = hx8379a_truly_fwvga_video_off_command;
+ pinfo->mipi.num_of_panel_off_cmds
+ = HX8379A_TRULY_FWVGA_VIDEO_OFF_COMMAND;
+ pinfo->mipi.broadcast = 0;
+ memcpy(phy_db->timing,
+ hx8379a_truly_fwvga_video_timings, TIMING_SIZE);
+ break;
default:
case UNKNOWN_PANEL:
pan_type = PANEL_TYPE_UNKNOWN;
@@ -282,6 +312,9 @@
case HW_PLATFORM_LIQUID:
panel_id = JDI_4K_DUALDSI_VIDEO_PANEL;
break;
+ case HW_PLATFORM_DRAGON:
+ panel_id = HX8379A_TRULY_FWVGA_VIDEO_PANEL;
+ break;
default:
dprintf(CRITICAL, "Display not enabled for %d HW type\n"
, hw_id);
@@ -289,7 +322,7 @@
}
panel_init:
- if (panel_id == JDI_4K_DUALDSI_VIDEO_PANEL)
+ if (panel_id == JDI_4K_DUALDSI_VIDEO_PANEL || panel_id == HX8379A_TRULY_FWVGA_VIDEO_PANEL)
phy_db->regulator_mode = DSI_PHY_REGULATOR_LDO_MODE;
return init_panel_data(panelstruct, pinfo, phy_db);
}
diff --git a/target/msm8994/target_display.c b/target/msm8994/target_display.c
index bb22fa4..171f3d6 100644
--- a/target/msm8994/target_display.c
+++ b/target/msm8994/target_display.c
@@ -110,10 +110,8 @@
{
uint8_t slave_id = 3; /* pmi */
- if (enable) {
- pm8x41_wled_config_slave_id(slave_id);
- qpnp_wled_enable_backlight(enable);
- }
+ pm8x41_wled_config_slave_id(slave_id);
+ qpnp_wled_enable_backlight(enable);
qpnp_ibb_enable(enable);
return NO_ERROR;
}