[ARM] update atomic ops to use the ldr/strex instructions on armv6+
diff --git a/arch/arm/asm.S b/arch/arm/asm.S
index 2953bd6..4a31684 100644
--- a/arch/arm/asm.S
+++ b/arch/arm/asm.S
@@ -47,12 +47,24 @@
/* save old sp */
str r3, [r0]
+ /* clear any exlusive locks that the old thread holds */
+#if ARM_ISA_ARMV7
+ /* can clear it directly */
+ .word 0xf57ff01f // clrex
+#elif ARM_ISA_ARMV6
+ /* have to do a fake strex to clear it */
+ ldr r0, =strex_spot
+ strex r3, r2, [r0]
+#endif
+
/* load new regs */
ldmia r1, { r4-r11, r12, r13, r14 }^
mov lr, r12 /* restore lr */
add sp, r1, #(11*4) /* restore sp */
bx lr
+.ltorg
+
FUNCTION(arm_save_mode_regs)
mrs r1, cpsr
@@ -84,5 +96,8 @@
bx lr
+.data
+strex_spot:
+ .word 0