| commit | a8deb5cfc014f08d5a47b8343f2304f33e1006bb | [log] [tgz] |
|---|---|---|
| author | Sachin Bhayare <sachin.bhayare@codeaurora.org> | Thu Jul 16 11:49:08 2015 +0530 |
| committer | Sachin Bhayare <sachin.bhayare@codeaurora.org> | Mon Jul 20 15:27:58 2015 +0530 |
| tree | 6234f6d674c65008c86175774dece602009157c7 | |
| parent | f97722375feb0f7b13aba982adad12255916a6c2 [diff] |
target: msm8909: update mdp3 clock gating setting Disable DMA_P HW clock gating and follow correct robust LUT programing sequence. Change-Id: I24d8ed58f5be7c7460de18de834025462e23e3f4