tree 6234f6d674c65008c86175774dece602009157c7
parent f97722375feb0f7b13aba982adad12255916a6c2
author Sachin Bhayare <sachin.bhayare@codeaurora.org> 1437027548 +0530
committer Sachin Bhayare <sachin.bhayare@codeaurora.org> 1437386278 +0530

target: msm8909: update mdp3 clock gating setting

Disable DMA_P HW clock gating and follow correct
robust LUT programing sequence.

Change-Id: I24d8ed58f5be7c7460de18de834025462e23e3f4