diff --git a/platform/msm_shared/nand.c b/platform/msm_shared/nand.c
index e710082..4d1cc98 100644
--- a/platform/msm_shared/nand.c
+++ b/platform/msm_shared/nand.c
@@ -45,15 +45,14 @@
 void platform_config_interleaved_mode_gpios(void);
 
 typedef struct dmov_ch dmov_ch;
-struct dmov_ch
-{
+struct dmov_ch {
 	volatile unsigned cmd;
 	volatile unsigned result;
 	volatile unsigned status;
 	volatile unsigned config;
 };
 
-static void dmov_prep_ch(dmov_ch *ch, unsigned id)
+static void dmov_prep_ch(dmov_ch * ch, unsigned id)
 {
 	ch->cmd = DMOV_CMD_PTR(id);
 	ch->result = DMOV_RSLT(id);
@@ -96,12 +95,12 @@
 
 	writel(DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(paddr(ptr)), ch.cmd);
 
-	while(!(readl(ch.status) & DMOV_STATUS_RSLT_VALID)) ;
+	while (!(readl(ch.status) & DMOV_STATUS_RSLT_VALID)) ;
 
 	n = readl(ch.status);
-	while(DMOV_STATUS_RSLT_COUNT(n)) {
+	while (DMOV_STATUS_RSLT_COUNT(n)) {
 		n = readl(ch.result);
-		if(n != 0x80000002) {
+		if (n != 0x80000002) {
 			dprintf(CRITICAL, "ERROR: result: %x\n", n);
 			dprintf(CRITICAL, "ERROR:  flush: %x %x %x %x\n",
 				readl(DMOV_FLUSH0(DMOV_NAND_CHAN)),
@@ -132,47 +131,43 @@
 	unsigned onenand;
 };
 
-static struct flash_identification supported_flash[] =
-{
-	/* Flash ID	ID Mask Density(MB)  Wid Pgsz	Blksz	oobsz onenand	Manuf */
-	{0x00000000, 0xFFFFFFFF,		 0, 0,	0,		 0,  0, 0}, /*ONFI*/
-	{0x1500aaec, 0xFF00FFFF, (256<<20), 0, 2048, (2048<<6), 64, 0}, /*Sams*/
-	{0x5500baec, 0xFF00FFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Sams*/
-	{0x1500aa98, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 0}, /*Tosh*/
-	{0x5500ba98, 0xFFFFFFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Tosh*/
-	{0xd580b12c, 0xFFFFFFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Micr*/
-	{0x5590bc2c, 0xFFFFFFFF, (512<<20), 1, 2048, (2048<<6), 64, 0}, /*Micr*/
-	{0x1580aa2c, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 0}, /*Micr*/
-	{0x1590aa2c, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 0}, /*Micr*/
-	{0x1590ac2c, 0xFFFFFFFF, (512<<20), 0, 2048, (2048<<6), 64, 0}, /*Micr*/
-	{0x5580baad, 0xFFFFFFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Hynx*/
-	{0x5510baad, 0xFFFFFFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Hynx*/
-	{0x004000ec, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 1}, /*Sams*/
-	{0x005c00ec, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 1}, /*Sams*/
-	{0x005800ec, 0xFFFFFFFF, (256<<20), 0, 2048, (2048<<6), 64, 1}, /*Sams*/
-	{0x6600bcec, 0xFF00FFFF, (512<<20), 1, 4096, (4096<<6), 128, 0}, /*Sams*/
-	{0x5580ba2c, 0xFFFFFFFF, (256<<20), 1, 2048, (2048<<6), 64, 0}, /*Hynx*/
-	{0x6600b3ec, 0xFFFFFFFF, (512<<20), 1, 4096, (4096<<6), 128, 0}, /*Sams*/
-	{0x2600482c, 0xFF00FFFF, (2048<<20), 0, 4096, (4096<<7), 224 , 0}, /*8bit bch ecc*/
-	/* Note: Width flag is 0 for 8 bit Flash and 1 for 16 bit flash	  */
-	/* Note: Onenand flag is 0 for NAND Flash and 1 for OneNAND flash	*/
-	/* Note: The First row will be filled at runtime during ONFI probe	*/
+static struct flash_identification supported_flash[] = {
+	/* Flash ID     ID Mask Density(MB)  Wid Pgsz   Blksz   oobsz onenand   Manuf */
+	{0x00000000, 0xFFFFFFFF, 0, 0, 0, 0, 0, 0}, /*ONFI*/ {0x1500aaec, 0xFF00FFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 0},	/*Sams */
+	{0x5500baec, 0xFF00FFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Sams */
+	{0x1500aa98, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 0},	/*Tosh */
+	{0x5500ba98, 0xFFFFFFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Tosh */
+	{0xd580b12c, 0xFFFFFFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Micr */
+	{0x5590bc2c, 0xFFFFFFFF, (512 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Micr */
+	{0x1580aa2c, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 0},	/*Micr */
+	{0x1590aa2c, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 0},	/*Micr */
+	{0x1590ac2c, 0xFFFFFFFF, (512 << 20), 0, 2048, (2048 << 6), 64, 0},	/*Micr */
+	{0x5580baad, 0xFFFFFFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Hynx */
+	{0x5510baad, 0xFFFFFFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Hynx */
+	{0x004000ec, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 1},	/*Sams */
+	{0x005c00ec, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 1},	/*Sams */
+	{0x005800ec, 0xFFFFFFFF, (256 << 20), 0, 2048, (2048 << 6), 64, 1},	/*Sams */
+	{0x6600bcec, 0xFF00FFFF, (512 << 20), 1, 4096, (4096 << 6), 128, 0},	/*Sams */
+	{0x5580ba2c, 0xFFFFFFFF, (256 << 20), 1, 2048, (2048 << 6), 64, 0},	/*Hynx */
+	{0x6600b3ec, 0xFFFFFFFF, (512 << 20), 1, 4096, (4096 << 6), 128, 0},	/*Sams */
+	{0x2600482c, 0xFF00FFFF, (2048 << 20), 0, 4096, (4096 << 7), 224, 0},	/*8bit bch ecc */
+	/* Note: Width flag is 0 for 8 bit Flash and 1 for 16 bit flash   */
+	/* Note: Onenand flag is 0 for NAND Flash and 1 for OneNAND flash       */
+	/* Note: The First row will be filled at runtime during ONFI probe      */
 };
+
 static void set_nand_configuration(char type)
 {
-	if(type == TYPE_MODEM_PARTITION)
-	{
+	if (type == TYPE_MODEM_PARTITION) {
 		CFG0 = CFG0_M;
 		CFG1 = CFG1_M;
-	}
-	else
-	{
+	} else {
 		CFG0 = CFG0_A;
 		CFG1 = CFG1_A;
 	}
 }
 
-static void flash_nand_read_id(dmov_s *cmdlist, unsigned *ptrlist)
+static void flash_nand_read_id(dmov_s * cmdlist, unsigned *ptrlist)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -185,7 +180,7 @@
 	data[4] = 0;
 	data[5] = 0;
 	data[6] = 0;
-	data[7] = 0xAAD40000;  /* Default value for CFG0 for reading device id */
+	data[7] = 0xAAD40000;	/* Default value for CFG0 for reading device id */
 
 	/* Read NAND device id */
 	cmd[0].cmd = 0 | CMD_OCB;
@@ -247,8 +242,8 @@
 	return;
 }
 
-static int flash_nand_block_isbad(dmov_s *cmdlist, unsigned *ptrlist,
-								  unsigned page)
+static int
+flash_nand_block_isbad(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -259,7 +254,7 @@
 	cwperpage = (flash_pagesize >> 9);
 
 	/* Check first page of this block */
-	if(page & num_pages_per_blk_mask)
+	if (page & num_pages_per_blk_mask)
 		page = page - (page & num_pages_per_blk_mask);
 
 	/* Check bad block marker */
@@ -268,24 +263,24 @@
 	/* addr0 */
 	if (CFG1 & CFG1_WIDE_FLASH)
 		data[1] = enable_bch_ecc ?
-			((page << 16) | ((532*(cwperpage-1)) >> 1)):
-			((page << 16) | ((528*(cwperpage-1)) >> 1));
+		    ((page << 16) | ((532 * (cwperpage - 1)) >> 1)) :
+		    ((page << 16) | ((528 * (cwperpage - 1)) >> 1));
 
 	else
 		data[1] = enable_bch_ecc ?
-			((page << 16) | (532*(cwperpage-1))):
-			((page << 16) | (528*(cwperpage-1)));
+		    ((page << 16) | (532 * (cwperpage - 1))) :
+		    ((page << 16) | (528 * (cwperpage - 1)));
 
-	data[2] = (page >> 16) & 0xff;						/* addr1	*/
-	data[3] = 0 | 4;									/* chipsel	*/
-	data[4] = NAND_CFG0_RAW & ~(7U << 6);				/* cfg0		*/
-	data[5] = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);	/* cfg1		*/
+	data[2] = (page >> 16) & 0xff;	/* addr1        */
+	data[3] = 0 | 4;	/* chipsel      */
+	data[4] = NAND_CFG0_RAW & ~(7U << 6);	/* cfg0         */
+	data[5] = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);	/* cfg1         */
 	if (enable_bch_ecc) {
-		data[6] = ECC_BCH_CFG;				/* ECC CFG */
+		data[6] = ECC_BCH_CFG;	/* ECC CFG */
 	}
 	data[7] = 1;
 	data[8] = CLEAN_DATA_32;	/* flash status */
-	data[9] = CLEAN_DATA_32;	/* buf status	*/
+	data[9] = CLEAN_DATA_32;	/* buf status   */
 
 	cmd[0].cmd = DST_CRCI_NAND_CMD | CMD_OCB;
 	cmd[0].src = paddr(&data[0]);
@@ -313,8 +308,11 @@
 
 	cmd[4].cmd = CMD_OCU | CMD_LC;
 	cmd[4].src = NAND_FLASH_BUFFER + (flash_pagesize - (enable_bch_ecc ?
-							(532*(cwperpage-1)):
-							(528*(cwperpage-1))));
+							    (532 *
+							     (cwperpage -
+							      1)) : (528 *
+								     (cwperpage
+								      - 1))));
 	cmd[4].dst = paddr(&buf);
 	cmd[4].len = 4;
 
@@ -327,9 +325,10 @@
 #endif
 
 	/* we fail if there was an operation error, a mpu error, or the
-	** erase success bit was not set.
-	*/
-	if(data[8] & 0x110) return -1;
+	 ** erase success bit was not set.
+	 */
+	if (data[8] & 0x110)
+		return -1;
 
 	/* Check for bad block marker byte */
 	if (CFG1 & CFG1_WIDE_FLASH) {
@@ -343,8 +342,9 @@
 	return 0;
 }
 
-static int flash_nand_block_isbad_interleave(dmov_s *cmdlist, unsigned *ptrlist,
-								  unsigned page)
+static int
+flash_nand_block_isbad_interleave(dmov_s * cmdlist, unsigned *ptrlist,
+				  unsigned page)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -353,10 +353,10 @@
 	char buf10[4];
 	unsigned cwperpage;
 
-	cwperpage = ((flash_pagesize >> 1)>> 9);
+	cwperpage = ((flash_pagesize >> 1) >> 9);
 
 	/* Check first page of this block */
-	if(page & 63)
+	if (page & 63)
 		page = page - (page & 63);
 
 	/* Check bad block marker */
@@ -364,27 +364,27 @@
 
 	/* addr0 */
 	if (CFG1 & CFG1_WIDE_FLASH)
-		data[1] = (page << 16) | ((528*(cwperpage-1)) >> 1);
+		data[1] = (page << 16) | ((528 * (cwperpage - 1)) >> 1);
 	else
-		data[1] = (page << 16) | (528*(cwperpage-1));
+		data[1] = (page << 16) | (528 * (cwperpage - 1));
 
-	data[2] = (page >> 16) & 0xff;				/* addr1	*/
-	data[3] = 0 | 4;					/* chipsel CS0	*/
-	data[4] = 0 | 5;					/* chipsel CS1	*/
-	data[5] = NAND_CFG0_RAW & ~(7U << 6);			/* cfg0		*/
-	data[6] = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);	/* cfg1		*/
+	data[2] = (page >> 16) & 0xff;	/* addr1        */
+	data[3] = 0 | 4;	/* chipsel CS0  */
+	data[4] = 0 | 5;	/* chipsel CS1  */
+	data[5] = NAND_CFG0_RAW & ~(7U << 6);	/* cfg0         */
+	data[6] = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);	/* cfg1         */
 	data[7] = 1;
 	data[8] = CLEAN_DATA_32;	/* NC01 flash status */
 	data[9] = CLEAN_DATA_32;	/* NC01 buf01 status   */
 	data[10] = CLEAN_DATA_32;	/* NC10 flash status */
 	data[11] = CLEAN_DATA_32;	/* NC10 buf10 status   */
-	data[12] = 0x00000A3C; 		/* adm_mux_data_ack_req_nc01 */
-	data[13] = 0x0000053C; 		/* adm_mux_cmd_ack_req_nc01  */
-	data[14] = 0x00000F28; 		/* adm_mux_data_ack_req_nc10 */
-	data[15] = 0x00000F14; 		/* adm_mux_cmd_ack_req_nc10  */
-	data[16] = 0x00000FC0; 		/* adm_default_mux */
-	data[17] = 0x00000805;		/* enable CS1 */
-	data[18] = 0x00000801;		/* disable CS1 */
+	data[12] = 0x00000A3C;	/* adm_mux_data_ack_req_nc01 */
+	data[13] = 0x0000053C;	/* adm_mux_cmd_ack_req_nc01  */
+	data[14] = 0x00000F28;	/* adm_mux_data_ack_req_nc10 */
+	data[15] = 0x00000F14;	/* adm_mux_cmd_ack_req_nc10  */
+	data[16] = 0x00000FC0;	/* adm_default_mux */
+	data[17] = 0x00000805;	/* enable CS1 */
+	data[18] = 0x00000801;	/* disable CS1 */
 
 	/* enable CS1 */
 	cmd[0].cmd = 0;
@@ -426,7 +426,9 @@
 	cmd[6].len = 8;
 
 	cmd[7].cmd = 0;
-	cmd[7].src = NC01(NAND_FLASH_BUFFER) + (flash_pagesize - (528*(cwperpage-1)));
+	cmd[7].src =
+	    NC01(NAND_FLASH_BUFFER) + (flash_pagesize -
+				       (528 * (cwperpage - 1)));
 	cmd[7].dst = paddr(&buf01);
 	cmd[7].len = 4;
 
@@ -469,7 +471,9 @@
 	cmd[14].len = 8;
 
 	cmd[15].cmd = 0;
-	cmd[15].src = NC10(NAND_FLASH_BUFFER) + (flash_pagesize - (528*(cwperpage-1)));
+	cmd[15].src =
+	    NC10(NAND_FLASH_BUFFER) + (flash_pagesize -
+				       (528 * (cwperpage - 1)));
 	cmd[15].dst = paddr(&buf10);
 	cmd[15].len = 4;
 
@@ -494,25 +498,26 @@
 #endif
 
 	/* we fail if there was an operation error, a mpu error, or the
-	** erase success bit was not set.
-	*/
-	if((data[8] & 0x110) || (data[10] & 0x110)) return -1;
+	 ** erase success bit was not set.
+	 */
+	if ((data[8] & 0x110) || (data[10] & 0x110))
+		return -1;
 
 	/* Check for bad block marker byte */
 	if (CFG1 & CFG1_WIDE_FLASH) {
 		if ((buf01[0] != 0xFF || buf01[1] != 0xFF) ||
-			(buf10[0] != 0xFF || buf10[1] != 0xFF))
+		    (buf10[0] != 0xFF || buf10[1] != 0xFF))
 			return 1;
-		} else {
-			if (buf01[0] != 0xFF || buf10[0] != 0xFF)
+	} else {
+		if (buf01[0] != 0xFF || buf10[0] != 0xFF)
 			return 1;
-		}
+	}
 
 	return 0;
 }
 
-static int flash_nand_erase_block(dmov_s *cmdlist, unsigned *ptrlist,
-								  unsigned page)
+static int
+flash_nand_erase_block(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -520,13 +525,15 @@
 	int isbad = 0;
 
 	/* only allow erasing on block boundaries */
-	if(page & num_pages_per_blk_mask) return -1;
+	if (page & num_pages_per_blk_mask)
+		return -1;
 
 	/* Check for bad block and erase only if block is not marked bad */
 	isbad = flash_nand_block_isbad(cmdlist, ptrlist, page);
 
 	if (isbad) {
-		dprintf(INFO, "skipping @ %d (bad block)\n", page / num_pages_per_blk);
+		dprintf(INFO, "skipping @ %d (bad block)\n",
+			page / num_pages_per_blk);
 		return -1;
 	}
 
@@ -537,7 +544,7 @@
 	data[3] = 0 | 4;
 	data[4] = 1;
 	data[5] = 0xeeeeeeee;
-	data[6] = CFG0 & (~(7 << 6));  /* CW_PER_PAGE = 0 */
+	data[6] = CFG0 & (~(7 << 6));	/* CW_PER_PAGE = 0 */
 	data[7] = CFG1;
 	data[8] = ECC_BCH_CFG;
 	data[9] = 0x00000020;
@@ -588,14 +595,17 @@
 	/* we fail if there was an operation error, a mpu error, or the
 	 ** erase success bit was not set.
 	 */
-	if(data[5] & 0x110) return -1;
-	if(!(data[5] & 0x80)) return -1;
+	if (data[5] & 0x110)
+		return -1;
+	if (!(data[5] & 0x80))
+		return -1;
 
 	return 0;
 }
 
-static int flash_nand_erase_block_interleave(dmov_s *cmdlist, unsigned *ptrlist,
-								  unsigned page)
+static int
+flash_nand_erase_block_interleave(dmov_s * cmdlist, unsigned *ptrlist,
+				  unsigned page)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -603,7 +613,8 @@
 	int isbad = 0;
 
 	/* only allow erasing on block boundaries */
-	if(page & 63) return -1;
+	if (page & 63)
+		return -1;
 
 	/* Check for bad block and erase only if block is not marked bad */
 	isbad = flash_nand_block_isbad(cmdlist, ptrlist, page);
@@ -622,13 +633,13 @@
 	data[5] = 1;
 	data[6] = 0xeeeeeeee;
 	data[7] = 0xeeeeeeee;
-	data[8] = CFG0 & (~(7 << 6));  /* CW_PER_PAGE = 0 */
+	data[8] = CFG0 & (~(7 << 6));	/* CW_PER_PAGE = 0 */
 	data[9] = CFG1;
-	data[10] = 0x00000A3C; 	/* adm_mux_data_ack_req_nc01 */
-	data[11] = 0x0000053C; 	/* adm_mux_cmd_ack_req_nc01  */
-	data[12] = 0x00000F28; 	/* adm_mux_data_ack_req_nc10 */
-	data[13] = 0x00000F14; 	/* adm_mux_cmd_ack_req_nc10  */
-	data[14] = 0x00000FC0; 	/* adm_default_mux */
+	data[10] = 0x00000A3C;	/* adm_mux_data_ack_req_nc01 */
+	data[11] = 0x0000053C;	/* adm_mux_cmd_ack_req_nc01  */
+	data[12] = 0x00000F28;	/* adm_mux_data_ack_req_nc10 */
+	data[13] = 0x00000F14;	/* adm_mux_cmd_ack_req_nc10  */
+	data[14] = 0x00000FC0;	/* adm_default_mux */
 	data[15] = 0x00000805;	/* enable CS1 */
 	data[16] = 0x00000801;	/* disable CS1 */
 
@@ -734,8 +745,10 @@
 	/* we fail if there was an operation error, a mpu error, or the
 	 ** erase success bit was not set.
 	 */
-	if(data[6] & 0x110 || data[7] & 0x110) return -1;
-	if(!(data[6] & 0x80) || !(data[7] & 0x80)) return -1;
+	if (data[6] & 0x110 || data[7] & 0x110)
+		return -1;
+	if (!(data[6] & 0x80) || !(data[7] & 0x80))
+		return -1;
 
 	return 0;
 }
@@ -782,14 +795,15 @@
 	} result[16];
 };
 
-static int _flash_nand_read_page(dmov_s *cmdlist, unsigned *ptrlist,
-								 unsigned page, void *_addr, void *_spareaddr)
+static int
+_flash_nand_read_page(dmov_s * cmdlist, unsigned *ptrlist,
+		      unsigned page, void *_addr, void *_spareaddr)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct data_flash_io *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned spareaddr = (unsigned) _spareaddr;
+	struct data_flash_io *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned spareaddr = (unsigned)_spareaddr;
 	unsigned n;
 	int isbad = 0;
 	unsigned cwperpage;
@@ -804,27 +818,27 @@
 	 * 1 : The block is bad
 	 * 0 : The block is good
 	 */
-	if(bbtbl[block] == -1) {
+	if (bbtbl[block] == -1) {
 		isbad = flash_nand_block_isbad(cmdlist, ptrlist, page);
-		if(isbad) {
+		if (isbad) {
 			/* Found bad , set the bad table entry */
 			bbtbl[block] = 1;
 			return -2;
 		} else {
 			/* Found good block , set the table entry &
-			*  continue reading the data
-			*/
+			 *  continue reading the data
+			 */
 			bbtbl[block] = 0;
 		}
-	} else if(bbtbl[block] == 1) {
-		/* If the block is already identified as bad, return error*/
+	} else if (bbtbl[block] == 1) {
+		/* If the block is already identified as bad, return error */
 		return -2;
 	}
 
 	data->cmd = NAND_CMD_PAGE_READ_ECC;
 	data->addr0 = page << 16;
 	data->addr1 = (page >> 16) & 0xff;
-	data->chipsel = 0 | 4; /* flash0 + undoc bit */
+	data->chipsel = 0 | 4;	/* flash0 + undoc bit */
 
 	/* GO bit for the EXEC register */
 	data->exec = 1;
@@ -844,7 +858,7 @@
 	cmd->len = 4;
 	cmd++;
 
-	for(n = 0; n < cwperpage; n++) {
+	for (n = 0; n < cwperpage; n++) {
 		/* write CMD / ADDR0 / ADDR1 / CHIPSEL regs in a burst */
 		cmd->cmd = DST_CRCI_NAND_CMD;
 		cmd->src = paddr(&data->cmd);
@@ -889,7 +903,9 @@
 		cmd->cmd = 0;
 		cmd->src = NAND_FLASH_BUFFER;
 		cmd->dst = addr + n * 516;
-		cmd->len = ((n < (cwperpage -1 )) ? 516 : (512 - ((cwperpage - 1) << 2)));
+		cmd->len =
+		    ((n <
+		      (cwperpage - 1)) ? 516 : (512 - ((cwperpage - 1) << 2)));
 		cmd++;
 	}
 
@@ -913,18 +929,20 @@
 #if VERBOSE
 	dprintf(INFO, "read page %d: status: %x %x %x %x\n",
 		page, data[5], data[6], data[7], data[8]);
-	for(n = 0; n < 4; n++) {
-		ptr = (unsigned*)(addr + 512 * n);
-		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
-		ptr = (unsigned*)(spareaddr + 16 * n);
-		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
+	for (n = 0; n < 4; n++) {
+		ptr = (unsigned *)(addr + 512 * n);
+		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1],
+			ptr[2], ptr[3]);
+		ptr = (unsigned *)(spareaddr + 16 * n);
+		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0],
+			ptr[1], ptr[2], ptr[3]);
 	}
 #endif
 
 	/* if any of the writes failed (0x10), or there was a
 	 ** protection violation (0x100), we lose
 	 */
-	for(n = 0; n < cwperpage; n++) {
+	for (n = 0; n < cwperpage; n++) {
 		if (data->result[n].flash_status & 0x110) {
 			return -1;
 		}
@@ -933,14 +951,15 @@
 	return 0;
 }
 
-static int flash_nand_read_page_interleave(dmov_s *cmdlist, unsigned *ptrlist,
-								 unsigned page, void *_addr, void *_spareaddr)
+static int
+flash_nand_read_page_interleave(dmov_s * cmdlist, unsigned *ptrlist,
+				unsigned page, void *_addr, void *_spareaddr)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct interleave_data_flash_io *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned spareaddr = (unsigned) _spareaddr;
+	struct interleave_data_flash_io *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned spareaddr = (unsigned)_spareaddr;
 	unsigned n;
 	int isbad = 0;
 	unsigned cwperpage;
@@ -954,13 +973,13 @@
 	data->cmd = NAND_CMD_PAGE_READ_ECC;
 	data->addr0 = page << 16;
 	data->addr1 = (page >> 16) & 0xff;
-	data->chipsel_cs0 = 0 | 4; /* flash0 + undoc bit */
-	data->chipsel_cs1 = 0 | 5; /* flash0 + undoc bit */
+	data->chipsel_cs0 = 0 | 4;	/* flash0 + undoc bit */
+	data->chipsel_cs1 = 0 | 5;	/* flash0 + undoc bit */
 	data->ebi2_chip_select_cfg0 = 0x00000805;
 	data->adm_mux_data_ack_req_nc01 = 0x00000A3C;
-	data->adm_mux_cmd_ack_req_nc01  = 0x0000053C;
+	data->adm_mux_cmd_ack_req_nc01 = 0x0000053C;
 	data->adm_mux_data_ack_req_nc10 = 0x00000F28;
-	data->adm_mux_cmd_ack_req_nc10  = 0x00000F14;
+	data->adm_mux_cmd_ack_req_nc10 = 0x00000F14;
 	data->adm_default_mux = 0x00000FC0;
 	data->default_ebi2_chip_select_cfg0 = 0x00000801;
 
@@ -1011,7 +1030,7 @@
 			 * for NC10!
 			 */
 			cmd->cmd = 0;
-			cmd->src =  paddr(&data->chipsel_cs1);
+			cmd->src = paddr(&data->chipsel_cs1);
 			cmd->dst = NC10(NAND_FLASH_CHIP_SELECT);
 			cmd->len = 4;
 			cmd++;
@@ -1037,9 +1056,10 @@
 
 			/* if 'only' the last code word */
 			if (n == cwperpage - 1) {
-					/* MASK CMD ACK/REQ --> NC01 (0x53C)*/
+				/* MASK CMD ACK/REQ --> NC01 (0x53C) */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc01);
+				cmd->src =
+				    paddr(&data->adm_mux_cmd_ack_req_nc01);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1058,9 +1078,10 @@
 				cmd->len = 4;
 				cmd++;
 
-				/* MASK DATA ACK/REQ --> NC01 (0xA3C)*/
+				/* MASK DATA ACK/REQ --> NC01 (0xA3C) */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_data_ack_req_nc01);
+				cmd->src =
+				    paddr(&data->adm_mux_data_ack_req_nc01);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1077,9 +1098,10 @@
 				cmd->len = 4;
 				cmd++;
 			} else {
-				/* MASK CMD ACK/REQ --> NC10 (0xF14)*/
+				/* MASK CMD ACK/REQ --> NC10 (0xF14) */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc10);
+				cmd->src =
+				    paddr(&data->adm_mux_cmd_ack_req_nc10);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1091,7 +1113,7 @@
 				cmd->len = 4;
 				cmd++;
 
-				/* kick the execute register for NC01*/
+				/* kick the execute register for NC01 */
 				cmd->cmd = 0;
 				cmd->src = paddr(&data->exec);
 				cmd->dst = NC01(NAND_EXEC_CMD);
@@ -1100,9 +1122,8 @@
 			}
 		}
 
-
 		if (n % 2 == 0) {
-			/* MASK CMD ACK/REQ --> NC01 (0x53C)*/
+			/* MASK CMD ACK/REQ --> NC01 (0x53C) */
 			cmd->cmd = 0;
 			cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc01);
 			cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1123,7 +1144,7 @@
 			cmd->len = 4;
 			cmd++;
 
-			/* MASK DATA ACK/REQ --> NC10 (0xF28)*/
+			/* MASK DATA ACK/REQ --> NC10 (0xF28) */
 			cmd->cmd = 0;
 			cmd->src = paddr(&data->adm_mux_data_ack_req_nc10);
 			cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1146,7 +1167,11 @@
 			cmd->cmd = 0;
 			cmd->src = NC01(NAND_FLASH_BUFFER);
 			cmd->dst = addr + n * 516;
-			cmd->len = ((n < (cwperpage -1 )) ? 516 : (512 - ((cwperpage - 1) << 2)));
+			cmd->len =
+			    ((n <
+			      (cwperpage - 1)) ? 516 : (512 -
+							((cwperpage -
+							  1) << 2)));
 			cmd++;
 		} else {
 			if (n != cwperpage - 1) {
@@ -1154,7 +1179,8 @@
 				 * NC10 (0xF14)
 				 */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc10);
+				cmd->src =
+				    paddr(&data->adm_mux_cmd_ack_req_nc10);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1177,7 +1203,8 @@
 				 * NC01 (0xA3C)
 				 */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_data_ack_req_nc01);
+				cmd->src =
+				    paddr(&data->adm_mux_data_ack_req_nc01);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1198,7 +1225,8 @@
 				 * NC01 (0xA3C)
 				 */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_data_ack_req_nc01);
+				cmd->src =
+				    paddr(&data->adm_mux_data_ack_req_nc01);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
@@ -1219,7 +1247,11 @@
 			cmd->cmd = 0;
 			cmd->src = NC10(NAND_FLASH_BUFFER);
 			cmd->dst = addr + n * 516;
-			cmd->len = ((n < (cwperpage -1 )) ? 516 : (512 - ((cwperpage - 1) << 2)));
+			cmd->len =
+			    ((n <
+			      (cwperpage - 1)) ? 516 : (512 -
+							((cwperpage -
+							  1) << 2)));
 			cmd++;
 
 			if (n == (cwperpage - 1)) {
@@ -1228,7 +1260,7 @@
 				 */
 				cmd->cmd = 0;
 				cmd->src = NC10(NAND_FLASH_BUFFER) +
-				(512 - ((cwperpage -1) << 2));
+				    (512 - ((cwperpage - 1) << 2));
 				cmd->dst = spareaddr;
 				cmd->len = 16;
 				cmd++;
@@ -1250,7 +1282,7 @@
 
 	/* disable CS1 */
 	cmd->cmd = 0;
-	cmd->src =  paddr(&data->default_ebi2_chip_select_cfg0);
+	cmd->src = paddr(&data->default_ebi2_chip_select_cfg0);
 	cmd->dst = EBI2_CHIP_SELECT_CFG0;
 	cmd->len = 4;
 	cmd++;
@@ -1261,36 +1293,22 @@
 
 #if VERBOSE
 	dprintf(INFO, "read page %d: status: %x %x %x %x %x %x %x %x \
-	%x %x %x %x %x %x %x %x \n", page,
-	data->result[0].flash_status[0],
-	data->result[1].flash_status[1],
-	data->result[2].flash_status[2],
-	data->result[3].flash_status[3],
-	data->result[4].flash_status[4],
-	data->result[5].flash_status[5],
-	data->result[6].flash_status[6],
-	data->result[7].flash_status[7],
-	data->result[8].flash_status[8],
-	data->result[9].flash_status[9],
-	data->result[10].flash_status[10],
-	data->result[11].flash_status[11],
-	data->result[12].flash_status[12],
-	data->result[13].flash_status[13],
-	data->result[14].flash_status[14],
-	data->result[15].flash_status[15]);
+	%x %x %x %x %x %x %x %x \n", page, data->result[0].flash_status[0], data->result[1].flash_status[1], data->result[2].flash_status[2], data->result[3].flash_status[3], data->result[4].flash_status[4], data->result[5].flash_status[5], data->result[6].flash_status[6], data->result[7].flash_status[7], data->result[8].flash_status[8], data->result[9].flash_status[9], data->result[10].flash_status[10], data->result[11].flash_status[11], data->result[12].flash_status[12], data->result[13].flash_status[13], data->result[14].flash_status[14], data->result[15].flash_status[15]);
 
-	for(n = 0; n < 4; n++) {
-		ptr = (unsigned*)(addr + 512 * n);
-		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
-		ptr = (unsigned*)(spareaddr + 16 * n);
-		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
+	for (n = 0; n < 4; n++) {
+		ptr = (unsigned *)(addr + 512 * n);
+		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1],
+			ptr[2], ptr[3]);
+		ptr = (unsigned *)(spareaddr + 16 * n);
+		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0],
+			ptr[1], ptr[2], ptr[3]);
 	}
 #endif
 
 	/* if any of the writes failed (0x10), or there was a
 	 ** protection violation (0x100), we lose
 	 */
-	for(n = 0; n < cwperpage; n++) {
+	for (n = 0; n < cwperpage; n++) {
 		if (data->result[n].flash_status & 0x110) {
 			return -1;
 		}
@@ -1299,38 +1317,40 @@
 	return 0;
 }
 
-static int _flash_nand_write_page(dmov_s *cmdlist, unsigned *ptrlist, unsigned page,
-								  const void *_addr, const void *_spareaddr, unsigned raw_mode)
+static int
+_flash_nand_write_page(dmov_s * cmdlist, unsigned *ptrlist, unsigned page,
+		       const void *_addr, const void *_spareaddr,
+		       unsigned raw_mode)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct data_flash_io *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned spareaddr = (unsigned) _spareaddr;
+	struct data_flash_io *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned spareaddr = (unsigned)_spareaddr;
 	unsigned n;
 	unsigned cwperpage;
 	cwperpage = (flash_pagesize >> 9);
 	unsigned modem_partition = 0;
-	if (CFG0 == CFG0_M)
-	{
+	if (CFG0 == CFG0_M) {
 		modem_partition = 1;
 	}
 
 	data->cmd = NAND_CMD_PRG_PAGE;
 	data->addr0 = page << 16;
 	data->addr1 = (page >> 16) & 0xff;
-	data->chipsel = 0 | 4; /* flash0 + undoc bit */
+	data->chipsel = 0 | 4;	/* flash0 + undoc bit */
 	data->clrfstatus = 0x00000020;
 	data->clrrstatus = 0x000000C0;
 
-	if (!raw_mode){
+	if (!raw_mode) {
 		data->cfg0 = CFG0;
 		data->cfg1 = CFG1;
 		if (enable_bch_ecc) {
 			data->ecc_bch_cfg = ECC_BCH_CFG;
 		}
-	}else{
-		data->cfg0 = (NAND_CFG0_RAW & ~(7 << 6)) |((cwperpage-1) << 6);
+	} else {
+		data->cfg0 =
+		    (NAND_CFG0_RAW & ~(7 << 6)) | ((cwperpage - 1) << 6);
 		data->cfg1 = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);
 	}
 
@@ -1349,8 +1369,8 @@
 	cmd->len = 4;
 	cmd++;
 
-	for(n = 0; n < cwperpage; n++) {
-			/* write CMD / ADDR0 / ADDR1 / CHIPSEL regs in a burst */
+	for (n = 0; n < cwperpage; n++) {
+		/* write CMD / ADDR0 / ADDR1 / CHIPSEL regs in a burst */
 		cmd->cmd = DST_CRCI_NAND_CMD;
 		cmd->src = paddr(&data->cmd);
 		cmd->dst = NAND_FLASH_CMD;
@@ -1381,17 +1401,21 @@
 		/* write data block */
 		cmd->cmd = 0;
 		cmd->dst = NAND_FLASH_BUFFER;
-		if (!raw_mode){
-			if(modem_partition){
+		if (!raw_mode) {
+			if (modem_partition) {
 				cmd->src = addr + n * 512;
 				cmd->len = 512;
-			}else{
+			} else {
 				cmd->src = addr + n * 516;
-				cmd->len = ((n < (cwperpage - 1)) ? 516 : (512 - ((cwperpage - 1) << 2)));
+				cmd->len =
+				    ((n <
+				      (cwperpage - 1)) ? 516 : (512 -
+								((cwperpage -
+								  1) << 2)));
 			}
-		}else{
+		} else {
 			cmd->src = addr;
-			cmd->len =  528;
+			cmd->len = 528;
 		}
 		cmd++;
 
@@ -1399,7 +1423,8 @@
 			/* write extra data */
 			cmd->cmd = 0;
 			cmd->src = spareaddr;
-			cmd->dst = NAND_FLASH_BUFFER + (512 - ((cwperpage - 1) << 2));
+			cmd->dst =
+			    NAND_FLASH_BUFFER + (512 - ((cwperpage - 1) << 2));
 			cmd->len = (cwperpage << 2);
 			cmd++;
 		}
@@ -1450,18 +1475,20 @@
 	 ** protection violation (0x100), or the program success
 	 ** bit (0x80) is unset, we lose
 	 */
-	for(n = 0; n < cwperpage; n++) {
-		if(data->result[n].flash_status & 0x110) return -1;
-		if(!(data->result[n].flash_status & 0x80)) return -1;
+	for (n = 0; n < cwperpage; n++) {
+		if (data->result[n].flash_status & 0x110)
+			return -1;
+		if (!(data->result[n].flash_status & 0x80))
+			return -1;
 	}
 
 #if VERIFY_WRITE
 	n = _flash_read_page(cmdlist, ptrlist, page, flash_data,
-				 flash_data + 2048);
+			     flash_data + 2048);
 	if (n != 0)
 		return -1;
 	if (memcmp(flash_data, _addr, 2048) ||
-		memcmp(flash_data + 2048, _spareaddr, 16)) {
+	    memcmp(flash_data + 2048, _spareaddr, 16)) {
 		dprintf(CRITICAL, "verify error @ page %d\n", page);
 		return -1;
 	}
@@ -1469,38 +1496,40 @@
 	return 0;
 }
 
-static int flash_nand_write_page_interleave(dmov_s *cmdlist, unsigned *ptrlist, unsigned page,
-								  const void *_addr, const void *_spareaddr, unsigned raw_mode)
+static int
+flash_nand_write_page_interleave(dmov_s * cmdlist, unsigned *ptrlist,
+				 unsigned page, const void *_addr,
+				 const void *_spareaddr, unsigned raw_mode)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct interleave_data_flash_io *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned spareaddr = (unsigned) _spareaddr;
+	struct interleave_data_flash_io *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned spareaddr = (unsigned)_spareaddr;
 	unsigned n;
 	unsigned cwperpage, cwcount;
 
-	cwperpage = (flash_pagesize >> 9) * 2;  /* double for interleave mode */
+	cwperpage = (flash_pagesize >> 9) * 2;	/* double for interleave mode */
 	cwcount = (cwperpage << 1);
 
 	data->cmd = NAND_CMD_PRG_PAGE;
 	data->addr0 = page << 16;
 	data->addr1 = (page >> 16) & 0xff;
-	data->chipsel_cs0 = 0 | 4; /* flash0 + undoc bit */
-	data->chipsel_cs1 = 0 | 5; /* flash0 + undoc bit */
+	data->chipsel_cs0 = 0 | 4;	/* flash0 + undoc bit */
+	data->chipsel_cs1 = 0 | 5;	/* flash0 + undoc bit */
 	data->ebi2_chip_select_cfg0 = 0x00000805;
 	data->adm_mux_data_ack_req_nc01 = 0x00000A3C;
-	data->adm_mux_cmd_ack_req_nc01  = 0x0000053C;
+	data->adm_mux_cmd_ack_req_nc01 = 0x0000053C;
 	data->adm_mux_data_ack_req_nc10 = 0x00000F28;
-	data->adm_mux_cmd_ack_req_nc10  = 0x00000F14;
+	data->adm_mux_cmd_ack_req_nc10 = 0x00000F14;
 	data->adm_default_mux = 0x00000FC0;
 	data->default_ebi2_chip_select_cfg0 = 0x00000801;
 
-	if (!raw_mode){
+	if (!raw_mode) {
 		data->cfg0 = CFG0;
 		data->cfg1 = CFG1;
-	}else{
-		data->cfg0 = (NAND_CFG0_RAW & ~(7 << 6)) |((cwcount-1) << 6);
+	} else {
+		data->cfg0 = (NAND_CFG0_RAW & ~(7 << 6)) | ((cwcount - 1) << 6);
 		data->cfg1 = NAND_CFG1_RAW | (CFG1 & CFG1_WIDE_FLASH);
 	}
 
@@ -1554,21 +1583,21 @@
 			cmd++;
 
 			cmd->cmd = 0;
-			cmd->src =paddr(&data->cfg0);
+			cmd->src = paddr(&data->cfg0);
 			cmd->dst = NC01(NAND_DEV0_CFG0);
 			cmd->len = 8;
 			cmd++;
 
 			/* config CFG1 for CS1 */
 			cmd->cmd = 0;
-			cmd->src =paddr(&data->cfg0);
+			cmd->src = paddr(&data->cfg0);
 			cmd->dst = NC10(NAND_DEV1_CFG0);
 			cmd->len = 8;
 			cmd++;
 		}
 
 		if (n % 2 == 0) {
-			/* MASK CMD ACK/REQ --> NC10 (0xF14)*/
+			/* MASK CMD ACK/REQ --> NC10 (0xF14) */
 			cmd->cmd = 0;
 			cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc10);
 			cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1582,7 +1611,7 @@
 			cmd->len = 4;
 			cmd++;
 		} else {
-			/* MASK CMD ACK/REQ --> NC01 (0x53C)*/
+			/* MASK CMD ACK/REQ --> NC01 (0x53C) */
 			cmd->cmd = 0;
 			cmd->src = paddr(&data->adm_mux_cmd_ack_req_nc01);
 			cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1598,12 +1627,16 @@
 		}
 
 		cmd->cmd = 0;
-		if (!raw_mode){
+		if (!raw_mode) {
 			cmd->src = addr + n * 516;
-			cmd->len = ((n < (cwperpage - 1)) ? 516 : (512 - ((cwperpage - 1) << 2)));
-		}else{
+			cmd->len =
+			    ((n <
+			      (cwperpage - 1)) ? 516 : (512 -
+							((cwperpage -
+							  1) << 2)));
+		} else {
 			cmd->src = addr;
-			cmd->len =  528;
+			cmd->len = 528;
 		}
 
 		if (n % 2 == 0)
@@ -1616,7 +1649,9 @@
 			/* write extra data */
 			cmd->cmd = 0;
 			cmd->src = spareaddr;
-			cmd->dst = NC10(NAND_FLASH_BUFFER) + (512 - ((cwperpage - 1) << 2));
+			cmd->dst =
+			    NC10(NAND_FLASH_BUFFER) + (512 -
+						       ((cwperpage - 1) << 2));
 			cmd->len = (cwperpage << 2);
 			cmd++;
 		}
@@ -1629,19 +1664,20 @@
 			cmd->len = 4;
 			cmd++;
 			if (n != 0) {
-				/* MASK DATA ACK/REQ --> NC01 (0xA3C)*/
+				/* MASK DATA ACK/REQ --> NC01 (0xA3C) */
 				cmd->cmd = 0;
-				cmd->src = paddr(&data->adm_mux_data_ack_req_nc01);
+				cmd->src =
+				    paddr(&data->adm_mux_data_ack_req_nc01);
 				cmd->dst = EBI2_NAND_ADM_MUX;
 				cmd->len = 4;
 				cmd++;
 
 				/* block on data ready from NC10, then
-				* read the status register
-				*/
+				 * read the status register
+				 */
 				cmd->cmd = SRC_CRCI_NAND_DATA;
 				cmd->src = NC10(NAND_FLASH_STATUS);
-				cmd->dst = paddr(&data->result[n-1]);
+				cmd->dst = paddr(&data->result[n - 1]);
 				cmd->len = 4;
 				cmd++;
 			}
@@ -1653,7 +1689,7 @@
 			cmd->len = 4;
 			cmd++;
 
-			/* MASK DATA ACK/REQ --> NC10 (0xF28)*/
+			/* MASK DATA ACK/REQ --> NC10 (0xF28) */
 			cmd->cmd = 0;
 			cmd->src = paddr(&data->adm_mux_data_ack_req_nc10);
 			cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1665,13 +1701,13 @@
 			 */
 			cmd->cmd = SRC_CRCI_NAND_DATA;
 			cmd->src = NC01(NAND_FLASH_STATUS);
-			cmd->dst = paddr(&data->result[n-1]);
+			cmd->dst = paddr(&data->result[n - 1]);
 			cmd->len = 4;
 			cmd++;
 		}
 	}
 
-	/* MASK DATA ACK/REQ --> NC01 (0xA3C)*/
+	/* MASK DATA ACK/REQ --> NC01 (0xA3C) */
 	cmd->cmd = 0;
 	cmd->src = paddr(&data->adm_mux_data_ack_req_nc01);
 	cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1684,7 +1720,7 @@
 	 */
 	cmd->cmd = SRC_CRCI_NAND_DATA;
 	cmd->src = NC10(NAND_FLASH_STATUS);
-	cmd->dst = paddr(&data->result[n-1]);
+	cmd->dst = paddr(&data->result[n - 1]);
 	cmd->len = 4;
 	cmd++;
 
@@ -1694,7 +1730,7 @@
 	cmd->dst = NAND_EBI2_ECC_BUF_CFG;
 	cmd->len = 4;
 
-	/* MASK DATA ACK/REQ --> NC01 (0xFC0)*/
+	/* MASK DATA ACK/REQ --> NC01 (0xFC0) */
 	cmd->cmd = 0;
 	cmd->src = paddr(&data->adm_default_mux);
 	cmd->dst = EBI2_NAND_ADM_MUX;
@@ -1713,42 +1749,28 @@
 	dmov_exec_cmdptr(DMOV_NAND_CHAN, ptr);
 
 #if VERBOSE
-dprintf(INFO, "write page %d: status: %x %x %x %x %x %x %x %x \
-	%x %x %x %x %x %x %x %x \n", page,
-	data->result[0].flash_status[0],
-	data->result[1].flash_status[1],
-	data->result[2].flash_status[2],
-	data->result[3].flash_status[3],
-	data->result[4].flash_status[4],
-	data->result[5].flash_status[5],
-	data->result[6].flash_status[6],
-	data->result[7].flash_status[7],
-	data->result[8].flash_status[8],
-	data->result[9].flash_status[9],
-	data->result[10].flash_status[10],
-	data->result[11].flash_status[11],
-	data->result[12].flash_status[12],
-	data->result[13].flash_status[13],
-	data->result[14].flash_status[14],
-	data->result[15].flash_status[15]);
+	dprintf(INFO, "write page %d: status: %x %x %x %x %x %x %x %x \
+	%x %x %x %x %x %x %x %x \n", page, data->result[0].flash_status[0], data->result[1].flash_status[1], data->result[2].flash_status[2], data->result[3].flash_status[3], data->result[4].flash_status[4], data->result[5].flash_status[5], data->result[6].flash_status[6], data->result[7].flash_status[7], data->result[8].flash_status[8], data->result[9].flash_status[9], data->result[10].flash_status[10], data->result[11].flash_status[11], data->result[12].flash_status[12], data->result[13].flash_status[13], data->result[14].flash_status[14], data->result[15].flash_status[15]);
 #endif
 
 	/* if any of the writes failed (0x10), or there was a
 	 ** protection violation (0x100), or the program success
 	 ** bit (0x80) is unset, we lose
 	 */
-	for(n = 0; n < cwperpage; n++) {
-		if(data->result[n].flash_status & 0x110) return -1;
-		if(!(data->result[n].flash_status & 0x80)) return -1;
+	for (n = 0; n < cwperpage; n++) {
+		if (data->result[n].flash_status & 0x110)
+			return -1;
+		if (!(data->result[n].flash_status & 0x80))
+			return -1;
 	}
 
 #if VERIFY_WRITE
 	n = _flash_read_page(cmdlist, ptrlist, page, flash_data,
-				 flash_data + 2048);
+			     flash_data + 2048);
 	if (n != 0)
 		return -1;
 	if (memcmp(flash_data, _addr, 2048) ||
-		memcmp(flash_data + 2048, _spareaddr, 16)) {
+	    memcmp(flash_data + 2048, _spareaddr, 16)) {
 		dprintf(CRITICAL, "verify error @ page %d\n", page);
 		return -1;
 	}
@@ -1757,19 +1779,20 @@
 }
 
 char empty_buf[528];
-static int flash_nand_mark_badblock(dmov_s *cmdlist, unsigned *ptrlist, unsigned page)
+static int
+flash_nand_mark_badblock(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
-  memset(empty_buf,0,528);
-  /* Going to first page of the block */
-  if(page & num_pages_per_blk_mask)
-	page = page - (page & num_pages_per_blk_mask);
-  return _flash_nand_write_page(cmdlist, ptrlist, page, empty_buf, 0, 1);
+	memset(empty_buf, 0, 528);
+	/* Going to first page of the block */
+	if (page & num_pages_per_blk_mask)
+		page = page - (page & num_pages_per_blk_mask);
+	return _flash_nand_write_page(cmdlist, ptrlist, page, empty_buf, 0, 1);
 }
 
 unsigned nand_cfg0;
 unsigned nand_cfg1;
 
-static int flash_nand_read_config(dmov_s *cmdlist, unsigned *ptrlist)
+static int flash_nand_read_config(dmov_s * cmdlist, unsigned *ptrlist)
 {
 	static unsigned CFG0_TMP, CFG1_TMP;
 	cmdlist[0].cmd = CMD_OCB;
@@ -1786,7 +1809,7 @@
 
 	dmov_exec_cmdptr(DMOV_NAND_CHAN, ptrlist);
 
-	if((CFG0_TMP == 0) || (CFG1_TMP == 0)) {
+	if ((CFG0_TMP == 0) || (CFG1_TMP == 0)) {
 		return -1;
 	}
 
@@ -1797,37 +1820,36 @@
 	}
 	dprintf(INFO, "nandcfg: %x %x (initial)\n", CFG0, CFG1);
 
-	CFG0_A = (((flash_pagesize >> 9) - 1) <<  6)  /* 4/8 cw/pg for 2/4k */
-		|	(516 <<  9)  /* 516 user data bytes */
-		|	(10 << 19)  /* 10 parity bytes */
-		|	(5 << 27)  /* 5 address cycles */
-		|	(0 << 30)  /* Do not read status before data */
-		|	(1 << 31)  /* Send read cmd */
-			/* 0 spare bytes for 16 bit nand or 1 spare bytes for 8 bit */
-		|	((nand_cfg1 & CFG1_WIDE_FLASH) ? (0 << 23) :
-		(enable_bch_ecc ? (2 << 23) : (1 << 23))); /* 2 spare bytes for 8 bit bch ecc */
-	CFG1_A = (0 <<  0)  /* Enable ecc */
-		|	(7 <<  2)  /* 8 recovery cycles */
-		|	(0 <<  5)  /* Allow CS deassertion */
-		|	((flash_pagesize - ((enable_bch_ecc ? 532 : 528) *
-		((flash_pagesize >> 9) - 1)) + 1) << 6) /* Bad block marker location */
-		|	(0 << 16)  /* Bad block in user data area */
-		|	(2 << 17)  /* 6 cycle tWB/tRB */
-		|	(nand_cfg1 & CFG1_WIDE_FLASH); /* preserve wide flash flag */
+	CFG0_A = (((flash_pagesize >> 9) - 1) << 6)	/* 4/8 cw/pg for 2/4k */
+	    |(516 << 9)		/* 516 user data bytes */
+	    |(10 << 19)		/* 10 parity bytes */
+	    |(5 << 27)		/* 5 address cycles */
+	    |(0 << 30)		/* Do not read status before data */
+	    |(1 << 31)
+	    /* Send read cmd */
+	    /* 0 spare bytes for 16 bit nand or 1 spare bytes for 8 bit */
+	    |((nand_cfg1 & CFG1_WIDE_FLASH) ? (0 << 23) : (enable_bch_ecc ? (2 << 23) : (1 << 23)));	/* 2 spare bytes for 8 bit bch ecc */
+	CFG1_A = (0 << 0)	/* Enable ecc */
+	    |(7 << 2)		/* 8 recovery cycles */
+	    |(0 << 5)		/* Allow CS deassertion */
+	    |((flash_pagesize - ((enable_bch_ecc ? 532 : 528) * ((flash_pagesize >> 9) - 1)) + 1) << 6)	/* Bad block marker location */
+	    |(0 << 16)		/* Bad block in user data area */
+	    |(2 << 17)		/* 6 cycle tWB/tRB */
+	    |(nand_cfg1 & CFG1_WIDE_FLASH);	/* preserve wide flash flag */
 
 	NAND_CFG0_RAW = CFG0_RAW;
 	NAND_CFG1_RAW = CFG1_RAW;
 
 	if (enable_bch_ecc) {
-		CFG1_A |= (1 << 27); /* Enable BCH engine */
-		ECC_BCH_CFG = (0 << 0) /* Enable ECC*/
-			|   (0 << 1) /* Enable/Disable SW reset of ECC engine */
-			|   (1 << 4) /* 8bit ecc*/
-			|   ((nand_cfg1 & CFG1_WIDE_FLASH) ? (14 << 8) : (13 << 8))/*parity bytes*/
-			|   (516 << 16) /* 516 user data bytes */
-			|   (1 << 30); /* Turn on ECC engine clocks always */
-		NAND_CFG0_RAW = CFG0_RAW_BCHECC; /* CW size is increased to 532B */
-        }
+		CFG1_A |= (1 << 27);	/* Enable BCH engine */
+		ECC_BCH_CFG = (0 << 0)	/* Enable ECC */
+		    |(0 << 1)	/* Enable/Disable SW reset of ECC engine */
+		    |(1 << 4)	/* 8bit ecc */
+		    |((nand_cfg1 & CFG1_WIDE_FLASH) ? (14 << 8) : (13 << 8))	/*parity bytes */
+		    |(516 << 16)	/* 516 user data bytes */
+		    |(1 << 30);	/* Turn on ECC engine clocks always */
+		NAND_CFG0_RAW = CFG0_RAW_BCHECC;	/* CW size is increased to 532B */
+	}
 
 	dprintf(INFO, "nandcfg(Apps): %x %x (used)\n", CFG0_A, CFG1_A);
 
@@ -1836,43 +1858,46 @@
 	if (flash_info.type == FLASH_16BIT_NAND_DEVICE) {
 		nand_cfg1 |= CFG1_WIDE_FLASH;
 	}
-	CFG0_M = (((flash_pagesize >> 9) - 1) <<  6)  /* 4/8 cw/pg for 2/4k */
-		|	(512 <<  9) /* 512 user data bytes */
-		|	(10 << 19)  /* 10 parity bytes */
-		|	(5 << 27)  /* 5 address cycles */
-		|	(0 << 30)  /* Do not read status before data */
-		|	(1 << 31)  /* Send read cmd */
-		|	((nand_cfg1 & CFG1_WIDE_FLASH) ? (4 << 23) : (5 << 23));
-	CFG1_M = (0 <<  0)  /* Enable ecc */
-		|	(7 <<  2)  /* 8 recovery cycles */
-		|	(0 <<  5)  /* Allow CS deassertion */
-		|	((flash_pagesize - (528 * ((flash_pagesize >> 9) - 1)) + 1) <<  6)	/* Bad block marker location */
-		|	(0 << 16)  /* Bad block in user data area */
-		|	(2 << 17)  /* 6 cycle tWB/tRB */
-		|	(nand_cfg1 & CFG1_WIDE_FLASH); /* preserve wide flash flag */
+	CFG0_M = (((flash_pagesize >> 9) - 1) << 6)	/* 4/8 cw/pg for 2/4k */
+	    |(512 << 9)		/* 512 user data bytes */
+	    |(10 << 19)		/* 10 parity bytes */
+	    |(5 << 27)		/* 5 address cycles */
+	    |(0 << 30)		/* Do not read status before data */
+	    |(1 << 31)		/* Send read cmd */
+	    |((nand_cfg1 & CFG1_WIDE_FLASH) ? (4 << 23) : (5 << 23));
+	CFG1_M = (0 << 0)	/* Enable ecc */
+	    |(7 << 2)		/* 8 recovery cycles */
+	    |(0 << 5)		/* Allow CS deassertion */
+	    |((flash_pagesize - (528 * ((flash_pagesize >> 9) - 1)) + 1) << 6)	/* Bad block marker location */
+	    |(0 << 16)		/* Bad block in user data area */
+	    |(2 << 17)		/* 6 cycle tWB/tRB */
+	    |(nand_cfg1 & CFG1_WIDE_FLASH);	/* preserve wide flash flag */
 	dprintf(INFO, "nandcfg(Modem): %x %x (used)\n", CFG0_M, CFG1_M);
 	return 0;
 }
 
 /* OneNAND programming functions */
 
-static void flash_onenand_read_id(dmov_s *cmdlist, unsigned *ptrlist)
+static void flash_onenand_read_id(dmov_s * cmdlist, unsigned *ptrlist)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
 	unsigned *data = ptrlist + 4;
 
 	data[0] = SFLASH_BCFG;
-	data[1] = SFLASH_PREPCMD(8, 0, 0, NAND_SFCMD_DATXS, NAND_SFCMD_ASYNC, NAND_SFCMD_REGRD);
+	data[1] =
+	    SFLASH_PREPCMD(8, 0, 0, NAND_SFCMD_DATXS, NAND_SFCMD_ASYNC,
+			   NAND_SFCMD_REGRD);
 	data[2] = (ONENAND_DEVICE_ID << 16) | (ONENAND_MANUFACTURER_ID);
 	data[3] = (ONENAND_DATA_BUFFER_SIZE << 16) | (ONENAND_VERSION_ID);
-	data[4] = (ONENAND_AMOUNT_OF_BUFFERS << 16) | (ONENAND_BOOT_BUFFER_SIZE);
+	data[4] =
+	    (ONENAND_AMOUNT_OF_BUFFERS << 16) | (ONENAND_BOOT_BUFFER_SIZE);
 	data[5] = (CLEAN_DATA_16 << 16) | (ONENAND_TECHNOLOGY);
-	data[6] = CLEAN_DATA_32;  //status
-	data[7]  = CLEAN_DATA_32;  //register read
-	data[8]  = CLEAN_DATA_32;  //register read
-	data[9]  = CLEAN_DATA_32;  //register read
-	data[10] = CLEAN_DATA_32;  //register read
+	data[6] = CLEAN_DATA_32;	//status
+	data[7] = CLEAN_DATA_32;	//register read
+	data[8] = CLEAN_DATA_32;	//register read
+	data[9] = CLEAN_DATA_32;	//register read
+	data[10] = CLEAN_DATA_32;	//register read
 	data[11] = 1;
 	data[12] = 0 | 4;
 
@@ -1933,11 +1958,10 @@
 
 	flash_info.id = data[7];
 	flash_info.vendor = data[7] & CLEAN_DATA_16;
-	flash_info.device  = (data[7] >> 16) & CLEAN_DATA_16;
+	flash_info.device = (data[7] >> 16) & CLEAN_DATA_16;
 	return;
 }
 
-
 struct data_onenand_erase {
 	unsigned sfbcfg;
 	unsigned sfcmd[4];
@@ -1959,47 +1983,44 @@
 	unsigned data6;
 };
 
+static int _flash_onenand_read_page(dmov_s * cmdlist, unsigned *ptrlist,
+				    unsigned page, void *_addr,
+				    void *_spareaddr, unsigned raw_mode);
 
-static int _flash_onenand_read_page(dmov_s *cmdlist, unsigned *ptrlist,
-									unsigned page, void *_addr,
-									void *_spareaddr, unsigned raw_mode);
-
-
-static int flash_onenand_block_isbad(dmov_s *cmdlist, unsigned *ptrlist,
-									 unsigned page)
+static int
+flash_onenand_block_isbad(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
 	unsigned char page_data[2112];
 	unsigned char *oobptr = &(page_data[2048]);
 
 	/* Going to first page of the block */
-	if(page & num_pages_per_blk_mask)
+	if (page & num_pages_per_blk_mask)
 		page = page - (page & num_pages_per_blk_mask);
 
 	/* Reading page in raw mode */
-	if (_flash_onenand_read_page(cmdlist, ptrlist,page, page_data, 0, 1))
+	if (_flash_onenand_read_page(cmdlist, ptrlist, page, page_data, 0, 1))
 		return 1;
 
 	/* Checking if block is bad */
-	if ((oobptr[0] != 0xFF)  || (oobptr[1] != 0xFF)  ||
-		(oobptr[16] != 0xFF) || (oobptr[17] != 0xFF) ||
-		(oobptr[32] != 0xFF) || (oobptr[33] != 0xFF) ||
-		(oobptr[48] != 0xFF) || (oobptr[49] != 0xFF)
-		)
-	{
+	if ((oobptr[0] != 0xFF) || (oobptr[1] != 0xFF) ||
+	    (oobptr[16] != 0xFF) || (oobptr[17] != 0xFF) ||
+	    (oobptr[32] != 0xFF) || (oobptr[33] != 0xFF) ||
+	    (oobptr[48] != 0xFF) || (oobptr[49] != 0xFF)) {
 		return 1;
 	}
 	return 0;
 }
 
-static int flash_onenand_erase_block(dmov_s *cmdlist, unsigned *ptrlist,
-									 unsigned page)
+static int
+flash_onenand_erase_block(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
 	struct data_onenand_erase *data = (void *)ptrlist + 4;
 	int isbad = 0;
 	unsigned erasesize = (flash_pagesize * num_pages_per_blk);
-	unsigned onenand_startaddr1 = DEVICE_FLASHCORE_0 | (page * flash_pagesize)/erasesize;
+	unsigned onenand_startaddr1 =
+	    DEVICE_FLASHCORE_0 | (page * flash_pagesize) / erasesize;
 	unsigned onenand_startaddr8 = 0x0000;
 	unsigned onenand_startaddr2 = DEVICE_BUFFERRAM_0 << 15;
 	unsigned onenand_startbuffer = DATARAM0_0 << 8;
@@ -2008,74 +2029,61 @@
 	unsigned interrupt_status;
 	unsigned ecc_status;
 
-	if((page * flash_pagesize) & (erasesize-1)) return -1;
+	if ((page * flash_pagesize) & (erasesize - 1))
+		return -1;
 
 	/* Check for bad block and erase only if block is not marked bad */
 	isbad = flash_onenand_block_isbad(cmdlist, ptrlist, page);
-	if (isbad)
-	{
-		dprintf(INFO, "skipping @ %d (bad block)\n", page / num_pages_per_blk);
+	if (isbad) {
+		dprintf(INFO, "skipping @ %d (bad block)\n",
+			page / num_pages_per_blk);
 		return -1;
 	}
 
-	/*Erase block*/
+	/*Erase block */
 	onenand_startaddr1 = DEVICE_FLASHCORE_0 |
-				((page * flash_pagesize) / (erasesize));
+	    ((page * flash_pagesize) / (erasesize));
 	onenand_startaddr8 = 0x0000;
 	onenand_startaddr2 = DEVICE_BUFFERRAM_0 << 15;
 	onenand_startbuffer = DATARAM0_0 << 8;
 
-
 	data->sfbcfg = SFLASH_BCFG;
 	data->sfcmd[0] = SFLASH_PREPCMD(7, 0, 0,
-				  NAND_SFCMD_CMDXS,
-				  NAND_SFCMD_ASYNC,
-				  NAND_SFCMD_REGWR);
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
 	data->sfcmd[1] = SFLASH_PREPCMD(0, 0, 32,
-				  NAND_SFCMD_CMDXS,
-				  NAND_SFCMD_ASYNC,
-				  NAND_SFCMD_INTHI);
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_INTHI);
 	data->sfcmd[2] = SFLASH_PREPCMD(3, 7, 0,
-				  NAND_SFCMD_DATXS,
-				  NAND_SFCMD_ASYNC,
-				  NAND_SFCMD_REGRD);
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGRD);
 	data->sfcmd[3] = SFLASH_PREPCMD(4, 10, 0,
-				  NAND_SFCMD_CMDXS,
-				  NAND_SFCMD_ASYNC,
-				  NAND_SFCMD_REGWR);
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
 	data->sfexec = 1;
 	data->sfstat[0] = CLEAN_DATA_32;
 	data->sfstat[1] = CLEAN_DATA_32;
 	data->sfstat[2] = CLEAN_DATA_32;
 	data->sfstat[3] = CLEAN_DATA_32;
-	data->addr0 = (ONENAND_INTERRUPT_STATUS << 16) |
-				  (ONENAND_SYSTEM_CONFIG_1);
-	data->addr1 = (ONENAND_START_ADDRESS_8 << 16) |
-				  (ONENAND_START_ADDRESS_1);
-	data->addr2 = (ONENAND_START_BUFFER << 16) |
-				  (ONENAND_START_ADDRESS_2);
-	data->addr3 = (ONENAND_ECC_STATUS << 16) |
-				  (ONENAND_COMMAND);
+	data->addr0 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr1 =
+	    (ONENAND_START_ADDRESS_8 << 16) | (ONENAND_START_ADDRESS_1);
+	data->addr2 = (ONENAND_START_BUFFER << 16) | (ONENAND_START_ADDRESS_2);
+	data->addr3 = (ONENAND_ECC_STATUS << 16) | (ONENAND_COMMAND);
 	data->addr4 = (ONENAND_CONTROLLER_STATUS << 16) |
-				  (ONENAND_INTERRUPT_STATUS);
-	data->addr5 = (ONENAND_INTERRUPT_STATUS << 16) |
-				  (ONENAND_SYSTEM_CONFIG_1);
-	data->addr6 = (ONENAND_START_ADDRESS_3 << 16) |
-				  (ONENAND_START_ADDRESS_1);
-	data->data0 = (ONENAND_CLRINTR << 16) |
-				  (ONENAND_SYSCFG1_ECCENA);
-	data->data1 = (onenand_startaddr8 << 16) |
-				  (onenand_startaddr1);
-	data->data2 = (onenand_startbuffer << 16) |
-				  (onenand_startaddr2);
-	data->data3 = (CLEAN_DATA_16 << 16) |
-				  (ONENAND_CMDERAS);
-	data->data4 = (CLEAN_DATA_16 << 16) |
-				  (CLEAN_DATA_16);
-	data->data5 = (ONENAND_CLRINTR << 16) |
-				  (ONENAND_SYSCFG1_ECCENA);
-	data->data6 = (ONENAND_STARTADDR3_RES << 16) |
-				  (ONENAND_STARTADDR1_RES);
+	    (ONENAND_INTERRUPT_STATUS);
+	data->addr5 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr6 =
+	    (ONENAND_START_ADDRESS_3 << 16) | (ONENAND_START_ADDRESS_1);
+	data->data0 = (ONENAND_CLRINTR << 16) | (ONENAND_SYSCFG1_ECCENA);
+	data->data1 = (onenand_startaddr8 << 16) | (onenand_startaddr1);
+	data->data2 = (onenand_startbuffer << 16) | (onenand_startaddr2);
+	data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDERAS);
+	data->data4 = (CLEAN_DATA_16 << 16) | (CLEAN_DATA_16);
+	data->data5 = (ONENAND_CLRINTR << 16) | (ONENAND_SYSCFG1_ECCENA);
+	data->data6 = (ONENAND_STARTADDR3_RES << 16) | (ONENAND_STARTADDR1_RES);
 
 	/***************************************************************/
 	/* Write the necessary address registers in the onenand device */
@@ -2145,7 +2153,7 @@
 	cmd++;
 
 	/***************************************************************/
-	/* Wait for the interrupt from the Onenand device controller	*/
+	/* Wait for the interrupt from the Onenand device controller    */
 	/***************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -2209,7 +2217,7 @@
 	cmd++;
 
 	/***************************************************************/
-	/* Restore the necessary registers to proper values			*/
+	/* Restore the necessary registers to proper values                     */
 	/***************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -2243,29 +2251,24 @@
 
 #if VERBOSE
 	dprintf(INFO, "\n%s: sflash status %x %x %x %x\n", __func__,
-			data->sfstat[0],
-			data->sfstat[1],
-			data->sfstat[2],
-			data->sfstat[3]);
+		data->sfstat[0],
+		data->sfstat[1], data->sfstat[2], data->sfstat[3]);
 
 	dprintf(INFO, "%s: controller_status = %x\n", __func__,
-			controller_status);
+		controller_status);
 	dprintf(INFO, "%s: interrupt_status = %x\n", __func__,
-			interrupt_status);
-	dprintf(INFO, "%s: ecc_status = %x\n", __func__,
-			ecc_status);
+		interrupt_status);
+	dprintf(INFO, "%s: ecc_status = %x\n", __func__, ecc_status);
 #endif
 	/* Check for errors, protection violations etc */
 	if ((controller_status != 0)
-		 || (data->sfstat[0] & 0x110)
-		 || (data->sfstat[1] & 0x110)
-		 || (data->sfstat[2] & 0x110)
-		 || (data->sfstat[3] & 0x110)) {
-	  dprintf(CRITICAL, "%s: ECC/MPU/OP error\n", __func__);
-	  return -1;
+	    || (data->sfstat[0] & 0x110)
+	    || (data->sfstat[1] & 0x110)
+	    || (data->sfstat[2] & 0x110) || (data->sfstat[3] & 0x110)) {
+		dprintf(CRITICAL, "%s: ECC/MPU/OP error\n", __func__);
+		return -1;
 	}
 
-
 #if VERBOSE
 	dprintf(INFO, "status: %x\n", data[5]);
 #endif
@@ -2273,106 +2276,94 @@
 	return 0;
 }
 
-
 struct data_onenand_read {
-	  unsigned sfbcfg;
-	  unsigned sfcmd[9];
-	  unsigned sfexec;
-	  unsigned sfstat[9];
-	  unsigned addr0;
-	  unsigned addr1;
-	  unsigned addr2;
-	  unsigned addr3;
-	  unsigned addr4;
-	  unsigned addr5;
-	  unsigned addr6;
-	  unsigned data0;
-	  unsigned data1;
-	  unsigned data2;
-	  unsigned data3;
-	  unsigned data4;
-	  unsigned data5;
-	  unsigned data6;
-	  unsigned macro[5];
+	unsigned sfbcfg;
+	unsigned sfcmd[9];
+	unsigned sfexec;
+	unsigned sfstat[9];
+	unsigned addr0;
+	unsigned addr1;
+	unsigned addr2;
+	unsigned addr3;
+	unsigned addr4;
+	unsigned addr5;
+	unsigned addr6;
+	unsigned data0;
+	unsigned data1;
+	unsigned data2;
+	unsigned data3;
+	unsigned data4;
+	unsigned data5;
+	unsigned data6;
+	unsigned macro[5];
 };
 
-
-static int _flash_onenand_read_page(dmov_s *cmdlist, unsigned *ptrlist,
-									unsigned page, void *_addr, void *_spareaddr,
-									unsigned raw_mode)
+static int
+_flash_onenand_read_page(dmov_s * cmdlist, unsigned *ptrlist,
+			 unsigned page, void *_addr, void *_spareaddr,
+			 unsigned raw_mode)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct data_onenand_read *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned curr_addr = (unsigned) _addr;
+	struct data_onenand_read *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned curr_addr = (unsigned)_addr;
 #if VERBOSE
-	unsigned spareaddr = (unsigned) _spareaddr;
+	unsigned spareaddr = (unsigned)_spareaddr;
 #endif
 	unsigned i;
 	unsigned erasesize = (flash_pagesize * num_pages_per_blk);
 	unsigned writesize = flash_pagesize;
 
 	unsigned onenand_startaddr1 = DEVICE_FLASHCORE_0 |
-									((unsigned)(page * flash_pagesize) / erasesize);
+	    ((unsigned)(page * flash_pagesize) / erasesize);
 	unsigned onenand_startaddr8 = (((unsigned)(page * flash_pagesize) &
-										(erasesize - 1)) / writesize) << 2;
+					(erasesize - 1)) / writesize) << 2;
 	unsigned onenand_startaddr2 = DEVICE_BUFFERRAM_0 << 15;
 	unsigned onenand_startbuffer = DATARAM0_0 << 8;
-	unsigned onenand_sysconfig1 = (raw_mode == 1) ? ONENAND_SYSCFG1_ECCDIS :\
-													ONENAND_SYSCFG1_ECCENA;
+	unsigned onenand_sysconfig1 = (raw_mode == 1) ? ONENAND_SYSCFG1_ECCDIS :
+	    ONENAND_SYSCFG1_ECCENA;
 
 	unsigned controller_status;
 	unsigned interrupt_status;
 	unsigned ecc_status;
-	if (raw_mode != 1)
-	{
+	if (raw_mode != 1) {
 		int isbad = 0;
 		isbad = flash_onenand_block_isbad(cmdlist, ptrlist, page);
 		if (isbad)
 			return -2;
 	}
-
 	//static int oobfree_offset[8] = {2, 14, 18, 30, 34, 46, 50, 62};
 	//static int oobfree_length[8] = {3, 2, 3, 2, 3, 2, 3, 2};
 
 	data->sfbcfg = SFLASH_BCFG;
-	data->sfcmd[0] =  SFLASH_PREPCMD(7, 0, 0,
-					 NAND_SFCMD_CMDXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_REGWR);
-	data->sfcmd[1] =  SFLASH_PREPCMD(0, 0, 32,
-					 NAND_SFCMD_CMDXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_INTHI);
-	data->sfcmd[2] =  SFLASH_PREPCMD(3, 7, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_REGRD);
-	data->sfcmd[3] =  SFLASH_PREPCMD(256, 0, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_DATRD);
-	data->sfcmd[4] =  SFLASH_PREPCMD(256, 0, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_DATRD);
-	data->sfcmd[5] =  SFLASH_PREPCMD(256, 0, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_DATRD);
-	data->sfcmd[6] =  SFLASH_PREPCMD(256, 0, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_DATRD);
-	data->sfcmd[7] =  SFLASH_PREPCMD(32, 0, 0,
-					 NAND_SFCMD_DATXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_DATRD);
-	data->sfcmd[8] =  SFLASH_PREPCMD(4, 10, 0,
-					 NAND_SFCMD_CMDXS,
-					 NAND_SFCMD_ASYNC,
-					 NAND_SFCMD_REGWR);
+	data->sfcmd[0] = SFLASH_PREPCMD(7, 0, 0,
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
+	data->sfcmd[1] = SFLASH_PREPCMD(0, 0, 32,
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_INTHI);
+	data->sfcmd[2] = SFLASH_PREPCMD(3, 7, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGRD);
+	data->sfcmd[3] = SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATRD);
+	data->sfcmd[4] = SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATRD);
+	data->sfcmd[5] = SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATRD);
+	data->sfcmd[6] = SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATRD);
+	data->sfcmd[7] = SFLASH_PREPCMD(32, 0, 0,
+					NAND_SFCMD_DATXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATRD);
+	data->sfcmd[8] = SFLASH_PREPCMD(4, 10, 0,
+					NAND_SFCMD_CMDXS,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
 	data->sfexec = 1;
 	data->sfstat[0] = CLEAN_DATA_32;
 	data->sfstat[1] = CLEAN_DATA_32;
@@ -2384,34 +2375,25 @@
 	data->sfstat[7] = CLEAN_DATA_32;
 	data->sfstat[8] = CLEAN_DATA_32;
 
-	data->addr0 = (ONENAND_INTERRUPT_STATUS << 16) |
-				  (ONENAND_SYSTEM_CONFIG_1);
-	data->addr1 = (ONENAND_START_ADDRESS_8 << 16) |
-				  (ONENAND_START_ADDRESS_1);
-	data->addr2 = (ONENAND_START_BUFFER << 16) |
-				  (ONENAND_START_ADDRESS_2);
-	data->addr3 = (ONENAND_ECC_STATUS << 16) |
-				  (ONENAND_COMMAND);
+	data->addr0 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr1 =
+	    (ONENAND_START_ADDRESS_8 << 16) | (ONENAND_START_ADDRESS_1);
+	data->addr2 = (ONENAND_START_BUFFER << 16) | (ONENAND_START_ADDRESS_2);
+	data->addr3 = (ONENAND_ECC_STATUS << 16) | (ONENAND_COMMAND);
 	data->addr4 = (ONENAND_CONTROLLER_STATUS << 16) |
-				  (ONENAND_INTERRUPT_STATUS);
-	data->addr5 = (ONENAND_INTERRUPT_STATUS << 16) |
-				  (ONENAND_SYSTEM_CONFIG_1);
-	data->addr6 = (ONENAND_START_ADDRESS_3 << 16) |
-				  (ONENAND_START_ADDRESS_1);
-	data->data0 = (ONENAND_CLRINTR << 16) |
-				  (onenand_sysconfig1);
-	data->data1 = (onenand_startaddr8 << 16) |
-				  (onenand_startaddr1);
-	data->data2 = (onenand_startbuffer << 16) |
-				  (onenand_startaddr2);
-	data->data3 = (CLEAN_DATA_16 << 16) |
-				  (ONENAND_CMDLOADSPARE);
-	data->data4 = (CLEAN_DATA_16 << 16) |
-				  (CLEAN_DATA_16);
-	data->data5 = (ONENAND_CLRINTR << 16) |
-				  (ONENAND_SYSCFG1_ECCENA);
-	data->data6 = (ONENAND_STARTADDR3_RES << 16) |
-				  (ONENAND_STARTADDR1_RES);
+	    (ONENAND_INTERRUPT_STATUS);
+	data->addr5 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr6 =
+	    (ONENAND_START_ADDRESS_3 << 16) | (ONENAND_START_ADDRESS_1);
+	data->data0 = (ONENAND_CLRINTR << 16) | (onenand_sysconfig1);
+	data->data1 = (onenand_startaddr8 << 16) | (onenand_startaddr1);
+	data->data2 = (onenand_startbuffer << 16) | (onenand_startaddr2);
+	data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDLOADSPARE);
+	data->data4 = (CLEAN_DATA_16 << 16) | (CLEAN_DATA_16);
+	data->data5 = (ONENAND_CLRINTR << 16) | (ONENAND_SYSCFG1_ECCENA);
+	data->data6 = (ONENAND_STARTADDR3_RES << 16) | (ONENAND_STARTADDR1_RES);
 	data->macro[0] = 0x0200;
 	data->macro[1] = 0x0300;
 	data->macro[2] = 0x0400;
@@ -2419,7 +2401,7 @@
 	data->macro[4] = 0x8010;
 
 	/*************************************************************/
-	/* Write necessary address registers in the onenand device	*/
+	/* Write necessary address registers in the onenand device      */
 	/*************************************************************/
 
 	/* Enable and configure the SFlash controller */
@@ -2510,9 +2492,8 @@
 	cmd->len = 4;
 	cmd++;
 
-
 	/*************************************************************/
-	/* Read necessary status registers from the onenand device	*/
+	/* Read necessary status registers from the onenand device      */
 	/*************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -2550,98 +2531,95 @@
 	cmd->len = 4;
 	cmd++;
 
-
 	/*************************************************************/
-	/* Read the data ram area from the onenand buffer ram		*/
+	/* Read the data ram area from the onenand buffer ram           */
 	/*************************************************************/
 
 	if (addr) {
 
-		data->data3 = (CLEAN_DATA_16 << 16) |
-					(ONENAND_CMDLOAD);
+		data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDLOAD);
 
 		for (i = 0; i < 4; i++) {
 
-		  /* Block on cmd ready and write CMD register */
-		  cmd->cmd = DST_CRCI_NAND_CMD;
-		  cmd->src = paddr(&data->sfcmd[3+i]);
-		  cmd->dst = NAND_SFLASHC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+			/* Block on cmd ready and write CMD register */
+			cmd->cmd = DST_CRCI_NAND_CMD;
+			cmd->src = paddr(&data->sfcmd[3 + i]);
+			cmd->dst = NAND_SFLASHC_CMD;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Write the MACRO1 register */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->macro[i]);
-		  cmd->dst = NAND_MACRO1_REG;
-		  cmd->len = 4;
-		  cmd++;
+			/* Write the MACRO1 register */
+			cmd->cmd = 0;
+			cmd->src = paddr(&data->macro[i]);
+			cmd->dst = NAND_MACRO1_REG;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Kick the execute command */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->sfexec);
-		  cmd->dst = NAND_SFLASHC_EXEC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+			/* Kick the execute command */
+			cmd->cmd = 0;
+			cmd->src = paddr(&data->sfexec);
+			cmd->dst = NAND_SFLASHC_EXEC_CMD;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Block on data rdy, & read status register */
-		  cmd->cmd = SRC_CRCI_NAND_DATA;
-		  cmd->src = NAND_SFLASHC_STATUS;
-		  cmd->dst = paddr(&data->sfstat[3+i]);
-		  cmd->len = 4;
-		  cmd++;
+			/* Block on data rdy, & read status register */
+			cmd->cmd = SRC_CRCI_NAND_DATA;
+			cmd->src = NAND_SFLASHC_STATUS;
+			cmd->dst = paddr(&data->sfstat[3 + i]);
+			cmd->len = 4;
+			cmd++;
 
-		  /* Transfer nand ctlr buf contents to usr buf */
-		  cmd->cmd = 0;
-		  cmd->src = NAND_FLASH_BUFFER;
-		  cmd->dst = curr_addr;
-		  cmd->len = 512;
-		  curr_addr += 512;
-		  cmd++;
+			/* Transfer nand ctlr buf contents to usr buf */
+			cmd->cmd = 0;
+			cmd->src = NAND_FLASH_BUFFER;
+			cmd->dst = curr_addr;
+			cmd->len = 512;
+			curr_addr += 512;
+			cmd++;
 		}
 	}
 
 	/* Read oob bytes in Raw Mode */
-	if (raw_mode == 1)
-	{
-		  /* Block on cmd ready and write CMD register */
-		  cmd->cmd = DST_CRCI_NAND_CMD;
-		  cmd->src = paddr(&data->sfcmd[7]);
-		  cmd->dst = NAND_SFLASHC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+	if (raw_mode == 1) {
+		/* Block on cmd ready and write CMD register */
+		cmd->cmd = DST_CRCI_NAND_CMD;
+		cmd->src = paddr(&data->sfcmd[7]);
+		cmd->dst = NAND_SFLASHC_CMD;
+		cmd->len = 4;
+		cmd++;
 
-		  /* Write the MACRO1 register */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->macro[4]);
-		  cmd->dst = NAND_MACRO1_REG;
-		  cmd->len = 4;
-		  cmd++;
+		/* Write the MACRO1 register */
+		cmd->cmd = 0;
+		cmd->src = paddr(&data->macro[4]);
+		cmd->dst = NAND_MACRO1_REG;
+		cmd->len = 4;
+		cmd++;
 
-		  /* Kick the execute command */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->sfexec);
-		  cmd->dst = NAND_SFLASHC_EXEC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+		/* Kick the execute command */
+		cmd->cmd = 0;
+		cmd->src = paddr(&data->sfexec);
+		cmd->dst = NAND_SFLASHC_EXEC_CMD;
+		cmd->len = 4;
+		cmd++;
 
-		  /* Block on data rdy, & read status register */
-		  cmd->cmd = SRC_CRCI_NAND_DATA;
-		  cmd->src = NAND_SFLASHC_STATUS;
-		  cmd->dst = paddr(&data->sfstat[7]);
-		  cmd->len = 4;
-		  cmd++;
+		/* Block on data rdy, & read status register */
+		cmd->cmd = SRC_CRCI_NAND_DATA;
+		cmd->src = NAND_SFLASHC_STATUS;
+		cmd->dst = paddr(&data->sfstat[7]);
+		cmd->len = 4;
+		cmd++;
 
-		  /* Transfer nand ctlr buf contents to usr buf */
-		  cmd->cmd = 0;
-		  cmd->src = NAND_FLASH_BUFFER;
-		  cmd->dst = curr_addr;
-		  cmd->len = 64;
-		  curr_addr += 64;
-		  cmd++;
+		/* Transfer nand ctlr buf contents to usr buf */
+		cmd->cmd = 0;
+		cmd->src = NAND_FLASH_BUFFER;
+		cmd->dst = curr_addr;
+		cmd->len = 64;
+		curr_addr += 64;
+		cmd++;
 	}
 
 	/*************************************************************/
-	/* Restore the necessary registers to proper values		  */
+	/* Restore the necessary registers to proper values               */
 	/*************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -2665,70 +2643,58 @@
 	cmd->len = 4;
 	cmd++;
 
+	ptr[0] = (paddr(cmdlist) >> 3) | CMD_PTR_LP;
 
-  ptr[0] = (paddr(cmdlist) >> 3) | CMD_PTR_LP;
+	dmov_exec_cmdptr(DMOV_NAND_CHAN, ptr);
 
-  dmov_exec_cmdptr(DMOV_NAND_CHAN, ptr);
-
-
-  ecc_status = (data->data3 >> 16) &
-				 0x0000FFFF;
-  interrupt_status = (data->data4 >> 0) &
-				 0x0000FFFF;
-  controller_status = (data->data4 >> 16) &
-				 0x0000FFFF;
+	ecc_status = (data->data3 >> 16) & 0x0000FFFF;
+	interrupt_status = (data->data4 >> 0) & 0x0000FFFF;
+	controller_status = (data->data4 >> 16) & 0x0000FFFF;
 
 #if VERBOSE
-	  dprintf(INFO, "\n%s: sflash status %x %x %x %x %x %x %x"
-			"%x %x\n", __func__,
-				data->sfstat[0],
-				data->sfstat[1],
-				data->sfstat[2],
-				data->sfstat[3],
-				data->sfstat[4],
-				data->sfstat[5],
-				data->sfstat[6],
-				data->sfstat[7]);
+	dprintf(INFO, "\n%s: sflash status %x %x %x %x %x %x %x"
+		"%x %x\n", __func__,
+		data->sfstat[0],
+		data->sfstat[1],
+		data->sfstat[2],
+		data->sfstat[3],
+		data->sfstat[4],
+		data->sfstat[5], data->sfstat[6], data->sfstat[7]);
 
-	  dprintf(INFO, "%s: controller_status = %x\n", __func__,
-				controller_status);
-	  dprintf(INFO, "%s: interrupt_status = %x\n", __func__,
-				interrupt_status);
-	  dprintf(INFO, "%s: ecc_status = %x\n", __func__,
-				ecc_status);
+	dprintf(INFO, "%s: controller_status = %x\n", __func__,
+		controller_status);
+	dprintf(INFO, "%s: interrupt_status = %x\n", __func__,
+		interrupt_status);
+	dprintf(INFO, "%s: ecc_status = %x\n", __func__, ecc_status);
 #endif
-	  /* Check for errors, protection violations etc */
-	  if ((controller_status != 0)
-			|| (data->sfstat[0] & 0x110)
-			|| (data->sfstat[1] & 0x110)
-			|| (data->sfstat[2] & 0x110)
-			|| ((data->sfstat[3] & 0x110) &&
-						(addr))
-			|| ((data->sfstat[4] & 0x110) &&
-						(addr))
-			|| ((data->sfstat[5] & 0x110) &&
-						(addr))
-			|| ((data->sfstat[6] & 0x110) &&
-						(addr))) {
-		 dprintf(INFO, "%s: ECC/MPU/OP error\n", __func__);
-		 return -1;
-	  }
-
+	/* Check for errors, protection violations etc */
+	if ((controller_status != 0)
+	    || (data->sfstat[0] & 0x110)
+	    || (data->sfstat[1] & 0x110)
+	    || (data->sfstat[2] & 0x110)
+	    || ((data->sfstat[3] & 0x110) && (addr))
+	    || ((data->sfstat[4] & 0x110) && (addr))
+	    || ((data->sfstat[5] & 0x110) &&
+		(addr)) || ((data->sfstat[6] & 0x110) && (addr))) {
+		dprintf(INFO, "%s: ECC/MPU/OP error\n", __func__);
+		return -1;
+	}
 #if VERBOSE
 	dprintf(INFO, "read page %d: status: %x %x %x %x\n",
-			page, data[5], data[6], data[7], data[8]);
-	for(n = 0; n < 4; n++) {
-		ptr = (unsigned*)(addr + 512 * n);
-		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
-		ptr = (unsigned*)(spareaddr + 16 * n);
-		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0], ptr[1], ptr[2], ptr[3]);
+		page, data[5], data[6], data[7], data[8]);
+	for (n = 0; n < 4; n++) {
+		ptr = (unsigned *)(addr + 512 * n);
+		dprintf(INFO, "data%d:	%x %x %x %x\n", n, ptr[0], ptr[1],
+			ptr[2], ptr[3]);
+		ptr = (unsigned *)(spareaddr + 16 * n);
+		dprintf(INFO, "spare data%d	%x %x %x %x\n", n, ptr[0],
+			ptr[1], ptr[2], ptr[3]);
 	}
 #endif
 
 	return 0;
 }
 
-
 struct data_onenand_write {
 	unsigned sfbcfg;
 	unsigned sfcmd[9];
@@ -2751,16 +2717,17 @@
 	unsigned macro[5];
 };
 
-static int _flash_onenand_write_page(dmov_s *cmdlist, unsigned *ptrlist,
-									 unsigned page, const void *_addr,
-									 const void *_spareaddr, unsigned raw_mode)
+static int
+_flash_onenand_write_page(dmov_s * cmdlist, unsigned *ptrlist,
+			  unsigned page, const void *_addr,
+			  const void *_spareaddr, unsigned raw_mode)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
-	struct data_onenand_write *data = (void*) (ptrlist + 4);
-	unsigned addr = (unsigned) _addr;
-	unsigned addr_curr = (unsigned) _addr;
-	char * spareaddr = (char *) _spareaddr;
+	struct data_onenand_write *data = (void *)(ptrlist + 4);
+	unsigned addr = (unsigned)_addr;
+	unsigned addr_curr = (unsigned)_addr;
+	char *spareaddr = (char *)_spareaddr;
 	unsigned i, j, k;
 
 	unsigned erasesize = (flash_pagesize * num_pages_per_blk);
@@ -2768,11 +2735,11 @@
 
 	unsigned onenand_startaddr1 = (page * flash_pagesize) / erasesize;
 	unsigned onenand_startaddr8 = (((unsigned)(page * flash_pagesize) &
-										(erasesize-1)) / writesize) << 2;
+					(erasesize - 1)) / writesize) << 2;
 	unsigned onenand_startaddr2 = DEVICE_BUFFERRAM_0 << 15;
 	unsigned onenand_startbuffer = DATARAM0_0 << 8;
-	unsigned onenand_sysconfig1 = (raw_mode == 1) ? ONENAND_SYSCFG1_ECCDIS :\
-													ONENAND_SYSCFG1_ECCENA;
+	unsigned onenand_sysconfig1 = (raw_mode == 1) ? ONENAND_SYSCFG1_ECCDIS :
+	    ONENAND_SYSCFG1_ECCENA;
 
 	unsigned controller_status;
 	unsigned interrupt_status;
@@ -2780,49 +2747,40 @@
 
 	char flash_oob[64];
 
-	unsigned oobfree_offset[8] = {2, 14, 18, 30, 34, 46, 50, 62};
-	unsigned oobfree_length[8] = {3, 2, 3, 2, 3, 2, 3, 2};
+	unsigned oobfree_offset[8] = { 2, 14, 18, 30, 34, 46, 50, 62 };
+	unsigned oobfree_length[8] = { 3, 2, 3, 2, 3, 2, 3, 2 };
 
 	for (i = 0; i < 64; i++)
 		flash_oob[i] = 0xFF;
 
 	data->sfbcfg = SFLASH_BCFG;
-	data->sfcmd[0] =  SFLASH_PREPCMD(256, 0, 0,
+	data->sfcmd[0] = SFLASH_PREPCMD(256, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_DATWR);
-	data->sfcmd[1] =  SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATWR);
+	data->sfcmd[1] = SFLASH_PREPCMD(256, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_DATWR);
-	data->sfcmd[2] =  SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATWR);
+	data->sfcmd[2] = SFLASH_PREPCMD(256, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_DATWR);
-	data->sfcmd[3] =  SFLASH_PREPCMD(256, 0, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATWR);
+	data->sfcmd[3] = SFLASH_PREPCMD(256, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_DATWR);
-	data->sfcmd[4] =  SFLASH_PREPCMD(32, 0, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATWR);
+	data->sfcmd[4] = SFLASH_PREPCMD(32, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_DATWR);
-	data->sfcmd[5] =  SFLASH_PREPCMD(7, 0, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_DATWR);
+	data->sfcmd[5] = SFLASH_PREPCMD(7, 0, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_REGWR);
-	data->sfcmd[6] =  SFLASH_PREPCMD(0, 0, 32,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
+	data->sfcmd[6] = SFLASH_PREPCMD(0, 0, 32,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_INTHI);
-	data->sfcmd[7] =  SFLASH_PREPCMD(3, 7, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_INTHI);
+	data->sfcmd[7] = SFLASH_PREPCMD(3, 7, 0,
 					NAND_SFCMD_DATXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_REGRD);
-	data->sfcmd[8] =  SFLASH_PREPCMD(4, 10, 0,
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGRD);
+	data->sfcmd[8] = SFLASH_PREPCMD(4, 10, 0,
 					NAND_SFCMD_CMDXS,
-					NAND_SFCMD_ASYNC,
-					NAND_SFCMD_REGWR);
+					NAND_SFCMD_ASYNC, NAND_SFCMD_REGWR);
 	data->sfexec = 1;
 
 	data->sfstat[0] = CLEAN_DATA_32;
@@ -2834,45 +2792,34 @@
 	data->sfstat[6] = CLEAN_DATA_32;
 	data->sfstat[7] = CLEAN_DATA_32;
 	data->sfstat[8] = CLEAN_DATA_32;
-	data->addr0 = (ONENAND_INTERRUPT_STATUS << 16) |
-				(ONENAND_SYSTEM_CONFIG_1);
-	data->addr1 = (ONENAND_START_ADDRESS_8 << 16) |
-				(ONENAND_START_ADDRESS_1);
-	data->addr2 = (ONENAND_START_BUFFER << 16) |
-				(ONENAND_START_ADDRESS_2);
-	data->addr3 = (ONENAND_ECC_STATUS << 16) |
-				(ONENAND_COMMAND);
+	data->addr0 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr1 =
+	    (ONENAND_START_ADDRESS_8 << 16) | (ONENAND_START_ADDRESS_1);
+	data->addr2 = (ONENAND_START_BUFFER << 16) | (ONENAND_START_ADDRESS_2);
+	data->addr3 = (ONENAND_ECC_STATUS << 16) | (ONENAND_COMMAND);
 	data->addr4 = (ONENAND_CONTROLLER_STATUS << 16) |
-				(ONENAND_INTERRUPT_STATUS);
-	data->addr5 = (ONENAND_INTERRUPT_STATUS << 16) |
-				(ONENAND_SYSTEM_CONFIG_1);
-	data->addr6 = (ONENAND_START_ADDRESS_3 << 16) |
-				(ONENAND_START_ADDRESS_1);
-	data->data0 = (ONENAND_CLRINTR << 16) |
-				(onenand_sysconfig1);
-	data->data1 = (onenand_startaddr8 << 16) |
-				  (onenand_startaddr1);
-	data->data2 = (onenand_startbuffer << 16) |
-				  (onenand_startaddr2);
-	data->data3 = (CLEAN_DATA_16 << 16) |
-				  (ONENAND_CMDPROGSPARE);
-	data->data3 = (CLEAN_DATA_16 << 16) |
-				(ONENAND_CMDPROGSPARE);
-	data->data4 = (CLEAN_DATA_16 << 16) |
-				(CLEAN_DATA_16);
-	data->data5 = (ONENAND_CLRINTR << 16) |
-				(ONENAND_SYSCFG1_ECCENA);
-	data->data6 = (ONENAND_STARTADDR3_RES << 16) |
-				(ONENAND_STARTADDR1_RES);
+	    (ONENAND_INTERRUPT_STATUS);
+	data->addr5 =
+	    (ONENAND_INTERRUPT_STATUS << 16) | (ONENAND_SYSTEM_CONFIG_1);
+	data->addr6 =
+	    (ONENAND_START_ADDRESS_3 << 16) | (ONENAND_START_ADDRESS_1);
+	data->data0 = (ONENAND_CLRINTR << 16) | (onenand_sysconfig1);
+	data->data1 = (onenand_startaddr8 << 16) | (onenand_startaddr1);
+	data->data2 = (onenand_startbuffer << 16) | (onenand_startaddr2);
+	data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDPROGSPARE);
+	data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDPROGSPARE);
+	data->data4 = (CLEAN_DATA_16 << 16) | (CLEAN_DATA_16);
+	data->data5 = (ONENAND_CLRINTR << 16) | (ONENAND_SYSCFG1_ECCENA);
+	data->data6 = (ONENAND_STARTADDR3_RES << 16) | (ONENAND_STARTADDR1_RES);
 	data->macro[0] = 0x0200;
 	data->macro[1] = 0x0300;
 	data->macro[2] = 0x0400;
 	data->macro[3] = 0x0500;
 	data->macro[4] = 0x8010;
 
-
 	/*************************************************************/
-	/* Write the data ram area in the onenand buffer ram		 */
+	/* Write the data ram area in the onenand buffer ram             */
 	/*************************************************************/
 
 	/* Enable and configure the SFlash controller */
@@ -2883,47 +2830,46 @@
 	cmd++;
 
 	if (addr) {
-		data->data3 = (CLEAN_DATA_16 << 16) |
-					(ONENAND_CMDPROG);
+		data->data3 = (CLEAN_DATA_16 << 16) | (ONENAND_CMDPROG);
 
 		for (i = 0; i < 4; i++) {
 
-		  /* Block on cmd ready and write CMD register */
-		  cmd->cmd = DST_CRCI_NAND_CMD;
-		  cmd->src = paddr(&data->sfcmd[i]);
-		  cmd->dst = NAND_SFLASHC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+			/* Block on cmd ready and write CMD register */
+			cmd->cmd = DST_CRCI_NAND_CMD;
+			cmd->src = paddr(&data->sfcmd[i]);
+			cmd->dst = NAND_SFLASHC_CMD;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Trnsfr usr buf contents to nand ctlr buf */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(addr_curr);
-		  cmd->dst = NAND_FLASH_BUFFER;
-		  cmd->len = 512;
-		  if(!raw_mode)
-			addr_curr += 512;
-		  cmd++;
+			/* Trnsfr usr buf contents to nand ctlr buf */
+			cmd->cmd = 0;
+			cmd->src = paddr(addr_curr);
+			cmd->dst = NAND_FLASH_BUFFER;
+			cmd->len = 512;
+			if (!raw_mode)
+				addr_curr += 512;
+			cmd++;
 
-		  /* Write the MACRO1 register */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->macro[i]);
-		  cmd->dst = NAND_MACRO1_REG;
-		  cmd->len = 4;
-		  cmd++;
+			/* Write the MACRO1 register */
+			cmd->cmd = 0;
+			cmd->src = paddr(&data->macro[i]);
+			cmd->dst = NAND_MACRO1_REG;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Kick the execute command */
-		  cmd->cmd = 0;
-		  cmd->src = paddr(&data->sfexec);
-		  cmd->dst = NAND_SFLASHC_EXEC_CMD;
-		  cmd->len = 4;
-		  cmd++;
+			/* Kick the execute command */
+			cmd->cmd = 0;
+			cmd->src = paddr(&data->sfexec);
+			cmd->dst = NAND_SFLASHC_EXEC_CMD;
+			cmd->len = 4;
+			cmd++;
 
-		  /* Block on data rdy, & read status register */
-		  cmd->cmd = SRC_CRCI_NAND_DATA;
-		  cmd->src = NAND_SFLASHC_STATUS;
-		  cmd->dst = paddr(&data->sfstat[i]);
-		  cmd->len = 4;
-		  cmd++;
+			/* Block on data rdy, & read status register */
+			cmd->cmd = SRC_CRCI_NAND_DATA;
+			cmd->src = NAND_SFLASHC_STATUS;
+			cmd->dst = paddr(&data->sfstat[i]);
+			cmd->len = 4;
+			cmd++;
 
 		}
 	}
@@ -2935,24 +2881,23 @@
 	cmd->len = 4;
 	cmd++;
 
-	if (spareaddr)
-	{
-	  // Auto mode
-	  for (i = 0, k = 0; i < 8; i++) {
-		 for (j = 0; j < oobfree_length[i]; j++) {
-			 flash_oob[j+oobfree_offset[i]] = spareaddr[k];
-			 k++;
-		 }
-	  }
+	if (spareaddr) {
+		// Auto mode
+		for (i = 0, k = 0; i < 8; i++) {
+			for (j = 0; j < oobfree_length[i]; j++) {
+				flash_oob[j + oobfree_offset[i]] = spareaddr[k];
+				k++;
+			}
+		}
 
-	  cmd->cmd = 0;
-	  cmd->src = paddr(&flash_oob);
-	  cmd->dst = NAND_FLASH_BUFFER;
-	  cmd->len = 64;
-	  cmd++;
+		cmd->cmd = 0;
+		cmd->src = paddr(&flash_oob);
+		cmd->dst = NAND_FLASH_BUFFER;
+		cmd->len = 64;
+		cmd++;
 	}
 
-	if (raw_mode){
+	if (raw_mode) {
 		cmd->cmd = 0;
 		cmd->src = paddr(addr_curr);
 		cmd->dst = NAND_FLASH_BUFFER;
@@ -2982,7 +2927,7 @@
 	cmd++;
 
 	/*************************************************************/
-	/* Write necessary address registers in the onenand device	*/
+	/* Write necessary address registers in the onenand device      */
 	/*************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -3067,7 +3012,7 @@
 	cmd++;
 
 	/*************************************************************/
-	/* Read necessary status registers from the onenand device	*/
+	/* Read necessary status registers from the onenand device      */
 	/*************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -3105,9 +3050,8 @@
 	cmd->len = 4;
 	cmd++;
 
-
 	/*************************************************************/
-	/* Restore the necessary registers to proper values		  */
+	/* Restore the necessary registers to proper values               */
 	/*************************************************************/
 
 	/* Block on cmd ready and write CMD register */
@@ -3131,80 +3075,69 @@
 	cmd->len = 4;
 	cmd++;
 
-
 	ptr[0] = (paddr(cmdlist) >> 3) | CMD_PTR_LP;
 
 	dmov_exec_cmdptr(DMOV_NAND_CHAN, ptr);
 
 	ecc_status = (data->data3 >> 16) & 0x0000FFFF;
-	interrupt_status = (data->data4 >> 0)&0x0000FFFF;
-	controller_status = (data->data4 >> 16)&0x0000FFFF;
+	interrupt_status = (data->data4 >> 0) & 0x0000FFFF;
+	controller_status = (data->data4 >> 16) & 0x0000FFFF;
 
 #if VERBOSE
-	dprintf(INFO, "\n%s: sflash status %x %x %x %x %x %x %x %x %x\n", __func__,
-			 data->sfstat[0],
-			 data->sfstat[1],
-			 data->sfstat[2],
-			 data->sfstat[3],
-			 data->sfstat[4],
-			 data->sfstat[5],
-			 data->sfstat[6],
-			 data->sfstat[7],
-			 data->sfstat[8]);
+	dprintf(INFO, "\n%s: sflash status %x %x %x %x %x %x %x %x %x\n",
+		__func__, data->sfstat[0], data->sfstat[1], data->sfstat[2],
+		data->sfstat[3], data->sfstat[4], data->sfstat[5],
+		data->sfstat[6], data->sfstat[7], data->sfstat[8]);
 
 	dprintf(INFO, "%s: controller_status = %x\n", __func__,
-			 controller_status);
+		controller_status);
 	dprintf(INFO, "%s: interrupt_status = %x\n", __func__,
-			 interrupt_status);
-	dprintf(INFO, "%s: ecc_status = %x\n", __func__,
-				ecc_status);
+		interrupt_status);
+	dprintf(INFO, "%s: ecc_status = %x\n", __func__, ecc_status);
 #endif
 	/* Check for errors, protection violations etc */
 	if ((controller_status != 0)
-		  || (data->sfstat[5] & 0x110)
-		  || (data->sfstat[6] & 0x110)
-		  || (data->sfstat[7] & 0x110)
-		  || (data->sfstat[8] & 0x110)
-		  || ((data->sfstat[0] & 0x110) &&
-					  (addr))
-		  || ((data->sfstat[1] & 0x110) &&
-					  (addr))
-		  || ((data->sfstat[2] & 0x110) &&
-					  (addr))
-		  || ((data->sfstat[3] & 0x110) &&
-					  (addr))) {
+	    || (data->sfstat[5] & 0x110)
+	    || (data->sfstat[6] & 0x110)
+	    || (data->sfstat[7] & 0x110)
+	    || (data->sfstat[8] & 0x110)
+	    || ((data->sfstat[0] & 0x110) && (addr))
+	    || ((data->sfstat[1] & 0x110) && (addr))
+	    || ((data->sfstat[2] & 0x110) &&
+		(addr)) || ((data->sfstat[3] & 0x110) && (addr))) {
 		dprintf(CRITICAL, "%s: ECC/MPU/OP error\n", __func__);
 		return -1;
 	}
 
-
 	return 0;
 }
 
-static int flash_onenand_mark_badblock(dmov_s *cmdlist, unsigned *ptrlist, unsigned page)
+static int
+flash_onenand_mark_badblock(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
-  memset(empty_buf,0,528);
-  /* Going to first page of the block */
-  if(page & num_pages_per_blk_mask)
-	page = page - (page & num_pages_per_blk_mask);
-  return _flash_onenand_write_page(cmdlist, ptrlist, page, empty_buf, 0, 1);
+	memset(empty_buf, 0, 528);
+	/* Going to first page of the block */
+	if (page & num_pages_per_blk_mask)
+		page = page - (page & num_pages_per_blk_mask);
+	return _flash_onenand_write_page(cmdlist, ptrlist, page, empty_buf, 0,
+					 1);
 }
 
-static int flash_mark_badblock(dmov_s *cmdlist, unsigned *ptrlist, unsigned page)
+static int
+flash_mark_badblock(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
-	switch(flash_info.type) {
-		case FLASH_8BIT_NAND_DEVICE:
-		case FLASH_16BIT_NAND_DEVICE:
-			return flash_nand_mark_badblock(cmdlist, ptrlist, page);
-		case FLASH_ONENAND_DEVICE:
-			return flash_onenand_mark_badblock(cmdlist, ptrlist, page);
-		default:
-			return -1;
+	switch (flash_info.type) {
+	case FLASH_8BIT_NAND_DEVICE:
+	case FLASH_16BIT_NAND_DEVICE:
+		return flash_nand_mark_badblock(cmdlist, ptrlist, page);
+	case FLASH_ONENAND_DEVICE:
+		return flash_onenand_mark_badblock(cmdlist, ptrlist, page);
+	default:
+		return -1;
 	}
 }
 
-
-unsigned flash_ctrl_hwinfo(dmov_s *cmdlist, unsigned *ptrlist)
+unsigned flash_ctrl_hwinfo(dmov_s * cmdlist, unsigned *ptrlist)
 {
 	dmov_s *cmd = cmdlist;
 	unsigned *ptr = ptrlist;
@@ -3214,7 +3147,7 @@
 
 	data[0] = 0xeeeeeeee;
 
-	cmd[0].cmd = CMD_LC | CMD_OCB | CMD_OCU ;
+	cmd[0].cmd = CMD_LC | CMD_OCB | CMD_OCU;
 	cmd[0].src = NAND_HW_INFO;
 	cmd[0].dst = paddr(&data[0]);
 	cmd[0].len = 4;
@@ -3227,7 +3160,7 @@
 }
 
 /* Wrapper functions */
-static void flash_read_id(dmov_s *cmdlist, unsigned *ptrlist)
+static void flash_read_id(dmov_s * cmdlist, unsigned *ptrlist)
 {
 	int dev_found = 0;
 	unsigned index;
@@ -3235,36 +3168,34 @@
 	// Try to read id
 	flash_nand_read_id(cmdlist, ptrlist);
 	// Check if we support the device
-	for (index=1;
-		 index < (sizeof(supported_flash)/sizeof(struct flash_identification));
-		 index++)
-	{
+	for (index = 1;
+	     index <
+	     (sizeof(supported_flash) / sizeof(struct flash_identification));
+	     index++) {
 		if ((flash_info.id & supported_flash[index].mask) ==
-			(supported_flash[index].flash_id &
-			(supported_flash[index].mask))) {
+		    (supported_flash[index].
+		     flash_id & (supported_flash[index].mask))) {
 			dev_found = 1;
 			break;
 		}
 	}
 
-	if(!dev_found) {
+	if (!dev_found) {
 		flash_onenand_read_id(cmdlist, ptrlist);
-		for (index=1;
-		index < (sizeof(supported_flash)/sizeof(struct flash_identification));
-		index++)
-		{
+		for (index = 1;
+		     index <
+		     (sizeof(supported_flash) /
+		      sizeof(struct flash_identification)); index++) {
 			if ((flash_info.id & supported_flash[index].mask) ==
-					(supported_flash[index].flash_id &
-					(supported_flash[index].mask))) {
-					dev_found = 1;
-					break;
+			    (supported_flash[index].
+			     flash_id & (supported_flash[index].mask))) {
+				dev_found = 1;
+				break;
 			}
 		}
 	}
 
-
-
-	if(dev_found) {
+	if (dev_found) {
 		if (supported_flash[index].widebus)
 			flash_info.type = FLASH_16BIT_NAND_DEVICE;
 		else
@@ -3275,29 +3206,27 @@
 		flash_pagesize = flash_info.page_size;
 		flash_info.block_size = supported_flash[index].blksize;
 		flash_info.spare_size = supported_flash[index].oobsize;
-		if (flash_info.block_size && flash_info.page_size)
-		{
+		if (flash_info.block_size && flash_info.page_size) {
 			flash_info.num_blocks = supported_flash[index].density;
 			flash_info.num_blocks /= (flash_info.block_size);
-		}
-		else
-		{
+		} else {
 			flash_info.num_blocks = 0;
 		}
 		ASSERT(flash_info.num_blocks);
 		// Use this for getting the next/current blocks
 		num_pages_per_blk = flash_info.block_size / flash_pagesize;
 		num_pages_per_blk_mask = num_pages_per_blk - 1;
-                //Look for 8bit BCH ECC Nand, TODO: ECC Correctability >= 8
-		if((flash_ctrl_hwinfo(cmdlist,ptrlist) == 0x307) &&  flash_info.id == 0x2600482c) {
+		//Look for 8bit BCH ECC Nand, TODO: ECC Correctability >= 8
+		if ((flash_ctrl_hwinfo(cmdlist, ptrlist) == 0x307)
+		    && flash_info.id == 0x2600482c) {
 			enable_bch_ecc = 1;
 		}
 		return;
 	}
-
 	// Assume 8 bit nand device for backward compatability
 	if (dev_found == 0) {
-		dprintf(INFO, "Device not supported.  Assuming 8 bit NAND device\n");
+		dprintf(INFO,
+			"Device not supported.  Assuming 8 bit NAND device\n");
 		flash_info.type = FLASH_8BIT_NAND_DEVICE;
 	}
 	dprintf(INFO, "nandid: 0x%x maker=0x%02x device=0x%02x page_size=%d\n",
@@ -3308,64 +3237,75 @@
 		flash_info.num_blocks);
 }
 
-static int flash_erase_block(dmov_s *cmdlist, unsigned *ptrlist, unsigned page)
+static int flash_erase_block(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
-	switch(flash_info.type) {
-		case FLASH_8BIT_NAND_DEVICE:
-		case FLASH_16BIT_NAND_DEVICE:
-			return flash_nand_erase_block(cmdlist, ptrlist, page);
-		case FLASH_ONENAND_DEVICE:
-			return flash_onenand_erase_block(cmdlist, ptrlist, page);
-		default:
-			return -1;
+	switch (flash_info.type) {
+	case FLASH_8BIT_NAND_DEVICE:
+	case FLASH_16BIT_NAND_DEVICE:
+		return flash_nand_erase_block(cmdlist, ptrlist, page);
+	case FLASH_ONENAND_DEVICE:
+		return flash_onenand_erase_block(cmdlist, ptrlist, page);
+	default:
+		return -1;
 	}
 }
 
-static int _flash_read_page(dmov_s *cmdlist, unsigned *ptrlist,
-							unsigned page, void *_addr, void *_spareaddr)
+static int
+_flash_read_page(dmov_s * cmdlist, unsigned *ptrlist,
+		 unsigned page, void *_addr, void *_spareaddr)
 {
-	switch(flash_info.type) {
-		case FLASH_8BIT_NAND_DEVICE:
-		case FLASH_16BIT_NAND_DEVICE:
-		  if(interleaved_mode)
-			return flash_nand_read_page_interleave(cmdlist, ptrlist, page, _addr, _spareaddr);
-		  else
-			return _flash_nand_read_page(cmdlist, ptrlist, page, _addr, _spareaddr);
-		case FLASH_ONENAND_DEVICE:
-			return _flash_onenand_read_page(cmdlist, ptrlist, page, _addr, _spareaddr, 0);
-		default:
-			return -1;
+	switch (flash_info.type) {
+	case FLASH_8BIT_NAND_DEVICE:
+	case FLASH_16BIT_NAND_DEVICE:
+		if (interleaved_mode)
+			return flash_nand_read_page_interleave(cmdlist, ptrlist,
+							       page, _addr,
+							       _spareaddr);
+		else
+			return _flash_nand_read_page(cmdlist, ptrlist, page,
+						     _addr, _spareaddr);
+	case FLASH_ONENAND_DEVICE:
+		return _flash_onenand_read_page(cmdlist, ptrlist, page, _addr,
+						_spareaddr, 0);
+	default:
+		return -1;
 	}
 }
 
-static int _flash_block_isbad(dmov_s *cmdlist, unsigned *ptrlist, unsigned page)
+static int
+_flash_block_isbad(dmov_s * cmdlist, unsigned *ptrlist, unsigned page)
 {
-	switch(flash_info.type) {
-		case FLASH_8BIT_NAND_DEVICE:
-		case FLASH_16BIT_NAND_DEVICE:
-			return flash_nand_block_isbad(cmdlist, ptrlist, page);
-		case FLASH_ONENAND_DEVICE:
-			return flash_onenand_block_isbad(cmdlist, ptrlist, page);
-		default:
-			return -1;
+	switch (flash_info.type) {
+	case FLASH_8BIT_NAND_DEVICE:
+	case FLASH_16BIT_NAND_DEVICE:
+		return flash_nand_block_isbad(cmdlist, ptrlist, page);
+	case FLASH_ONENAND_DEVICE:
+		return flash_onenand_block_isbad(cmdlist, ptrlist, page);
+	default:
+		return -1;
 	}
 }
 
-static int _flash_write_page(dmov_s *cmdlist, unsigned *ptrlist,
-							 unsigned page, const void *_addr,
-							 const void *_spareaddr)
+static int
+_flash_write_page(dmov_s * cmdlist, unsigned *ptrlist,
+		  unsigned page, const void *_addr, const void *_spareaddr)
 {
-	switch(flash_info.type) {
-		case FLASH_8BIT_NAND_DEVICE:
-		case FLASH_16BIT_NAND_DEVICE:
-		  if(interleaved_mode)
-			return flash_nand_write_page_interleave(cmdlist, ptrlist, page, _addr, _spareaddr, 0);
-		  else
-			return _flash_nand_write_page(cmdlist, ptrlist, page, _addr, _spareaddr, 0);
-		case FLASH_ONENAND_DEVICE:
-			return _flash_onenand_write_page(cmdlist, ptrlist, page, _addr, _spareaddr, 0);
-		default:
-			return -1;
+	switch (flash_info.type) {
+	case FLASH_8BIT_NAND_DEVICE:
+	case FLASH_16BIT_NAND_DEVICE:
+		if (interleaved_mode)
+			return flash_nand_write_page_interleave(cmdlist,
+								ptrlist, page,
+								_addr,
+								_spareaddr, 0);
+		else
+			return _flash_nand_write_page(cmdlist, ptrlist, page,
+						      _addr, _spareaddr, 0);
+	case FLASH_ONENAND_DEVICE:
+		return _flash_onenand_write_page(cmdlist, ptrlist, page, _addr,
+						 _spareaddr, 0);
+	default:
+		return -1;
 	}
 }
 
@@ -3385,17 +3325,20 @@
 	flash_spare = memalign(32, 128);
 
 	flash_read_id(flash_cmdlist, flash_ptrlist);
-	if((FLASH_8BIT_NAND_DEVICE == flash_info.type)
-		||(FLASH_16BIT_NAND_DEVICE == flash_info.type)) {
-		if(flash_nand_read_config(flash_cmdlist, flash_ptrlist)) {
-			dprintf(CRITICAL, "ERROR: could not read CFG0/CFG1 state\n");
+	if ((FLASH_8BIT_NAND_DEVICE == flash_info.type)
+	    || (FLASH_16BIT_NAND_DEVICE == flash_info.type)) {
+		if (flash_nand_read_config(flash_cmdlist, flash_ptrlist)) {
+			dprintf(CRITICAL,
+				"ERROR: could not read CFG0/CFG1 state\n");
 			ASSERT(0);
 		}
 	}
 	/* Create a bad block table */
-	bbtbl = (unsigned int *) malloc(sizeof(unsigned int) * flash_info.num_blocks);
-	for(i = 0 ; i < flash_info.num_blocks ; i++)
-		bbtbl[i] = -1 ;
+	bbtbl =
+	    (unsigned int *)malloc(sizeof(unsigned int) *
+				   flash_info.num_blocks);
+	for (i = 0; i < flash_info.num_blocks; i++)
+		bbtbl[i] = -1;
 }
 
 struct ptable *flash_get_ptable(void)
@@ -3420,25 +3363,32 @@
 	unsigned count = ptn->length;
 
 	set_nand_configuration(ptn->type);
-	while(count-- > 0) {
-		if(flash_erase_block(flash_cmdlist, flash_ptrlist, block * num_pages_per_blk)) {
-			dprintf(INFO, "cannot erase @ %d (bad block?)\n", block);
+	while (count-- > 0) {
+		if (flash_erase_block
+		    (flash_cmdlist, flash_ptrlist, block * num_pages_per_blk)) {
+			dprintf(INFO, "cannot erase @ %d (bad block?)\n",
+				block);
 		}
 		block++;
 	}
 	return 0;
 }
 
-int flash_read_ext(struct ptentry *ptn, unsigned extra_per_page,
-			unsigned offset, void *data, unsigned bytes)
+int
+flash_read_ext(struct ptentry *ptn, unsigned extra_per_page,
+	       unsigned offset, void *data, unsigned bytes)
 {
-	unsigned page = (ptn->start * num_pages_per_blk) + (offset / flash_pagesize);
+	unsigned page =
+	    (ptn->start * num_pages_per_blk) + (offset / flash_pagesize);
 	unsigned lastpage = (ptn->start + ptn->length) * num_pages_per_blk;
-	unsigned count = (bytes + flash_pagesize - 1 + extra_per_page) / (flash_pagesize + extra_per_page);
-	unsigned *spare = (unsigned*) flash_spare;
+	unsigned count =
+	    (bytes + flash_pagesize - 1 + extra_per_page) / (flash_pagesize +
+							     extra_per_page);
+	unsigned *spare = (unsigned *)flash_spare;
 	unsigned errors = 0;
 	unsigned char *image = data;
-	unsigned current_block = (page - (page & num_pages_per_blk_mask)) / num_pages_per_blk;
+	unsigned current_block =
+	    (page - (page & num_pages_per_blk_mask)) / num_pages_per_blk;
 	unsigned start_block = ptn->start;
 	int result = 0;
 	int isbad = 0;
@@ -3446,15 +3396,17 @@
 
 	set_nand_configuration(TYPE_APPS_PARTITION);
 
-	if(offset & (flash_pagesize - 1))
+	if (offset & (flash_pagesize - 1))
 		return -1;
 
 // Adjust page offset based on number of bad blocks from start to current page
-	if (start_block < current_block)
-	{
+	if (start_block < current_block) {
 		start_block_count = (current_block - start_block);
-		while (start_block_count && (start_block < (ptn->start + ptn->length))) {
-			isbad = _flash_block_isbad(flash_cmdlist, flash_ptrlist, start_block*num_pages_per_blk);
+		while (start_block_count
+		       && (start_block < (ptn->start + ptn->length))) {
+			isbad =
+			    _flash_block_isbad(flash_cmdlist, flash_ptrlist,
+					       start_block * num_pages_per_blk);
 			if (isbad)
 				page += num_pages_per_blk;
 			else
@@ -3463,21 +3415,23 @@
 		}
 	}
 
-	while((page < lastpage) && !start_block_count) {
-		if(count == 0) {
-			dprintf(INFO, "flash_read_image: success (%d errors)\n", errors);
+	while ((page < lastpage) && !start_block_count) {
+		if (count == 0) {
+			dprintf(INFO, "flash_read_image: success (%d errors)\n",
+				errors);
 			return 0;
 		}
 
-		result = _flash_read_page(flash_cmdlist, flash_ptrlist, page, image, spare);
+		result =
+		    _flash_read_page(flash_cmdlist, flash_ptrlist, page, image,
+				     spare);
 
 		if (result == -1) {
 			// bad page, go to next page
 			page++;
 			errors++;
 			continue;
-		}
-		else if (result == -2) {
+		} else if (result == -2) {
 			// bad block, go to next block same offset
 			page += num_pages_per_blk;
 			errors++;
@@ -3496,61 +3450,79 @@
 	return 0xffffffff;
 }
 
-int flash_write(struct ptentry *ptn, unsigned extra_per_page, const void *data,
-		unsigned bytes)
+int
+flash_write(struct ptentry *ptn, unsigned extra_per_page, const void *data,
+	    unsigned bytes)
 {
 	unsigned page = ptn->start * num_pages_per_blk;
 	unsigned lastpage = (ptn->start + ptn->length) * num_pages_per_blk;
-	unsigned *spare = (unsigned*) flash_spare;
+	unsigned *spare = (unsigned *)flash_spare;
 	const unsigned char *image = data;
 	unsigned wsize = flash_pagesize + extra_per_page;
 	unsigned n;
 	int r;
 
-	if ((flash_info.type == FLASH_ONENAND_DEVICE) && (ptn->type == TYPE_MODEM_PARTITION))
-	{
+	if ((flash_info.type == FLASH_ONENAND_DEVICE)
+	    && (ptn->type == TYPE_MODEM_PARTITION)) {
 		dprintf(CRITICAL, "flash_write_image: feature not supported\n");
 		return -1;
 	}
 
 	set_nand_configuration(ptn->type);
-	for(n = 0; n < 16; n++) spare[n] = 0xffffffff;
+	for (n = 0; n < 16; n++)
+		spare[n] = 0xffffffff;
 
-	while(bytes > 0) {
-		if(bytes < wsize) {
-			dprintf(CRITICAL, "flash_write_image: image undersized (%d < %d)\n", bytes, wsize);
+	while (bytes > 0) {
+		if (bytes < wsize) {
+			dprintf(CRITICAL,
+				"flash_write_image: image undersized (%d < %d)\n",
+				bytes, wsize);
 			return -1;
 		}
-		if(page >= lastpage) {
+		if (page >= lastpage) {
 			dprintf(CRITICAL, "flash_write_image: out of space\n");
 			return -1;
 		}
 
-		if((page & num_pages_per_blk_mask) == 0) {
-			if(flash_erase_block(flash_cmdlist, flash_ptrlist, page)) {
-				dprintf(INFO, "flash_write_image: bad block @ %d\n", page / num_pages_per_blk);
+		if ((page & num_pages_per_blk_mask) == 0) {
+			if (flash_erase_block
+			    (flash_cmdlist, flash_ptrlist, page)) {
+				dprintf(INFO,
+					"flash_write_image: bad block @ %d\n",
+					page / num_pages_per_blk);
 				page += num_pages_per_blk;
 				continue;
 			}
 		}
 
-		if(extra_per_page) {
-			r = _flash_write_page(flash_cmdlist, flash_ptrlist, page, image, image + flash_pagesize);
+		if (extra_per_page) {
+			r = _flash_write_page(flash_cmdlist, flash_ptrlist,
+					      page, image,
+					      image + flash_pagesize);
 		} else {
-			r = _flash_write_page(flash_cmdlist, flash_ptrlist, page, image, spare);
+			r = _flash_write_page(flash_cmdlist, flash_ptrlist,
+					      page, image, spare);
 		}
-		if(r) {
-			dprintf(INFO, "flash_write_image: write failure @ page %d (src %d)\n", page, image - (const unsigned char *)data);
+		if (r) {
+			dprintf(INFO,
+				"flash_write_image: write failure @ page %d (src %d)\n",
+				page, image - (const unsigned char *)data);
 			image -= (page & num_pages_per_blk_mask) * wsize;
 			bytes += (page & num_pages_per_blk_mask) * wsize;
 			page &= ~num_pages_per_blk_mask;
-			if(flash_erase_block(flash_cmdlist, flash_ptrlist, page)) {
-				dprintf(INFO, "flash_write_image: erase failure @ page %d\n", page);
+			if (flash_erase_block
+			    (flash_cmdlist, flash_ptrlist, page)) {
+				dprintf(INFO,
+					"flash_write_image: erase failure @ page %d\n",
+					page);
 			}
 			if (ptn->type != TYPE_MODEM_PARTITION) {
-				flash_mark_badblock(flash_cmdlist, flash_ptrlist, page);
+				flash_mark_badblock(flash_cmdlist,
+						    flash_ptrlist, page);
 			}
-			dprintf(INFO, "flash_write_image: restart write @ page %d (src %d)\n", page, image - (const unsigned char *)data);
+			dprintf(INFO,
+				"flash_write_image: restart write @ page %d (src %d)\n",
+				page, image - (const unsigned char *)data);
 			page += num_pages_per_blk;
 			continue;
 		}
@@ -3561,9 +3533,10 @@
 
 	/* erase any remaining pages in the partition */
 	page = (page + num_pages_per_blk_mask) & (~num_pages_per_blk_mask);
-	while(page < lastpage){
-		if(flash_erase_block(flash_cmdlist, flash_ptrlist, page)) {
-			dprintf(INFO, "flash_write_image: bad block @ %d\n", page / num_pages_per_blk);
+	while (page < lastpage) {
+		if (flash_erase_block(flash_cmdlist, flash_ptrlist, page)) {
+			dprintf(INFO, "flash_write_image: bad block @ %d\n",
+				page / num_pages_per_blk);
 		}
 		page += num_pages_per_blk;
 	}
@@ -3575,8 +3548,8 @@
 #if 0
 static int flash_read_page(unsigned page, void *data, void *extra)
 {
-	return _flash_read_page(flash_cmdlist, flash_ptrlist,
-				page, data, extra);
+	return _flash_read_page(flash_cmdlist, flash_ptrlist, page, data,
+				extra);
 }
 #endif
 
@@ -3587,16 +3560,15 @@
 
 void enable_interleave_mode(int status)
 {
-  interleaved_mode = status;
-  if(status)
-  {
-        flash_pagesize *= 2;
-	platform_config_interleaved_mode_gpios();
-  }
-  return;
+	interleaved_mode = status;
+	if (status) {
+		flash_pagesize *= 2;
+		platform_config_interleaved_mode_gpios();
+	}
+	return;
 }
 
 int flash_ecc_bch_enabled()
 {
-       return enable_bch_ecc;
+	return enable_bch_ecc;
 }