platform: msm_shared: set proper value of DSI PHY GLBL for 28nm PHY

DSI PHY GLBL test control register should be set depending on the
DSI configuration. In case of single DSI or dual independent DSI
mode GLBL test control for respective DSI controller should be
programed to one.

Change-Id: I0b6965673ac72d716f3dd00e5bd54a9941c6b9e9
1 file changed