| commit | b4275f1a0276102c252270a74d4d40c7bd8644e7 | [log] [tgz] |
|---|---|---|
| author | Channagoud Kadabi <ckadabi@codeaurora.org> | Sat Aug 15 13:06:47 2015 -0700 |
| committer | Channagoud Kadabi <ckadabi@codeaurora.org> | Sat Aug 15 13:06:47 2015 -0700 |
| tree | bb80e5cc1ed814bb648502b2777f8d81661b4be5 | |
| parent | aeefe92f7d672219b66378b181b141b89580002b [diff] |
platform: msm_shared: Fix the mask value for cfg register The mask value for config register is 0x3 in the existing implementation should be 0x7 instead because of this bits 8 to 10 of the config register is getting update wrongly while lk updates the clock divider value resulting in issues with rcg clock rate updates. Change-Id: I0d161bf08915af7f6e0a0477ca2cc92c95948f16