diff --git a/platform/copper/include/platform/iomap.h b/platform/copper/include/platform/iomap.h
index a9bf3e7..28486a8 100644
--- a/platform/copper/include/platform/iomap.h
+++ b/platform/copper/include/platform/iomap.h
@@ -86,6 +86,9 @@
 #define SPMI_GENI_BASE              (SPMI_BASE + 0xA000)
 #define SPMI_PIC_BASE               (SPMI_BASE + 0xB000)
 
+#define MSM_CE2_BAM_BASE            0xFD444000
+#define MSM_CE2_BASE                0xFD45A000
+
 #define TLMM_BASE_ADDR              0xFD510000
 #define GPIO_CONFIG_ADDR(x)         (TLMM_BASE_ADDR + 0x1000 + (x)*0x10)
 #define GPIO_IN_OUT_ADDR(x)         (TLMM_BASE_ADDR + 0x1004 + (x)*0x10)
diff --git a/platform/msm_shared/rules.mk b/platform/msm_shared/rules.mk
index 719193c..18b76dc 100644
--- a/platform/msm_shared/rules.mk
+++ b/platform/msm_shared/rules.mk
@@ -72,7 +72,12 @@
 			$(LOCAL_DIR)/spmi.o \
 			$(LOCAL_DIR)/bam.o \
 			$(LOCAL_DIR)/qpic_nand.o \
-			$(LOCAL_DIR)/dev_tree.o
+			$(LOCAL_DIR)/dev_tree.o \
+			$(LOCAL_DIR)/certificate.o \
+			$(LOCAL_DIR)/image_verify.o \
+			$(LOCAL_DIR)/crypto_hash.o \
+			$(LOCAL_DIR)/crypto5_eng.o \
+			$(LOCAL_DIR)/crypto5_wrapper.o
 endif
 
 ifeq ($(PLATFORM),msm7x27a)
diff --git a/project/copper.mk b/project/copper.mk
index 35e2c15..00c7c5f 100644
--- a/project/copper.mk
+++ b/project/copper.mk
@@ -1,4 +1,4 @@
-# top level project rules for the msm8960_virtio project
+# top level project rules for the msm8974 project
 #
 LOCAL_DIR := $(GET_LOCAL_DIR)
 
@@ -13,3 +13,4 @@
 #DEFINES += WITH_DEBUG_FBCON=1
 DEFINES += DEVICE_TREE=1
 #DEFINES += MMC_BOOT_BAM=1
+DEFINES += CRYPTO_BAM=1
diff --git a/target/copper/init.c b/target/copper/init.c
index 6bbde18..95caa35 100644
--- a/target/copper/init.c
+++ b/target/copper/init.c
@@ -39,6 +39,9 @@
 #include <baseband.h>
 #include <dev/keys.h>
 #include <pm8x41.h>
+#include <crypto5_wrapper.h>
+
+extern  bool target_use_signed_kernel(void);
 
 static unsigned int target_id;
 
@@ -47,6 +50,13 @@
 
 #define WDOG_DEBUG_DISABLE_BIT  17
 
+#define CE_INSTANCE             2
+#define CE_EE                   1
+#define CE_FIFO_SIZE            64
+#define CE_READ_PIPE            3
+#define CE_WRITE_PIPE           2
+#define CE_ARRAY_SIZE           20
+
 static uint32_t mmc_sdc_base[] =
 	{ MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE };
 
@@ -101,18 +111,48 @@
 		keys_post_event(KEY_VOLUMEUP, 1);
 }
 
+/* Set up params for h/w CE. */
+void target_crypto_init_params()
+{
+	struct crypto_init_params ce_params;
+
+	/* Set up base addresses and instance. */
+	ce_params.crypto_instance  = CE_INSTANCE;
+	ce_params.crypto_base      = MSM_CE2_BASE;
+	ce_params.bam_base         = MSM_CE2_BAM_BASE;
+
+	/* Set up BAM config. */
+	ce_params.bam_ee           = CE_EE;
+	ce_params.pipes.read_pipe  = CE_READ_PIPE;
+	ce_params.pipes.write_pipe = CE_WRITE_PIPE;
+
+	/* Assign buffer sizes. */
+	ce_params.num_ce           = CE_ARRAY_SIZE;
+	ce_params.read_fifo_size   = CE_FIFO_SIZE;
+	ce_params.write_fifo_size  = CE_FIFO_SIZE;
+
+	crypto_init_params(&ce_params);
+}
+
+crypto_engine_type board_ce_type(void)
+{
+	return CRYPTO_ENGINE_TYPE_HW;
+}
+
 void target_init(void)
 {
 	uint32_t base_addr;
 	uint8_t slot;
 
-
 	dprintf(INFO, "target_init()\n");
 
 	spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
 
 	target_keystatus();
 
+	if (target_use_signed_kernel())
+		target_crypto_init_params();
+
 	/* Trying Slot 1*/
 	slot = 1;
 	base_addr = mmc_sdc_base[slot - 1];