tree ccbffc7797ae0570fe65c8787587e7f9b6a17bf2
parent b391cfee2e6a15ecfa84d47a25f04dfd4ff69a70
author Channagoud Kadabi <ckadabi@codeaurora.org> 1391121339 -0800
committer Channagoud Kadabi <ckadabi@codeaurora.org> 1397770963 -0700

arch: arm: Fix armv7 init code

Fix armv7 init code to add isb macro instead of isb function.
Fix L2 cache invalidate code as per arm manual section B2-17.
Use SCTLR (System Control Register) to enable & disable caches
instead of ACTLR (Auxiliary control Register). Replace hand
coded assembly with armv7 ISA.

Change-Id: I740757a2a812d0f70a4c170af4065b4ff14e88e3