[platform/msm7630]: Enable MDDI display in android bootloader.
--Initialize MDDI host and client
to enable display. Enable PMDH and PMDH_P clock using proc comm.
--Add code to configure voltage regulators using SSBI writes.
By default, Display in bootloader is disabled on this target.
This code doesn't have support for Local clock control. To further
optimize the code, PMDH and PMDH_P clock should be enabled in the
modem bootloader code instead of enabling them in application
bootloader.
Change-Id: Ie10f8b096addf9f62e65526f8ffad80e64c5db93
diff --git a/platform/msm_shared/lcdc.c b/platform/msm_shared/lcdc.c
index a7c5694..0ae8424 100644
--- a/platform/msm_shared/lcdc.c
+++ b/platform/msm_shared/lcdc.c
@@ -78,19 +78,6 @@
void lcdc_clock_init(unsigned rate);
-#if MDP4
-void mdp4_display_intf_sel(int intf)
-{
- unsigned bits, mask;
- bits = readl(MSM_MDP_BASE1 + 0x0038);
- mask = 0x03; /* 2 bits */
- intf &= 0x03; /* 2 bits */
- bits &= ~mask;
- bits |= intf;
- writel(bits, MSM_MDP_BASE1 + 0x0038); /* MDP_DISP_INTF_SEL */
-}
-#endif
-
struct fbcon_config *lcdc_init(void)
{
dprintf(INFO, "lcdc_init(): panel is %d x %d\n", fb_cfg.width, fb_cfg.height);
diff --git a/platform/msm_shared/mddi_hw.h b/platform/msm_shared/mddi_hw.h
index b47eadc..016ee54 100644
--- a/platform/msm_shared/mddi_hw.h
+++ b/platform/msm_shared/mddi_hw.h
@@ -35,6 +35,22 @@
#define MSM_MDDI_BASE 0xAA600000
#endif
+#if MDP4
+#define MSM_MDP_BASE1 0xA3F00000
+#define LCDC_BASE 0xC0000
+#else
+#define MSM_MDP_BASE1 0xAA200000
+#define LCDC_BASE 0xE0000
+#endif
+
+enum { /* display configuration for MDP4 */
+ PRIMARY_INTF_SEL,
+ SECONDARY_INTF_SEL,
+ EXTERNAL_INTF_SEL
+};
+
+#define outp32(port, val) (*((volatile unsigned *) (port)) = ((unsigned) (val)))
+
/* see 80-VA736-2 C pp 776-787 */
#define MDDI_REG(off) (MSM_MDDI_BASE + (off))
@@ -117,6 +133,9 @@
#define MDDI_MF_CNT MDDI_REG(0x0084)
#define MDDI_CURR_REV_PTR MDDI_REG(0x0088)
#define MDDI_CORE_VER MDDI_REG(0x008C)
+#define MDDI_PAD_IO_CTL MDDI_REG(0x00a0)
+#define MDDI_PAD_CAL MDDI_REG(0x00a4)
+
#define CMD_POWER_DOWN 0x0100
#define CMD_POWER_UP 0x0200
diff --git a/platform/msm_shared/proc_comm.c b/platform/msm_shared/proc_comm.c
index d82beaa..5056917 100644
--- a/platform/msm_shared/proc_comm.c
+++ b/platform/msm_shared/proc_comm.c
@@ -83,6 +83,7 @@
#define P_USB_HS_CORE_CLK 53 /* High speed USB 1 core clock */
/* msm7x30 adds... */
+#define PMDH_P_CLK 82
#define MDP_P_CLK 86
enum {
@@ -262,6 +263,9 @@
clock_enable(clock_id);
clock_set_rate(clock_id, rate);
+#ifdef PLATFORM_MSM7X30
+ clock_enable (PMDH_P_CLK);
+#endif
}
void reboot(unsigned reboot_reason)