dev: pmic: pm8x41: Add MPP configuration api.

Change-Id: I505a4fd87ecf91c2a6d4d9870c2e6df4f3930cf8
diff --git a/dev/pmic/pm8x41/include/pm8x41.h b/dev/pmic/pm8x41/include/pm8x41.h
index 41b86f7..3678bea 100644
--- a/dev/pmic/pm8x41/include/pm8x41.h
+++ b/dev/pmic/pm8x41/include/pm8x41.h
@@ -127,6 +127,57 @@
 	.base = _base, \
 }
 
+enum mpp_vin_select
+{
+	MPP_VIN0,
+	MPP_VIN1,
+	MPP_VIN2,
+	MPP_VIN3,
+};
+
+enum mpp_mode_en_source_select
+{
+	MPP_LOW,
+	MPP_HIGH,
+	MPP_PAIRED_MPP,
+	MPP_NOT_PAIRED_MPP,
+	MPP_DTEST1 = 8,
+	MPP_NOT_DTEST1,
+	MPP_DTEST2,
+	MPP_NOT_DTEST2,
+	MPP_DTEST3,
+	MPP_NOT_DTEST3,
+	MPP_DTEST4,
+	MPP_NOT_DTEST4,
+};
+
+enum mpp_en_ctl
+{
+	MPP_DISABLE,
+	MPP_ENABLE,
+};
+
+enum mpp_mode
+{
+	MPP_DIGITAL_INPUT,
+	MPP_DIGITAL_OUTPUT,
+	MPP_DIGITAL_IN_AND_OUT,
+	MPP_BIDIRECTIONAL,
+	MPP_ANALOG_INPUT,
+	MPP_ANALOG_OUTPUT,
+	MPP_CURRENT_SINK,
+	MPP_RESERVED,
+};
+
+struct pm8x41_mpp
+{
+	uint32_t                       base;
+	enum mpp_vin_select            vin;
+	enum mpp_mode_en_source_select mode;
+};
+
+#define PM8x41_MMP3_BASE                      0xA200
+
 int pm8x41_gpio_get(uint8_t gpio, uint8_t *status);
 int pm8x41_gpio_set(uint8_t gpio, uint8_t value);
 int pm8x41_gpio_config(uint8_t gpio, struct pm8x41_gpio *config);
@@ -139,5 +190,7 @@
 int pm8x41_ldo_control(struct pm8x41_ldo *ldo, uint8_t enable);
 uint8_t pm8x41_get_pmic_rev();
 uint8_t pm8x41_get_pon_reason();
+void pm8x41_config_output_mpp(struct pm8x41_mpp *mpp);
+void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable);
 
 #endif
diff --git a/dev/pmic/pm8x41/include/pm8x41_hw.h b/dev/pmic/pm8x41/include/pm8x41_hw.h
index 9cbaa86..8a275ad 100644
--- a/dev/pmic/pm8x41/include/pm8x41_hw.h
+++ b/dev/pmic/pm8x41/include/pm8x41_hw.h
@@ -79,6 +79,14 @@
 #define S2_RESET_TYPE_WARM                    0x1
 #define PON_RESIN_N_RESET_S2_TIMER_MAX_VALUE  0x7
 
+/* MPP registers */
+#define MPP_DIG_VIN_CTL                       0x41
+#define MPP_MODE_CTL                          0x40
+#define MPP_EN_CTL                            0x46
+
+#define MPP_MODE_CTL_MODE_SHIFT               4
+#define MPP_EN_CTL_ENABLE_SHIFT               7
+
 void pm8x41_reg_write(uint32_t addr, uint8_t val);
 uint8_t pm8x41_reg_read(uint32_t addr);
 
diff --git a/dev/pmic/pm8x41/pm8x41.c b/dev/pmic/pm8x41/pm8x41.c
index ce290ad..93b5e57 100644
--- a/dev/pmic/pm8x41/pm8x41.c
+++ b/dev/pmic/pm8x41/pm8x41.c
@@ -356,3 +356,19 @@
 {
 	return REG_READ(PON_PON_REASON1);
 }
+
+void pm8x41_enable_mpp(struct pm8x41_mpp *mpp, enum mpp_en_ctl enable)
+{
+	ASSERT(mpp);
+
+	REG_WRITE(mpp->base + MPP_EN_CTL, enable << MPP_EN_CTL_ENABLE_SHIFT);
+}
+
+void pm8x41_config_output_mpp(struct pm8x41_mpp *mpp)
+{
+	ASSERT(mpp);
+
+	REG_WRITE(mpp->base + MPP_DIG_VIN_CTL, mpp->vin);
+
+	REG_WRITE(mpp->base + MPP_MODE_CTL, mpp->mode | (MPP_DIGITAL_OUTPUT << MPP_MODE_CTL_MODE_SHIFT));
+}