platform: msm_shared: Fix drivers to enable WB cache
When second stage pt is enabled, the arch invalidate routine behaves
as arch clean invalidate and with second stage pt disabled arch invalidate
behaves as arch invalidate. With write back caches enabled some of the
drivers are doing invalidate of non-DMA buffers causing data loss and
resulting into crash. Remove the invalidation of non-DMA buffers to
avoid data loss. Perform clean invalidate when the heap driver allocates
memory which is aligned to cache line. Flush the qseecom logbuf before
passing it to tz.
Change-Id: Ib2fa5a5e0fa28e73e532ac241d7f251367df3be4
diff --git a/platform/msm_shared/ucs.c b/platform/msm_shared/ucs.c
index a1ab6f3..aaf17a8 100644
--- a/platform/msm_shared/ucs.c
+++ b/platform/msm_shared/ucs.c
@@ -429,7 +429,7 @@
/* Flush cdb to memory. */
dsb();
- arch_invalidate_cache_range((addr_t) cdb_param, SCSI_CDB_PARAM_LEN);
+ arch_clean_invalidate_cache_range((addr_t) cdb_param, SCSI_CDB_PARAM_LEN);
memset(&req_upiu, 0 , sizeof(struct scsi_req_build_type));
@@ -479,7 +479,7 @@
/* Flush cdb to memory. */
dsb();
- arch_invalidate_cache_range((addr_t) cdb_param, SCSI_CDB_PARAM_LEN);
+ arch_clean_invalidate_cache_range((addr_t) cdb_param, SCSI_CDB_PARAM_LEN);
memset(&req_upiu, 0 , sizeof(struct scsi_req_build_type));