platform: msm8909: Update UART to UART0
Add registers and update the clock names
to support UART0.
Change-Id: I9ae2a7ddb0d31c8255ff30592125cf66d9aeb195
diff --git a/platform/msm8909/include/platform/iomap.h b/platform/msm8909/include/platform/iomap.h
index 024e53f..a44396d 100644
--- a/platform/msm8909/include/platform/iomap.h
+++ b/platform/msm8909/include/platform/iomap.h
@@ -143,6 +143,12 @@
#define BLSP1_UART2_APPS_N (CLK_CTL_BASE + 0x3040)
#define BLSP1_UART2_APPS_D (CLK_CTL_BASE + 0x3044)
+#define BLSP1_UART1_APPS_CBCR (CLK_CTL_BASE + 0x203C)
+#define BLSP1_UART1_APPS_CMD_RCGR (CLK_CTL_BASE + 0x2044)
+#define BLSP1_UART1_APPS_CFG_RCGR (CLK_CTL_BASE + 0x2048)
+#define BLSP1_UART1_APPS_M (CLK_CTL_BASE + 0x204C)
+#define BLSP1_UART1_APPS_N (CLK_CTL_BASE + 0x2050)
+#define BLSP1_UART1_APPS_D (CLK_CTL_BASE + 0x2054)
/* USB */
#define USB_HS_BCR (CLK_CTL_BASE + 0x41000)
diff --git a/platform/msm8909/msm8909-clock.c b/platform/msm8909/msm8909-clock.c
index a2af96d..52e1c7e 100644
--- a/platform/msm8909/msm8909-clock.c
+++ b/platform/msm8909/msm8909-clock.c
@@ -254,31 +254,31 @@
F_END
};
-static struct rcg_clk blsp1_uart2_apps_clk_src =
+static struct rcg_clk blsp1_uart1_apps_clk_src =
{
- .cmd_reg = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
- .cfg_reg = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
- .m_reg = (uint32_t *) BLSP1_UART2_APPS_M,
- .n_reg = (uint32_t *) BLSP1_UART2_APPS_N,
- .d_reg = (uint32_t *) BLSP1_UART2_APPS_D,
+ .cmd_reg = (uint32_t *) BLSP1_UART1_APPS_CMD_RCGR,
+ .cfg_reg = (uint32_t *) BLSP1_UART1_APPS_CFG_RCGR,
+ .m_reg = (uint32_t *) BLSP1_UART1_APPS_M,
+ .n_reg = (uint32_t *) BLSP1_UART1_APPS_N,
+ .d_reg = (uint32_t *) BLSP1_UART1_APPS_D,
.set_rate = clock_lib2_rcg_set_rate_mnd,
.freq_tbl = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
.current_freq = &rcg_dummy_freq,
.c = {
- .dbg_name = "blsp1_uart2_apps_clk",
+ .dbg_name = "blsp1_uart1_apps_clk",
.ops = &clk_ops_rcg_mnd,
},
};
-static struct branch_clk gcc_blsp1_uart2_apps_clk =
+static struct branch_clk gcc_blsp1_uart1_apps_clk =
{
- .cbcr_reg = (uint32_t *) BLSP1_UART2_APPS_CBCR,
- .parent = &blsp1_uart2_apps_clk_src.c,
+ .cbcr_reg = (uint32_t *) BLSP1_UART1_APPS_CBCR,
+ .parent = &blsp1_uart1_apps_clk_src.c,
.c = {
- .dbg_name = "gcc_blsp1_uart2_apps_clk",
+ .dbg_name = "gcc_blsp1_uart1_apps_clk",
.ops = &clk_ops_branch,
},
};
@@ -422,8 +422,8 @@
CLK_LOOKUP("sdc2_iface_clk", gcc_sdcc2_ahb_clk.c),
CLK_LOOKUP("sdc2_core_clk", gcc_sdcc2_apps_clk.c),
- CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
- CLK_LOOKUP("uart2_core_clk", gcc_blsp1_uart2_apps_clk.c),
+ CLK_LOOKUP("uart1_iface_clk", gcc_blsp1_ahb_clk.c),
+ CLK_LOOKUP("uart1_core_clk", gcc_blsp1_uart1_apps_clk.c),
CLK_LOOKUP("usb_iface_clk", gcc_usb_hs_ahb_clk.c),
CLK_LOOKUP("usb_core_clk", gcc_usb_hs_system_clk.c),