commit d8b7c6ffd993298473ce0adbe2beebb77d12257a
author Sundarajan Srinivasan <sundaraj@codeaurora.org> Fri Sep 13 16:50:22 2013 -0700
committer Sundarajan Srinivasan <sundaraj@codeaurora.org> Sat Sep 14 20:59:56 2013 -0700
tree 7aa6e2d0cc666b454ac12f19aa03aaf6e12e8c8c
parent 4d5468c78d7d0dd35ff4b6f0160630b92b7c3c0f

apq8084: Configure registers, clocks and enable UART

Configure the registers, clocks and enable UART.

Change-Id: I5be2a15298ca52a23dad8e0a9fb4cd681d782943

platform/apq8084/apq8084-clock.c

diff --git a/platform/apq8084/apq8084-clock.c b/platform/apq8084/apq8084-clock.c
index 432fbdb..c939bad 100644
--- a/platform/apq8084/apq8084-clock.c
+++ b/platform/apq8084/apq8084-clock.c
@@ -133,13 +133,13 @@
 	F_END
 };
 
-static struct rcg_clk blsp1_uart2_apps_clk_src =
+static struct rcg_clk blsp2_uart2_apps_clk_src =
 {
-	.cmd_reg      = (uint32_t *) BLSP1_UART2_APPS_CMD_RCGR,
-	.cfg_reg      = (uint32_t *) BLSP1_UART2_APPS_CFG_RCGR,
-	.m_reg        = (uint32_t *) BLSP1_UART2_APPS_M,
-	.n_reg        = (uint32_t *) BLSP1_UART2_APPS_N,
-	.d_reg        = (uint32_t *) BLSP1_UART2_APPS_D,
+	.cmd_reg      = (uint32_t *) BLSP2_UART2_APPS_CMD_RCGR,
+	.cfg_reg      = (uint32_t *) BLSP2_UART2_APPS_CFG_RCGR,
+	.m_reg        = (uint32_t *) BLSP2_UART2_APPS_M,
+	.n_reg        = (uint32_t *) BLSP2_UART2_APPS_N,
+	.d_reg        = (uint32_t *) BLSP2_UART2_APPS_D,
 
 	.set_rate     = clock_lib2_rcg_set_rate_mnd,
 	.freq_tbl     = ftbl_gcc_blsp1_2_uart1_6_apps_clk,
@@ -151,13 +151,13 @@
 	},
 };
 
-static struct branch_clk gcc_blsp1_uart2_apps_clk =
+static struct branch_clk gcc_blsp2_uart2_apps_clk =
 {
-	.cbcr_reg     = (uint32_t *) BLSP1_UART2_APPS_CBCR,
-	.parent       = &blsp1_uart2_apps_clk_src.c,
+	.cbcr_reg     = (uint32_t *) BLSP2_UART2_APPS_CBCR,
+	.parent       = &blsp2_uart2_apps_clk_src.c,
 
 	.c = {
-		.dbg_name = "gcc_blsp1_uart2_apps_clk",
+		.dbg_name = "gcc_blsp2_uart2_apps_clk",
 		.ops      = &clk_ops_branch,
 	},
 };
@@ -287,8 +287,8 @@
 	CLK_LOOKUP("sdc1_iface_clk", gcc_sdcc1_ahb_clk.c),
 	CLK_LOOKUP("sdc1_core_clk",  gcc_sdcc1_apps_clk.c),
 
-	CLK_LOOKUP("uart2_iface_clk", gcc_blsp1_ahb_clk.c),
-	CLK_LOOKUP("uart2_core_clk",  gcc_blsp1_uart2_apps_clk.c),
+	CLK_LOOKUP("uart7_iface_clk", gcc_blsp2_ahb_clk.c),
+	CLK_LOOKUP("uart7_core_clk",  gcc_blsp2_uart2_apps_clk.c),
 
 	CLK_LOOKUP("usb_iface_clk",  gcc_usb_hs_ahb_clk.c),
 	CLK_LOOKUP("usb_core_clk",   gcc_usb_hs_system_clk.c),