diff --git a/app/aboot/aboot.c b/app/aboot/aboot.c
index 5fdf7ab..f17ddfd 100644
--- a/app/aboot/aboot.c
+++ b/app/aboot/aboot.c
@@ -231,11 +231,21 @@
 		hdr = uhdr;
 		goto unified_boot;
 	}
-
-	ptn = mmc_ptn_offset("boot");
-	if(ptn == 0) {
-		dprintf(CRITICAL, "ERROR: No boot partition found\n");
-                return -1;
+	if(!boot_into_recovery)
+	{
+		ptn = mmc_ptn_offset("boot");
+		if(ptn == 0) {
+			dprintf(CRITICAL, "ERROR: No boot partition found\n");
+                    return -1;
+		}
+	}
+	else
+	{
+		ptn = mmc_ptn_offset("recovery");
+		if(ptn == 0) {
+			dprintf(CRITICAL, "ERROR: No recovery partition found\n");
+                    return -1;
+		}
 	}
 
 	if (mmc_read(ptn + offset, (unsigned int *)buf, page_size)) {
diff --git a/platform/msm7x30/acpuclock.c b/platform/msm7x30/acpuclock.c
index 182679a..74817dd 100644
--- a/platform/msm7x30/acpuclock.c
+++ b/platform/msm7x30/acpuclock.c
@@ -34,46 +34,14 @@
 #define REG_BASE(off)           (MSM_CLK_CTL_BASE + (off))
 #define REG(off)                (MSM_CLK_CTL_SH2_BASE + (off))
 
-#define PLL_ENA_REG             REG(0x0264)
-#define PLL2_STATUS_BASE_REG    REG_BASE(0x0350)
-
 #define SH2_OWN_ROW2_BASE_REG	REG_BASE(0x0424)
 
-#define ACPU_SRC_SEL_PLL2       3
-#define ACPU_SRC_DIV_PLL2       0
-
-void enable_pll(unsigned num)
-{
-    unsigned reg_val;
-    reg_val = readl(PLL_ENA_REG);
-    reg_val |= (1 << num);
-    writel(reg_val, PLL_ENA_REG);
-    /* Wait until PLL is enabled */
-    while ((readl(PLL2_STATUS_BASE_REG) & (1 << 16)) == 0);
-}
-
 void acpu_clock_init(void)
 {
-    unsigned reg_clksel, reg_clkctl, src_sel;
-    enable_pll(2);
-
-    reg_clksel = readl(SCSS_CLK_SEL);
-
-    /* CLK_SEL_SRC1NO */
-    src_sel = reg_clksel & 1;
-
-    /* Program clock source and divider. */
-    reg_clkctl = readl(SCSS_CLK_CTL);
-    reg_clkctl &= ~(0xFF << (8 * src_sel));
-    reg_clkctl |= ACPU_SRC_SEL_PLL2 << (4 + 8 * src_sel);
-    reg_clkctl |= ACPU_SRC_DIV_PLL2 << (0 + 8 * src_sel);
-    writel(reg_clkctl, SCSS_CLK_CTL);
-
-    /* Toggle clock source. */
-    reg_clksel ^= 1;
-
-    /* Program clock source selection. */
-    writel(reg_clksel, SCSS_CLK_SEL);
+    /* Bump clock speed to 768 MHz */
+    writel(0x0, SCSS_CLK_SEL);
+    writel(0x1020, SCSS_CLK_CTL);
+    writel(0x1, SCSS_CLK_SEL);
 }
 
 void hsusb_clock_init(void)
diff --git a/platform/msm_shared/include/mmc.h b/platform/msm_shared/include/mmc.h
index 6c9f1a2..660db66 100755
--- a/platform/msm_shared/include/mmc.h
+++ b/platform/msm_shared/include/mmc.h
@@ -536,6 +536,7 @@
 #define MMC_BOOT_TYPE 			0x48
 #define MMC_SYSTEM_TYPE 		0x82
 #define MMC_USERDATA_TYPE 		0x83
+#define MMC_RECOVERY_TYPE 		0x60
 
 #define MMC_RCA 2
 
diff --git a/platform/msm_shared/mmc.c b/platform/msm_shared/mmc.c
index 9628562..96ff275 100644
--- a/platform/msm_shared/mmc.c
+++ b/platform/msm_shared/mmc.c
@@ -2400,6 +2400,9 @@
             strcpy((char *)mbr_ent->name,(const char *)ext3_partitions[ext3_count]);
             ext3_count++;
             break;
+        case MMC_RECOVERY_TYPE:
+            memcpy(mbr_ent->name,"recovery",8);
+            break;
     };
 }