tree f02f864970840fc5da1b9056490fe284e0731b5b
parent 6abcfd8735e53387bd5de4fa1c00eafa4e6b1ad8
author Figo Wang <figow@codeaurora.org> 1396252237 +0800
committer Figo Wang <figow@codeaurora.org> 1397031084 +0800

platform: uart: disable IRQ while UART sending data

To send some bytes by UART, we program the DM_NO_CHARS_FOR_TX
register to tell UART FSM how many data we have. Then we write
the data to the DM_TF register one by one. Once the number we
write to the DM_TF is equal to DM_NO_CHARS_FOR_TX, TX_RDY signal
will be set. And we send the data successfully.

Consider this scenario, the flow is aborted, by the X IRQ,
in the following position:
...
check TX_RDY signal
...
write DM_NO_CHARS_FOR_TX
...                        ---------->aborted by X IRQ
write DM_TF
...
And the X IRQ handler also wants to send out some data by UART.
Then the IRQ handler will hang at the TX_RDY checking. Because
the TX_RDY never arrives if the previous flow doesn't finish.

CRs-Fixed: 637800
Change-Id: I6d518a503eb23e02e634f64b06a7f9e22e9d4456