diff --git a/dev/gcdb/display/include/panel_hx8389b_qhd_video.h b/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
index 1b756be..577918d 100644
--- a/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
+++ b/dev/gcdb/display/include/panel_hx8389b_qhd_video.h
@@ -34,7 +34,6 @@
  *---------------------------------------------------------------------------*/
 
 #ifndef _PANEL_HX8389B_QHD_VIDEO_H_
-
 #define _PANEL_HX8389B_QHD_VIDEO_H_
 /*---------------------------------------------------------------------------*/
 /* HEADER files                                                              */
@@ -44,240 +43,244 @@
 /*---------------------------------------------------------------------------*/
 /* Panel configuration                                                       */
 /*---------------------------------------------------------------------------*/
-
 static struct panel_config hx8389b_qhd_video_panel_data = {
-  "qcom,mdss_dsi_hx8389b_qhd_video", "dsi:0:", "qcom,mdss-dsi-panel",
-  10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	"qcom,mdss_dsi_hx8389b_qhd_video", "dsi:0:", "qcom,mdss-dsi-panel",
+	10, 0, "DISPLAY_1", 0, 0, 60, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 };
 
 /*---------------------------------------------------------------------------*/
 /* Panel resolution                                                          */
 /*---------------------------------------------------------------------------*/
 static struct panel_resolution hx8389b_qhd_video_panel_res = {
-  540, 960, 48, 96, 96, 0, 9, 13, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	540, 960, 60, 39, 39, 0, 9, 13, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0
 };
 
 /*---------------------------------------------------------------------------*/
-/* Panel Color Information                                                   */
+/* Panel color information                                                   */
 /*---------------------------------------------------------------------------*/
 static struct color_info hx8389b_qhd_video_color = {
-  24, 0, 0xff, 0, 0, 0
+	24, 0, 0xff, 0, 0, 0
 };
 
 /*---------------------------------------------------------------------------*/
-/* Panel Command information                                                 */
+/* Panel on/off command information                                          */
 /*---------------------------------------------------------------------------*/
 static char hx8389b_qhd_video_on_cmd0[] = {
-0x04, 0x00, 0x39, 0xC0,
-0xB9, 0xFF, 0x83, 0x89,
- };
-
+	0x04, 0x00, 0x39, 0xC0,
+	0xB9, 0xFF, 0x83, 0x89,
+};
 
 static char hx8389b_qhd_video_on_cmd1[] = {
-0x08, 0x00, 0x39, 0xC0,
-0xBA, 0x41, 0x93, 0x00,
-0x16, 0xA4, 0x10, 0x18,
- };
-
+	0xCC, 0x02, 0x15, 0x80
+};
 
 static char hx8389b_qhd_video_on_cmd2[] = {
-0xC6, 0x08, 0x23, 0x80 };
-
+	0x03, 0x00, 0x39, 0xC0,
+	0xC0, 0x43, 0x17, 0xFF,
+};
 
 static char hx8389b_qhd_video_on_cmd3[] = {
-0x03, 0x00, 0x39, 0xC0,
-0xBC, 0x02, 0x00, 0xFF,  };
-
+	0x08, 0x00, 0x39, 0xC0,
+	0xBA, 0x41, 0x93, 0x00,
+	0x16, 0xA4, 0x10, 0x18,
+};
 
 static char hx8389b_qhd_video_on_cmd4[] = {
-0xCC, 0x02, 0x23, 0x80 };
-
+	0x14, 0x00, 0x39, 0xC0,
+	0xB1, 0x00, 0x00, 0x06,
+	0xEB, 0x59, 0x10, 0x11,
+	0xEE, 0xEE, 0x3A, 0x42,
+	0x3F, 0x3F, 0x43, 0x01,
+	0x5A, 0xF6, 0x00, 0xE6,
+};
 
 static char hx8389b_qhd_video_on_cmd5[] = {
-0x14, 0x00, 0x39, 0xC0,
-0xB1, 0x00, 0x00, 0x07,
-0xE8, 0x50, 0x10, 0x11,
-0x98, 0xf8, 0x21, 0x29,
-0x27, 0x27, 0x43, 0x01,
-0x58, 0xF0, 0x00, 0xE6,
- };
-
+	0x08, 0x00, 0x39, 0xC0,
+	0xB2, 0x00, 0x00, 0x78,
+	0x0C, 0x07, 0x3F, 0x80,
+};
 
 static char hx8389b_qhd_video_on_cmd6[] = {
-0x08, 0x00, 0x39, 0xC0,
-0xB2, 0x00, 0x00, 0x78,
-0x0C, 0x07, 0x3F, 0x80,
- };
-
+	0x04, 0x00, 0x39, 0xC0,
+	0xb7, 0x00, 0x00, 0x50,
+};
 
 static char hx8389b_qhd_video_on_cmd7[] = {
-0x18, 0x00, 0x39, 0xC0,
-0xb4, 0x82, 0x08, 0x00,
-0x32, 0x10, 0x04, 0x32,
-0x10, 0x00, 0x32, 0x10,
-0x00, 0x37, 0x0a, 0x40,
-0x08, 0x37, 0x0a, 0x40,
-0x14, 0x46, 0x50, 0x0a,
- };
-
+	0x18, 0x00, 0x39, 0xC0,
+	0xB4, 0x80, 0x08, 0x00,
+	0x32, 0x10, 0x04, 0x32,
+	0x10, 0x00, 0x32, 0x10,
+	0x00, 0x37, 0x0a, 0x40,
+	0x08, 0x37, 0x00, 0x46,
+	0x02, 0x58, 0x58, 0x02,
+};
 
 static char hx8389b_qhd_video_on_cmd8[] = {
-0x39, 0x00, 0x39, 0xC0,
-0xd5, 0x00, 0x00, 0x00,
-0x00, 0x01, 0x00, 0x00,
-0x00, 0x60, 0x00, 0x99,
-0x88, 0xAA, 0xBB, 0x88,
-0x23, 0x88, 0x01, 0x88,
-0x67, 0x88, 0x45, 0x01,
-0x23, 0x88, 0x88, 0x88,
-0x88, 0x88, 0x88, 0x99,
-0xBB, 0xAA, 0x88, 0x54,
-0x88, 0x76, 0x88, 0x10,
-0x88, 0x32, 0x32, 0x10,
-0x88, 0x88, 0x88, 0x88,
-0x88, 0x00, 0x04, 0x00,
-0x00, 0x00, 0x00, 0x00,
-0x00, 0xFF, 0xFF, 0xFF,
- };
-
+	0x39, 0x00, 0x39, 0xC0,
+	0xD5, 0x00, 0x00, 0x00,
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x60, 0x00, 0x99,
+	0x88, 0xAA, 0xBB, 0x88,
+	0x23, 0x88, 0x01, 0x88,
+	0x67, 0x88, 0x45, 0x01,
+	0x23, 0x88, 0x88, 0x88,
+	0x88, 0x88, 0x88, 0x99,
+	0xBB, 0xAA, 0x88, 0x54,
+	0x88, 0x76, 0x88, 0x10,
+	0x88, 0x32, 0x32, 0x10,
+	0x88, 0x88, 0x88, 0x88,
+	0x88, 0x3C, 0x04, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0xFF, 0xFF, 0xFF,
+};
 
 static char hx8389b_qhd_video_on_cmd9[] = {
-0x03, 0x00, 0x39, 0xC0,
-0xCB, 0x07, 0x07, 0xFF,
+	0x23, 0x00, 0x39, 0xC0,
+	0xE0, 0x05, 0x11, 0x16,
+	0x35, 0x3F, 0x3F, 0x21,
+	0x43, 0x07, 0x0C, 0x0F,
+	0x11, 0x12, 0x10, 0x10,
+	0x1D, 0x18, 0x05, 0x11,
+	0x16, 0x35, 0x3F, 0x3F,
+	0x21, 0x43, 0x07, 0x0C,
+	0x0F, 0x11, 0x12, 0x10,
+	0x10, 0x1D, 0x18, 0xFF,
 };
 
-
 static char hx8389b_qhd_video_on_cmd10[] = {
-0x05, 0x00, 0x39, 0xC0,
-0xBB, 0x00, 0x00, 0xFF,
-0x80, 0xFF, 0xFF, 0xFF,
+	0x80, 0x00, 0x39, 0xC0,
+	0xC1, 0x01, 0x00, 0x07,
+	0x13, 0x21, 0x29, 0x2F,
+	0x34, 0x3B, 0x42, 0x48,
+	0x50, 0x58, 0x61, 0x69,
+	0x71, 0x79, 0x81, 0x88,
+	0x90, 0x98, 0xA0, 0xA9,
+	0xB1, 0xB9, 0xC1, 0xC8,
+	0xCE, 0xD6, 0xDF, 0xE6,
+	0xEF, 0xF7, 0xFF, 0x0E,
+	0x5A, 0x73, 0x69, 0x36,
+	0x8E, 0x69, 0x5F, 0xC0,
+	0x00, 0x07, 0x13, 0x21,
+	0x29, 0x2F, 0x34, 0x3B,
+	0x42, 0x48, 0x50, 0x58,
+	0x61, 0x69, 0x71, 0x79,
+	0x81, 0x88, 0x90, 0x98,
+	0xA0, 0xA9, 0xB1, 0xB9,
+	0xC1, 0xC8, 0xCE, 0xD6,
+	0xDF, 0xE6, 0xEF, 0xF7,
+	0xFF, 0x0E, 0x5A, 0x73,
+	0x69, 0x36, 0x8E, 0x69,
+	0x5F, 0xC0, 0x00, 0x07,
+	0x13, 0x21, 0x29, 0x2F,
+	0x34, 0x3B, 0x42, 0x48,
+	0x50, 0x58, 0x61, 0x69,
+	0x71, 0x79, 0x81, 0x88,
+	0x90, 0x98, 0xA0, 0xA9,
+	0xB1, 0xB9, 0xC1, 0xC8,
+	0xCE, 0xD6, 0xDF, 0xE6,
+	0xEF, 0xF7, 0xFF, 0x0E,
+	0x5A, 0x73, 0x69, 0x36,
+	0x8E, 0x69, 0x5F, 0xC0,
 };
 
-
 static char hx8389b_qhd_video_on_cmd11[] = {
-0x04, 0x00, 0x39, 0xC0,
-0xDE, 0x05, 0x58, 0x10,
- };
-
+	0x05, 0x00, 0x39, 0xC0,
+	0xB6, 0x00, 0x88, 0x00,
+	0x88, 0xFF, 0xFF, 0xFF,
+};
 
 static char hx8389b_qhd_video_on_cmd12[] = {
-0x05, 0x00, 0x39, 0xC0,
-0xB6, 0x00, 0x8A, 0x00,
-0x8A, 0xFF, 0xFF, 0xFF,
+	0x11, 0x00, 0x05, 0x80
 };
 
-
 static char hx8389b_qhd_video_on_cmd13[] = {
-0x23, 0x00, 0x39, 0xC0,
-0xE0, 0x01, 0x08, 0x0C,
-0x1F, 0x25, 0x36, 0x12,
-0x35, 0x05, 0x09, 0x0D,
-0x10, 0x11, 0x0F, 0x0F,
-0x1C, 0x1D, 0x01, 0x08,
-0x0C, 0x1F, 0x25, 0x36,
-0x12, 0x35, 0x05, 0x09,
-0x0D, 0x10, 0x11, 0x0F,
-0x0F, 0x1C, 0x1D, 0xFF,  };
-
-
-static char hx8389b_qhd_video_on_cmd14[] = {
-0x11, 0x00, 0x05, 0x80 };
-
-
-static char hx8389b_qhd_video_on_cmd15[] = {
-0x29, 0x00, 0x05, 0x80 };
-
-
-
+	0x29, 0x00, 0x05, 0x80
+};
 
 static struct mipi_dsi_cmd hx8389b_qhd_video_on_command[] = {
-{ 0x8 , hx8389b_qhd_video_on_cmd0, 0x00},
-{ 0xc , hx8389b_qhd_video_on_cmd1, 0x00},
-{ 0x4 , hx8389b_qhd_video_on_cmd2, 0x00},
-{ 0x8 , hx8389b_qhd_video_on_cmd3, 0x00},
-{ 0x4 , hx8389b_qhd_video_on_cmd4, 0x00},
-{ 0x18 , hx8389b_qhd_video_on_cmd5, 0x00},
-{ 0xc , hx8389b_qhd_video_on_cmd6, 0x00},
-{ 0x1c , hx8389b_qhd_video_on_cmd7, 0x00},
-{ 0x3c , hx8389b_qhd_video_on_cmd8, 0x00},
-{ 0x8 , hx8389b_qhd_video_on_cmd9, 0x00},
-{ 0xc , hx8389b_qhd_video_on_cmd10, 0x00},
-{ 0x8 , hx8389b_qhd_video_on_cmd11, 0x00},
-{ 0xc , hx8389b_qhd_video_on_cmd12, 0x00},
-{ 0x28 , hx8389b_qhd_video_on_cmd13, 0x00},
-{ 0x4 , hx8389b_qhd_video_on_cmd14, 0x96},
-{ 0x4 , hx8389b_qhd_video_on_cmd15, 0x96}
+	{0x8, hx8389b_qhd_video_on_cmd0, 0x0A},
+	{0x4, hx8389b_qhd_video_on_cmd1, 0x01},
+	{0x8, hx8389b_qhd_video_on_cmd2, 0x01},
+	{0xc, hx8389b_qhd_video_on_cmd3, 0x01},
+	{0x18, hx8389b_qhd_video_on_cmd4, 0x01},
+	{0xc, hx8389b_qhd_video_on_cmd5, 0x01},
+	{0x8, hx8389b_qhd_video_on_cmd6, 0x01},
+	{0x1c, hx8389b_qhd_video_on_cmd7, 0x01},
+	{0x40, hx8389b_qhd_video_on_cmd8, 0x01},
+	{0x28, hx8389b_qhd_video_on_cmd9, 0x01},
+	{0x84, hx8389b_qhd_video_on_cmd10, 0x05},
+	{0xc, hx8389b_qhd_video_on_cmd11, 0x01},
+	{0x4, hx8389b_qhd_video_on_cmd12, 0x78},
+	{0x4, hx8389b_qhd_video_on_cmd13, 0x32}
 };
-#define HX8389B_QHD_VIDEO_ON_COMMAND 16
+
+#define HX8389B_QHD_VIDEO_ON_COMMAND 14
 
 
 static char hx8389b_qhd_videooff_cmd0[] = {
-0x28, 0x00, 0x05, 0x80 };
-
+	0x28, 0x00, 0x05, 0x80
+};
 
 static char hx8389b_qhd_videooff_cmd1[] = {
-0x10, 0x00, 0x05, 0x80 };
-
-
-
+	0x10, 0x00, 0x05, 0x80
+};
 
 static struct mipi_dsi_cmd hx8389b_qhd_video_off_command[] = {
-{ 0x4 , hx8389b_qhd_videooff_cmd0},
-{ 0x4 , hx8389b_qhd_videooff_cmd1}
+	{0x4, hx8389b_qhd_videooff_cmd0, 0x32},
+	{0x4, hx8389b_qhd_videooff_cmd1, 0x78}
 };
+
 #define HX8389B_QHD_VIDEO_OFF_COMMAND 2
 
 
 static struct command_state hx8389b_qhd_video_state = {
-  0, 0
+	0, 0
 };
 
 /*---------------------------------------------------------------------------*/
 /* Command mode panel information                                            */
 /*---------------------------------------------------------------------------*/
-
 static struct commandpanel_info hx8389b_qhd_video_command_panel = {
-  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 };
 
 /*---------------------------------------------------------------------------*/
 /* Video mode panel information                                              */
 /*---------------------------------------------------------------------------*/
-
 static struct videopanel_info hx8389b_qhd_video_video_panel = {
-  1, 0, 0, 0, 1, 1, 2, 0, 0x9
+	1, 0, 0, 0, 1, 1, 2, 0, 0x9
 };
 
 /*---------------------------------------------------------------------------*/
-/* Lane Configuration                                                        */
+/* Lane configuration                                                        */
 /*---------------------------------------------------------------------------*/
-
 static struct lane_configuration hx8389b_qhd_video_lane_config = {
-  2, 1, 1, 1, 0, 0
+	2, 1, 1, 1, 0, 0
 };
 
-
 /*---------------------------------------------------------------------------*/
-/* Panel Timing                                                              */
+/* Panel timing                                                              */
 /*---------------------------------------------------------------------------*/
 static const uint32_t hx8389b_qhd_video_timings[] = {
-  0x97,0x23,0x17,0x00,0x4B,0x53,0x1C,0x27,0x27,0x03,0x04,0x00
+	0x87, 0x1E, 0x14, 0x00, 0x44, 0x4B, 0x19, 0x21, 0x22, 0x03, 0x04, 0x00
 };
 
 static struct panel_timing hx8389b_qhd_video_timing_info = {
-  0, 4, 0x04, 0x1b
+	0, 4, 0x04, 0x1b
 };
+
+/*---------------------------------------------------------------------------*/
+/* Panel reset sequence                                                      */
+/*---------------------------------------------------------------------------*/
 static struct panel_reset_sequence hx8389b_qhd_video_reset_seq = {
   { 2, 0, 2, }, { 20, 2, 20, }, 2
 };
 
 /*---------------------------------------------------------------------------*/
-/* Backlight Settings                                                        */
+/* Backlight setting                                                         */
 /*---------------------------------------------------------------------------*/
-
 static struct backlight hx8389b_qhd_video_backlight = {
   0, 1, 255, 0, 1, 0
 };
 
-
 #endif /*_PANEL_HX8389B_QHD_VIDEO_H_*/
diff --git a/platform/msm8610/include/platform/pm_pwm.h b/platform/msm8610/include/platform/pm_pwm.h
new file mode 100644
index 0000000..238004d
--- /dev/null
+++ b/platform/msm8610/include/platform/pm_pwm.h
@@ -0,0 +1,63 @@
+/*
+ * * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ *  * Neither the name of The Linux Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __PMIC_PWM_H
+#define __PMIC_PWM_H
+
+#define PM_PWM_SIZE_SEL_MASK			0x04
+#define PM_PWM_SIZE_SEL_SHIFT			2
+
+#define PM_PWM_CLK_SEL_MASK				0x03
+
+#define PM_PWM_PREDIVIDE_MASK			0x60
+#define PM_PWM_PREDIVIDE_SHIFT			5
+
+#define PM_PWM_M_MASK					0x07
+
+#define PM_PWM_SYNC_MASK				0x01
+
+#define PM_PWM_ENABLE_CTL_MASK			0x80
+#define PM_PWM_ENABLE_CTL_SHIFT			7
+
+#define PM_PWM_EN_GLITCH_REMOVAL_MASK	0x20
+#define PM_PWM_EN_GLITCH_REMOVAL_SHIFT	5
+
+#define PM_PWM_VALUE_BIT7_0				0xFF
+#define PM_PWM_VALUE_BIT8				0x01
+#define PM_PWM_VALUE_BIT5_0				0x3F
+
+#define PM_PWM_BASE(x)					(0x1BC00 + (x))
+#define PM_PWM_CTL_REG_OFFSET			0x41
+#define PM_PWM_SYNC_REG_OFFSET			0x47
+#define PM_PWM_ENABLE_CTL_REG_OFFSET	0x46
+
+int pm_pwm_config(unsigned int duty_us, unsigned int period_us);
+void pm_pwm_enable(bool enable);
+
+#endif
diff --git a/platform/msm8610/pm_pwm.c b/platform/msm8610/pm_pwm.c
new file mode 100644
index 0000000..19ccbb0
--- /dev/null
+++ b/platform/msm8610/pm_pwm.c
@@ -0,0 +1,256 @@
+/*
+ * * Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ *  * Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ *  * Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ *  * Neither the name of The Linux Foundation nor the names of its
+ *    contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <debug.h>
+#include <platform/pm_pwm.h>
+#include <pm8x41_hw.h>
+
+#define NSEC_PER_USEC		1000L
+#define USEC_PER_SEC		1000000L
+#define NSEC_PER_SEC		1000000000L
+
+#define NUM_REF_CLOCKS		3
+#define NSEC_1024HZ			(NSEC_PER_SEC / 1024)
+#define NSEC_32768HZ		(NSEC_PER_SEC / 32768)
+#define NSEC_19P2MHZ		(NSEC_PER_SEC / 19200000)
+
+#define NUM_PRE_DIVIDE		4
+#define PRE_DIVIDE_1		1
+#define PRE_DIVIDE_3		3
+#define PRE_DIVIDE_5		5
+#define PRE_DIVIDE_6		6
+static unsigned int pt_t[NUM_PRE_DIVIDE][NUM_REF_CLOCKS] = {
+	{	PRE_DIVIDE_1 * NSEC_1024HZ,
+		PRE_DIVIDE_1 * NSEC_32768HZ,
+		PRE_DIVIDE_1 * NSEC_19P2MHZ,
+	},
+	{	PRE_DIVIDE_3 * NSEC_1024HZ,
+		PRE_DIVIDE_3 * NSEC_32768HZ,
+		PRE_DIVIDE_3 * NSEC_19P2MHZ,
+	},
+	{	PRE_DIVIDE_5 * NSEC_1024HZ,
+		PRE_DIVIDE_5 * NSEC_32768HZ,
+		PRE_DIVIDE_5 * NSEC_19P2MHZ,
+	},
+	{	PRE_DIVIDE_6 * NSEC_1024HZ,
+		PRE_DIVIDE_6 * NSEC_32768HZ,
+		PRE_DIVIDE_6 * NSEC_19P2MHZ,
+	},
+};
+
+enum pwm_ctl_reg {
+	SIZE_CLK,
+	FREQ_PREDIV_CLK,
+	TYPE_CONFIG,
+	VALUE_LSB,
+	VALUE_MSB,
+};
+
+#define NUM_PWM_CTL_REGS	5
+struct pm_pwm_config {
+	int pwm_size;		/* round up to 6 or 9 for 6/9-bit PWM SIZE */
+	int clk;
+	int pre_div;
+	int pre_div_exp;
+	int pwm_value;
+	uint8_t pwm_ctl[NUM_PWM_CTL_REGS];
+};
+
+static void pm_pwm_reg_write(uint8_t off, uint8_t val)
+{
+	REG_WRITE(PM_PWM_BASE(off), val);
+}
+
+/*
+ * PWM Frequency = Clock Frequency / (N * T)
+ *	or
+ * PWM Period = Clock Period * (N * T)
+ *	where
+ * N = 2^9 or 2^6 for 9-bit or 6-bit PWM size
+ * T = Pre-divide * 2^m, where m = 0..7 (exponent)
+ *
+ * This is the formula to figure out m for the best pre-divide and clock:
+ * (PWM Period / N) = (Pre-divide * Clock Period) * 2^m
+ */
+
+#define PRE_DIVIDE_MAX		6
+#define CLK_PERIOD_MAX		NSEC_1024HZ
+#define PM_PWM_M_MAX		7
+#define MAX_MPT				((PRE_DIVIDE_MAX * CLK_PERIOD_MAX) << PM_PWM_M_MAX)
+static void pm_pwm_calc_period(unsigned int period_us,
+				   struct pm_pwm_config *pwm_config)
+{
+	int	n, m, clk, div;
+	int	best_m, best_div, best_clk;
+	unsigned int last_err, cur_err, min_err;
+	unsigned int tmp_p, period_n;
+
+	n = 6;
+
+	if (period_us < ((unsigned)(-1) / NSEC_PER_USEC))
+		period_n = (period_us * NSEC_PER_USEC) >> n;
+	else
+		period_n = (period_us >> n) * NSEC_PER_USEC;
+
+	if (period_n >= MAX_MPT) {
+		n = 9;
+		period_n >>= 3;
+	}
+
+	min_err = last_err = (unsigned)(-1);
+	best_m = 0;
+	best_clk = 0;
+	best_div = 0;
+	for (clk = 0; clk < NUM_REF_CLOCKS; clk++) {
+		for (div = 0; div < NUM_PRE_DIVIDE; div++) {
+			/* period_n = (PWM Period / N) */
+			/* tmp_p = (Pre-divide * Clock Period) * 2^m */
+			tmp_p = pt_t[div][clk];
+			for (m = 0; m <= PM_PWM_M_MAX; m++) {
+				if (period_n > tmp_p)
+					cur_err = period_n - tmp_p;
+				else
+					cur_err = tmp_p - period_n;
+
+				if (cur_err < min_err) {
+					min_err = cur_err;
+					best_m = m;
+					best_clk = clk;
+					best_div = div;
+				}
+
+				if (m && cur_err > last_err)
+					/* Break for bigger cur_err */
+					break;
+
+				last_err = cur_err;
+				tmp_p <<= 1;
+			}
+		}
+	}
+
+	pwm_config->pwm_size = n;
+	pwm_config->clk = best_clk;
+	pwm_config->pre_div = best_div;
+	pwm_config->pre_div_exp = best_m;
+}
+
+static void pm_pwm_calc_pwm_value(struct pm_pwm_config *pwm_config,
+				      unsigned int period_us,
+				      unsigned int duty_us)
+{
+	unsigned int max_pwm_value, tmp;
+
+	/* Figure out pwm_value with overflow handling */
+	tmp = 1 << (sizeof(tmp) * 8 - pwm_config->pwm_size);
+	if (duty_us < tmp) {
+		tmp = duty_us << pwm_config->pwm_size;
+		pwm_config->pwm_value = tmp / period_us;
+	} else {
+		tmp = period_us >> pwm_config->pwm_size;
+		pwm_config->pwm_value = duty_us / tmp;
+	}
+	max_pwm_value = (1 << pwm_config->pwm_size) - 1;
+	if (pwm_config->pwm_value > max_pwm_value)
+		pwm_config->pwm_value = max_pwm_value;
+}
+
+#define PM_PWM_SIZE_9_BIT	1
+#define PM_PWM_SIZE_6_BIT	0
+static void pm_pwm_config_regs(struct pm_pwm_config *pwm_config)
+{
+	int i;
+	uint8_t reg;
+
+	reg = ((pwm_config->pwm_size > 6 ? PM_PWM_SIZE_9_BIT : PM_PWM_SIZE_6_BIT)
+		<< PM_PWM_SIZE_SEL_SHIFT)
+		& PM_PWM_SIZE_SEL_MASK;
+	reg |= (pwm_config->clk + 1) & PM_PWM_CLK_SEL_MASK;
+	pwm_config->pwm_ctl[SIZE_CLK] = reg;
+
+	reg = (pwm_config->pre_div << PM_PWM_PREDIVIDE_SHIFT)
+	    & PM_PWM_PREDIVIDE_MASK;
+	reg |= pwm_config->pre_div_exp & PM_PWM_M_MASK;
+	pwm_config->pwm_ctl[FREQ_PREDIV_CLK] = reg;
+
+	/* Enable glitch removal by default */
+	reg = 1 << PM_PWM_EN_GLITCH_REMOVAL_SHIFT
+		& PM_PWM_EN_GLITCH_REMOVAL_MASK;
+	pwm_config->pwm_ctl[TYPE_CONFIG] = reg;
+
+	if (pwm_config->pwm_size > 6) {
+		pwm_config->pwm_ctl[VALUE_LSB] = pwm_config->pwm_value
+				& PM_PWM_VALUE_BIT7_0;
+		pwm_config->pwm_ctl[VALUE_MSB] = (pwm_config->pwm_value >> 8)
+				& PM_PWM_VALUE_BIT8;
+	} else
+		pwm_config->pwm_ctl[VALUE_LSB] = pwm_config->pwm_value
+			    & PM_PWM_VALUE_BIT5_0;
+
+	for (i = 0; i < NUM_PWM_CTL_REGS; i++)
+		pm_pwm_reg_write(PM_PWM_CTL_REG_OFFSET + i, pwm_config->pwm_ctl[i]);
+
+	reg = 1 & PM_PWM_SYNC_MASK;
+	pm_pwm_reg_write(PM_PWM_SYNC_REG_OFFSET, reg);
+}
+
+/* usec: 19.2M, n=6, m=0, pre=2 */
+#define PM_PWM_PERIOD_MIN	7
+/* 1K, n=9, m=7, pre=6 */
+#define PM_PWM_PERIOD_MAX	(384 * USEC_PER_SEC)
+int pm_pwm_config(unsigned int duty_us, unsigned int period_us)
+{
+	struct pm_pwm_config pwm_config;
+
+	if ((duty_us > period_us) || (period_us > PM_PWM_PERIOD_MAX) ||
+	    (period_us < PM_PWM_PERIOD_MIN)) {
+		dprintf(CRITICAL, "Error in duty cycle and period\n");
+		return -1;
+	}
+
+	pm_pwm_calc_period(period_us, &pwm_config);
+	pm_pwm_calc_pwm_value(&pwm_config, period_us, duty_us);
+
+	dprintf(SPEW, "duty/period=%u/%u usec: pwm_value=%d (of %d)\n",
+		duty_us, period_us, pwm_config.pwm_value, 1 << pwm_config.pwm_size);
+
+	pm_pwm_config_regs(&pwm_config);
+
+	return 0;
+}
+
+void pm_pwm_enable(bool enable)
+{
+	uint8_t reg;
+
+	reg = enable << PM_PWM_ENABLE_CTL_SHIFT
+		& PM_PWM_ENABLE_CTL_MASK;
+
+	pm_pwm_reg_write(PM_PWM_ENABLE_CTL_REG_OFFSET, reg);
+}
diff --git a/platform/msm8610/rules.mk b/platform/msm8610/rules.mk
index 234432f..fa41936 100644
--- a/platform/msm8610/rules.mk
+++ b/platform/msm8610/rules.mk
@@ -22,7 +22,8 @@
 	$(LOCAL_DIR)/platform.o \
 	$(LOCAL_DIR)/acpuclock.o \
 	$(LOCAL_DIR)/msm8610-clock.o \
-	$(LOCAL_DIR)/gpio.o
+	$(LOCAL_DIR)/gpio.o \
+	$(LOCAL_DIR)/pm_pwm.o
 
 LINKER_SCRIPT += $(BUILDDIR)/system-onesegment.ld
 
diff --git a/target/msm8610/target_display.c b/target/msm8610/target_display.c
index 36f25a6..e352c46 100644
--- a/target/msm8610/target_display.c
+++ b/target/msm8610/target_display.c
@@ -37,6 +37,7 @@
 #include <board.h>
 #include <platform/gpio.h>
 #include <platform/iomap.h>
+#include <platform/pm_pwm.h>
 #include <target/display.h>
 
 #include "include/panel.h"
@@ -49,16 +50,29 @@
 #define GPIO_STATE_HIGH 2
 #define RESET_GPIO_SEQ_LEN 3
 
+#define PWM_DUTY_US 13
+#define PWM_PERIOD_US 27
+
 int target_backlight_ctrl(uint8_t enable)
 {
 	struct pm8x41_mpp mpp;
+	int rc;
+
 	mpp.base = PM8x41_MMP3_BASE;
-	mpp.mode = MPP_HIGH;
 	mpp.vin = MPP_VIN3;
 	if (enable) {
+		pm_pwm_enable(false);
+		rc = pm_pwm_config(PWM_DUTY_US, PWM_PERIOD_US);
+		if (rc < 0)
+			mpp.mode = MPP_HIGH;
+		else {
+			mpp.mode = MPP_DTEST1;
+			pm_pwm_enable(true);
+		}
 		pm8x41_config_output_mpp(&mpp);
 		pm8x41_enable_mpp(&mpp, MPP_ENABLE);
 	} else {
+		pm_pwm_enable(false);
 		pm8x41_enable_mpp(&mpp, MPP_DISABLE);
 	}
 	/* Need delay before power on regulators */