Merge "mmc-erase : Modified code to increase erase functionality."
diff --git a/platform/msm_shared/scm.c b/platform/msm_shared/scm.c
index 5838afd..ad83f58 100644
--- a/platform/msm_shared/scm.c
+++ b/platform/msm_shared/scm.c
@@ -188,17 +188,22 @@
int decrypt_img_scm(uint32_t** img_ptr, uint32_t* img_len_ptr)
{
int ret = 0;
- decrypt_img_req *decrypt_cmd;
-
- /* allocate memory for the command structure */
- /* NEEDS TO BE CONTIGUOUS MEMORY */
- decrypt_cmd = malloc(sizeof(decrypt_img_req));
+ decrypt_img_req decrypt_cmd;
/* setup the command for decryption */
- setup_decrypt_cmd(decrypt_cmd, img_ptr, img_len_ptr);
+ setup_decrypt_cmd(&decrypt_cmd, img_ptr, img_len_ptr);
- ret = smc(decrypt_cmd);
- free(decrypt_cmd);
+ /* Since TZ cannot access cached data, cmd must be flushed to main memory */
+ arch_clean_invalidate_cache_range((addr_t) &decrypt_cmd, sizeof(decrypt_cmd));
+
+ /* Invalidate img ptr and len from cache so that we read the updated data
+ * from the main memory.
+ */
+ arch_clean_invalidate_cache_range((addr_t) img_ptr, sizeof(img_ptr));
+ arch_clean_invalidate_cache_range((addr_t) img_len_ptr, sizeof(img_len_ptr));
+
+ ret = smc(&decrypt_cmd);
+
return ret;
}
diff --git a/platform/msm_shared/uart_dm.c b/platform/msm_shared/uart_dm.c
index 0a7aedc..01cf5a4 100644
--- a/platform/msm_shared/uart_dm.c
+++ b/platform/msm_shared/uart_dm.c
@@ -44,6 +44,8 @@
#define NULL 0
#endif
+extern void dsb(void);
+
/* Note:
* This is a basic implementation of UART_DM protocol. More focus has been
* given on simplicity than efficiency. Few of the things to be noted are:
@@ -129,10 +131,12 @@
{
/* Configure the uart clock */
clock_config_uart_dm(id);
+ dsb();
/* Configure GPIO to provide connectivity between GSBI
product ports and chip pads */
gpio_config_uart_dm(id);
+ dsb();
/* Configure Data Mover for GSBI operation.
* Currently not supported. */
@@ -141,11 +145,13 @@
* I2C on 2 ports, UART (without HS flow control) on the other 2. */
writel(GSBI_PROTOCOL_CODE_I2C_UART << GSBI_CTRL_REG_PROTOCOL_CODE_S,
GSBI_CTRL_REG(id));
+ dsb();
- /* Configure clock selection register for tx and rx rates.
- * Selecting 115.2k for both RX and TX.
- */
- writel(UART_DM_CLK_RX_TX_BIT_RATE, MSM_BOOT_UART_DM_CSR(id));
+ /* Configure clock selection register for tx and rx rates.
+ * Selecting 115.2k for both RX and TX.
+ */
+ writel(UART_DM_CLK_RX_TX_BIT_RATE, MSM_BOOT_UART_DM_CSR(id));
+ dsb();
return MSM_BOOT_UART_DM_E_SUCCESS;
}
diff --git a/project/msm8960.mk b/project/msm8960.mk
index 689b0db..0de2066 100644
--- a/project/msm8960.mk
+++ b/project/msm8960.mk
@@ -6,8 +6,8 @@
MODULES += app/aboot
-DEBUG := 0
+DEBUG := 1
#DEFINES += WITH_DEBUG_DCC=1
-#DEFINES += WITH_DEBUG_UART=1
+DEFINES += WITH_DEBUG_UART=1
#DEFINES += WITH_DEBUG_FBCON=1