commit f3212dec1f3de97a7f42de0c22b3408c058846f4
author Channagoud Kadabi <ckadabi@codeaurora.org> Tue May 14 13:14:16 2013 -0700
committer Channagoud Kadabi <ckadabi@codeaurora.org> Wed Jun 19 11:58:08 2013 -0700
tree 2729b0a8912b93e313ac21b4b4dd5b5b02edaec8
parent f62d62c0a73b6fbd48af7c80be4bef52cac0f7f4

platform: msm8974: Add power control registers & irqs

Add power control status, power control clear registers and
irqs for power control for all instances of sdcc.

CRs-Fixed: 495434
Change-Id: I26d8f22979a8ca0068167c59ed66e21b1970b021

platform/msm8974/include/platform/iomap.h

diff --git a/platform/msm8974/include/platform/iomap.h b/platform/msm8974/include/platform/iomap.h
index ff7ab1b..ac0d2a2 100644
--- a/platform/msm8974/include/platform/iomap.h
+++ b/platform/msm8974/include/platform/iomap.h
@@ -176,7 +176,9 @@
 #define SDC1_HDRV_PULL_CTL           (TLMM_BASE_ADDR + 0x00002044)
 
 /* SDHCI */
-#define SDCC_MCI_HC_MODE            (PERIPH_SS_BASE + 0x00024078)
-#define SDCC_HC_PWRCTL_MASK_REG     (PERIPH_SS_BASE + 0x000240E0)
-#define SDCC_HC_PWRCTL_CTL_REG      (PERIPH_SS_BASE + 0x000240E8)
+#define SDCC_MCI_HC_MODE            (0x00000078)
+#define SDCC_HC_PWRCTL_STATUS_REG   (0x000000DC)
+#define SDCC_HC_PWRCTL_MASK_REG     (0x000000E0)
+#define SDCC_HC_PWRCTL_CLEAR_REG    (0x000000E4)
+#define SDCC_HC_PWRCTL_CTL_REG      (0x000000E8)
 #endif