platform: msm_shared: Update MDP5 for msm8956 support
msm8956 supports MDSS 1.11 version and has Interface-2 in addition
when compared to msm8952. This change updates MDP5 with the new
MDSS_MDP version checks at relevant places for MDP5 configuration for
8956, adds support for split pingpong for msm8956.
Change-Id: I823a1744cde84924aa7d578832899c067c389b60
diff --git a/platform/msm8952/include/platform/iomap.h b/platform/msm8952/include/platform/iomap.h
index 8ea20f4..762ee9d 100644
--- a/platform/msm8952/include/platform/iomap.h
+++ b/platform/msm8952/include/platform/iomap.h
@@ -284,6 +284,26 @@
#endif
#define MDP_INTF_1_BASE REG_MDP(0x12700)
+#ifdef MDP_INTF_2_BASE
+#undef MDP_INTF_2_BASE
+#endif
+#define MDP_INTF_2_BASE REG_MDP(0x12F00)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_EN
+#undef MDP_REG_SPLIT_DISPLAY_EN
+#endif
+#define MDP_REG_SPLIT_DISPLAY_EN REG_MDP(0x12F4)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL
+#endif
+#define MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL REG_MDP(0x12F8)
+
+#ifdef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#undef MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL
+#endif
+#define MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL REG_MDP(0x13F0)
+
#ifdef MMSS_MDP_SMP_ALLOC_W_BASE
#undef MMSS_MDP_SMP_ALLOC_W_BASE
#endif
diff --git a/platform/msm_shared/include/mdp5.h b/platform/msm_shared/include/mdp5.h
index e48fe85..43e2c0e 100644
--- a/platform/msm_shared/include/mdp5.h
+++ b/platform/msm_shared/include/mdp5.h
@@ -91,6 +91,7 @@
#define MDSS_MDP_HW_REV_108 MDSS_MDP_REV(1, 8, 0) /* 8939 v1.0 */
#define MDSS_MDP_HW_REV_109 MDSS_MDP_REV(1, 9, 0) /* 8994 v2.0 */
#define MDSS_MDP_HW_REV_110 MDSS_MDP_REV(1, 10, 0) /* 8992 v1.0 */
+#define MDSS_MDP_HW_REV_111 MDSS_MDP_REV(1, 11, 0) /* 8956 v1.0 */
#define MDSS_MDP_HW_REV_112 MDSS_MDP_REV(1, 12, 0) /* 8952 v1.0 */
#define MDSS_MDP_HW_REV_200 MDSS_MDP_REV(2, 0, 0) /* 8092 v1.0 */
diff --git a/platform/msm_shared/mdp5.c b/platform/msm_shared/mdp5.c
index d67b5c8..ef083ea 100755
--- a/platform/msm_shared/mdp5.c
+++ b/platform/msm_shared/mdp5.c
@@ -75,6 +75,7 @@
if ((mdss_mdp_rev == MDSS_MDP_HW_REV_106) ||
(mdss_mdp_rev == MDSS_MDP_HW_REV_108) ||
+ (mdss_mdp_rev == MDSS_MDP_HW_REV_111) ||
(mdss_mdp_rev == MDSS_MDP_HW_REV_112))
mdss_mdp_intf_off = 0x59100;
else if (mdss_mdp_rev >= MDSS_MDP_HW_REV_102)
@@ -91,7 +92,8 @@
uint32_t mdss_mdp_rev = readl(MDP_HW_REV);
/* return MMSS_MDP_PPB0_CONFIG offset from MDSS base */
- if (mdss_mdp_rev == MDSS_MDP_HW_REV_108)
+ if ((mdss_mdp_rev == MDSS_MDP_HW_REV_108) ||
+ (mdss_mdp_rev == MDSS_MDP_HW_REV_111))
mdss_mdp_ppb_off = 0x1420;
else if (mdss_mdp_rev == MDSS_MDP_HW_REV_110)
mdss_mdp_ppb_off = 0x1334;
@@ -105,7 +107,8 @@
{
uint32_t mdss_mdp_rev = readl(MDP_HW_REV);
- if (mdss_mdp_rev == MDSS_MDP_HW_REV_110)
+ if ((mdss_mdp_rev == MDSS_MDP_HW_REV_110) ||
+ (mdss_mdp_rev == MDSS_MDP_HW_REV_111))
return 0xB0020;
else if (MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_107))
return 0xB0000;
@@ -189,6 +192,7 @@
/* For targets from MDP v1.5, MDP INTF registers are double buffered */
if ((mdss_mdp_rev == MDSS_MDP_HW_REV_106) ||
(mdss_mdp_rev == MDSS_MDP_HW_REV_108) ||
+ (mdss_mdp_rev == MDSS_MDP_HW_REV_111) ||
(mdss_mdp_rev == MDSS_MDP_HW_REV_112)) {
if (pinfo->dest == DISPLAY_2) {
*ctl0_reg_val |= BIT(31);
@@ -351,11 +355,12 @@
if (MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_101) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_106) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_108) ||
+ MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_111) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_112)) {
switch (pinfo->pipe_type) {
case MDSS_MDP_PIPE_TYPE_RGB:
*left_sspp_client_id = 0x7; /* 7 */
- *right_sspp_client_id = 0x11; /* 17 */
+ *right_sspp_client_id = 0x8; /* 8 */
break;
case MDSS_MDP_PIPE_TYPE_DMA:
*left_sspp_client_id = 0x4; /* 4 */
@@ -364,7 +369,7 @@
case MDSS_MDP_PIPE_TYPE_VIG:
default:
*left_sspp_client_id = 0x1; /* 1 */
- *right_sspp_client_id = 0x4; /* 4 */
+ *right_sspp_client_id = 0x9; /* 9 */
break;
}
} else {
@@ -419,8 +424,9 @@
(mdss_mdp_rev == MDSS_MDP_HW_REV_112)) {
/* 8Kb per SMP on 8916/8952 */
smp_size = 8192;
- } else if (mdss_mdp_rev == MDSS_MDP_HW_REV_108) {
- /* 10Kb per SMP on 8939 */
+ } else if ((mdss_mdp_rev == MDSS_MDP_HW_REV_108) ||
+ (mdss_mdp_rev == MDSS_MDP_HW_REV_111)) {
+ /* 10Kb per SMP on 8939/8956 */
smp_size = 10240;
} else if ((mdss_mdp_rev >= MDSS_MDP_HW_REV_103) &&
(mdss_mdp_rev < MDSS_MDP_HW_REV_200)) {
@@ -792,6 +798,8 @@
MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev,
MDSS_MDP_HW_REV_108) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev,
+ MDSS_MDP_HW_REV_111) ||
+ MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev,
MDSS_MDP_HW_REV_112))
map = 0xE4;
else if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev,
@@ -825,6 +833,7 @@
if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, MDSS_MDP_HW_REV_106) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, MDSS_MDP_HW_REV_108) ||
+ MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, MDSS_MDP_HW_REV_111) ||
MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, MDSS_MDP_HW_REV_112)) {
vbif_qos[0] = 2;
vbif_qos[1] = 2;