/*
 * Copyright (c) 2011, 2014, The Linux Foundation. All rights reserved.
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 * modification, are permitted provided that the following conditions are
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 *       disclaimer in the documentation and/or other materials provided
 *       with the distribution.
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 *       from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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 */

#ifndef __PLATFORM_MSM_SHARED_QGIC_H
#define __PLATFORM_MSM_SHARED_QGIC_H

#include "qgic_common.h"
#include <platform/iomap.h>
#include <platform/interrupts.h>
#include <arch/arm.h>

#define GIC_CPU_REG(off)            (MSM_GIC_CPU_BASE  + (off))

#define GIC_CPU_CTRL                GIC_CPU_REG(0x00)
#define GIC_CPU_PRIMASK             GIC_CPU_REG(0x04)
#define GIC_CPU_BINPOINT            GIC_CPU_REG(0x08)
#define GIC_CPU_INTACK              GIC_CPU_REG(0x0c)
#define GIC_CPU_EOI                 GIC_CPU_REG(0x10)
#define GIC_CPU_RUNNINGPRI          GIC_CPU_REG(0x14)
#define GIC_CPU_HIGHPRI             GIC_CPU_REG(0x18)

#define INTERRUPT_LVL_N_TO_N        0x0
#define INTERRUPT_LVL_1_TO_N        0x1
#define INTERRUPT_EDGE_N_TO_N       0x2
#define INTERRUPT_EDGE_1_TO_N       0x3

uint32_t qgic_read_iar(void);
void qgic_write_eoi(uint32_t);

enum handler_return gic_platform_irq(struct arm_iframe *frame);
void gic_platform_fiq(struct arm_iframe *frame);
status_t gic_mask_interrupt(unsigned int vector);
status_t gic_unmask_interrupt(unsigned int vector);
void gic_register_int_handler(unsigned int vector, int_handler func, void *arg);
#endif