blob: b7488037940f6ae801a1ee965851ee2ff29792bf [file] [log] [blame]
Umang Agrawal898a1912018-02-13 16:09:10 +05301/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
Aparna Mallavarapuca676882015-01-19 20:39:06 +05302 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <reg.h>
32#include <target.h>
33#include <platform.h>
34#include <uart_dm.h>
35#include <mmc.h>
36#include <platform/gpio.h>
37#include <dev/keys.h>
38#include <spmi_v2.h>
39#include <pm8x41.h>
Aparna Mallavarapubc6315e2015-04-11 04:00:43 +053040#include <pm8x41_hw.h>
Aparna Mallavarapuca676882015-01-19 20:39:06 +053041#include <board.h>
42#include <baseband.h>
43#include <hsusb.h>
44#include <scm.h>
45#include <platform/gpio.h>
46#include <platform/gpio.h>
47#include <platform/irqs.h>
48#include <platform/clock.h>
Aparna Mallavarapubc6315e2015-04-11 04:00:43 +053049#include <platform/timer.h>
Aparna Mallavarapuca676882015-01-19 20:39:06 +053050#include <crypto5_wrapper.h>
51#include <partition_parser.h>
52#include <stdlib.h>
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +053053#include <rpm-smd.h>
Aparna Mallavarapubc6315e2015-04-11 04:00:43 +053054#include <spmi.h>
55#include <sdhci_msm.h>
56#include <clock.h>
Parth Dixit6e6bad52015-07-30 19:02:38 +053057#include <boot_device.h>
58#include <secapp_loader.h>
59#include <rpmb.h>
lijuang3606df82015-09-02 21:14:43 +080060#include <smem.h>
Aparna Mallavarapuca676882015-01-19 20:39:06 +053061
Padmanabhan Komanduru9d49f892015-04-10 12:58:46 -070062#include "target/display.h"
63
Aparna Mallavarapuca676882015-01-19 20:39:06 +053064#if LONG_PRESS_POWER_ON
65#include <shutdown_detect.h>
66#endif
67
Matthew Qin47dfdb72015-06-10 21:29:11 +080068#if PON_VIB_SUPPORT
69#include <vibrator.h>
70#endif
71
72#if PON_VIB_SUPPORT
73#define VIBRATE_TIME 250
74#endif
75
Aparna Mallavarapuca676882015-01-19 20:39:06 +053076#define PMIC_ARB_CHANNEL_NUM 0
77#define PMIC_ARB_OWNER_ID 0
78#define TLMM_VOL_UP_BTN_GPIO 85
Unnati Gandhife004a92015-06-01 13:06:06 +053079#define TLMM_VOL_UP_BTN_GPIO_8956 113
Parth Dixit720d3b92015-10-30 01:21:34 +053080#define TLMM_VOL_UP_BTN_GPIO_8937 91
Wufengf2e37312016-04-12 16:09:47 +080081#define TLMM_VOL_DOWN_BTN_GPIO 128
Aparna Mallavarapuca676882015-01-19 20:39:06 +053082
83#define FASTBOOT_MODE 0x77665500
Aparna Mallavarapu680a1332015-04-29 19:14:09 +053084#define RECOVERY_MODE 0x77665502
Aparna Mallavarapuca676882015-01-19 20:39:06 +053085#define PON_SOFT_RB_SPARE 0x88F
86
Parth Dixit17b85192016-12-28 15:51:33 +053087#define EXT4_CMDLINE " rootfstype=ext4 root=/dev/mmcblk0p"
88
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +053089#define CE1_INSTANCE 1
90#define CE_EE 1
91#define CE_FIFO_SIZE 64
92#define CE_READ_PIPE 3
93#define CE_WRITE_PIPE 2
94#define CE_READ_PIPE_LOCK_GRP 0
95#define CE_WRITE_PIPE_LOCK_GRP 0
96#define CE_ARRAY_SIZE 20
Wufengf2e37312016-04-12 16:09:47 +080097#define SUB_TYPE_SKUT 0x0A
Vijay Kumar Pendoti0d698842016-09-23 16:23:16 +053098#define SMBCHG_USB_RT_STS 0x21310
99#define USBIN_UV_RT_STS BIT(0)
Umang Agrawal898a1912018-02-13 16:09:10 +0530100#define USBIN_UV_RT_STS_PMI632 BIT(2)
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530101
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530102struct mmc_device *dev;
103
104static uint32_t mmc_pwrctl_base[] =
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530105 { MSM_SDC1_BASE, MSM_SDC2_BASE };
106
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530107static uint32_t mmc_sdhci_base[] =
108 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
109
110static uint32_t mmc_sdc_pwrctl_irq[] =
111 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530112
113void target_early_init(void)
114{
115#if WITH_DEBUG_UART
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530116 uart_dm_init(2, 0, BLSP1_UART1_BASE);
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530117#endif
118}
119
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530120static void set_sdc_power_ctrl()
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530121{
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530122 /* Drive strength configs for sdc pins */
123 struct tlmm_cfgs sdc1_hdrv_cfg[] =
124 {
125 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0},
126 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0},
127 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0},
128 };
129
130 /* Pull configs for sdc pins */
131 struct tlmm_cfgs sdc1_pull_cfg[] =
132 {
133 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, 0},
134 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0},
135 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0},
136 };
137
Aparna Mallavarapu29138912015-04-13 23:45:35 +0530138 struct tlmm_cfgs sdc1_rclk_cfg[] =
139 {
140 { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, 0},
141 };
142
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530143 /* Set the drive strength & pull control values */
144 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
145 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
Aparna Mallavarapu29138912015-04-13 23:45:35 +0530146 tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg));
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530147}
148
149void target_sdc_init()
150{
151 struct mmc_config_data config;
152
153 /* Set drive strength & pull ctrl values */
154 set_sdc_power_ctrl();
155
156 /* Try slot 1*/
157 config.slot = 1;
158 config.bus_width = DATA_BUS_WIDTH_8BIT;
Aparna Mallavarapu680a1332015-04-29 19:14:09 +0530159 config.max_clk_rate = MMC_CLK_192MHZ;
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530160 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
161 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
162 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
163 config.hs400_support = 1;
164
165 if (!(dev = mmc_init(&config))) {
166 /* Try slot 2 */
167 config.slot = 2;
168 config.max_clk_rate = MMC_CLK_200MHZ;
169 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
170 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
171 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
172 config.hs400_support = 0;
173
174 if (!(dev = mmc_init(&config))) {
175 dprintf(CRITICAL, "mmc init failed!");
176 ASSERT(0);
177 }
178 }
179}
180
181void *target_mmc_device()
182{
183 return (void *) dev;
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530184}
185
186/* Return 1 if vol_up pressed */
Rami Butsteine51318a2015-05-27 16:23:17 +0300187int target_volume_up()
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530188{
lijuang2d2b8a02015-06-05 21:34:15 +0800189 static uint8_t first_time = 0;
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530190 uint8_t status = 0;
Unnati Gandhie3a5c0e2015-06-14 17:31:07 +0530191 uint32_t vol_up_gpio;
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530192
Unnati Gandhife004a92015-06-01 13:06:06 +0530193 if(platform_is_msm8956())
Unnati Gandhie3a5c0e2015-06-14 17:31:07 +0530194 vol_up_gpio = TLMM_VOL_UP_BTN_GPIO_8956;
lijuangf6563682018-04-04 20:26:52 +0800195 else if(platform_is_msm8937() || platform_is_msm8917() ||
196 platform_is_sdm429() || platform_is_sdm439())
Parth Dixit720d3b92015-10-30 01:21:34 +0530197 vol_up_gpio = TLMM_VOL_UP_BTN_GPIO_8937;
Unnati Gandhife004a92015-06-01 13:06:06 +0530198 else
Unnati Gandhie3a5c0e2015-06-14 17:31:07 +0530199 vol_up_gpio = TLMM_VOL_UP_BTN_GPIO;
200
lijuang2d2b8a02015-06-05 21:34:15 +0800201 if (!first_time) {
202 gpio_tlmm_config(vol_up_gpio, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE);
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530203
lijuang2d2b8a02015-06-05 21:34:15 +0800204 /* Wait for the gpio config to take effect - debounce time */
205 udelay(10000);
206
207 first_time = 1;
208 }
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530209
210 /* Get status of GPIO */
Unnati Gandhie3a5c0e2015-06-14 17:31:07 +0530211 status = gpio_status(vol_up_gpio);
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530212
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +0530213 /* Active low signal. */
Aparna Mallavarapudb938b62015-04-09 01:00:55 +0530214 return !status;
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530215}
216
217/* Return 1 if vol_down pressed */
218uint32_t target_volume_down()
219{
Wufengf2e37312016-04-12 16:09:47 +0800220 static bool vol_down_key_init = false;
221
222 if ((board_hardware_id() == HW_PLATFORM_QRD) &&
223 (board_hardware_subtype() == SUB_TYPE_SKUT)) {
224 uint32_t status = 0;
225
226 if (!vol_down_key_init) {
227 gpio_tlmm_config(TLMM_VOL_DOWN_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP,
228 GPIO_2MA, GPIO_ENABLE);
229 /* Wait for the gpio config to take effect - debounce time */
230 thread_sleep(10);
231 vol_down_key_init = true;
232 }
233
234 /* Get status of GPIO */
235 status = gpio_status(TLMM_VOL_DOWN_BTN_GPIO);
236
237 /* Active low signal. */
238 return !status;
239 } else {
240 /* Volume down button tied in with PMIC RESIN. */
241 return pm8x41_resin_status();
242 }
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530243}
244
Parth Dixit300a3b92015-06-19 16:38:12 +0530245uint32_t target_is_pwrkey_pon_reason()
246{
Umang Agrawal898a1912018-02-13 16:09:10 +0530247 uint32_t pmic = target_get_pmic();
248 uint8_t pon_reason = 0;
249 bool usb_present_sts = 0;
250
251 if (pmic == PMIC_IS_PMI632)
252 {
253 pon_reason = pmi632_get_pon_reason();
254 usb_present_sts = !(USBIN_UV_RT_STS_PMI632 &
Vijay Kumar Pendoti0d698842016-09-23 16:23:16 +0530255 pm8x41_reg_read(SMBCHG_USB_RT_STS));
Umang Agrawal898a1912018-02-13 16:09:10 +0530256 }
257 else
258 {
259 pon_reason = pm8950_get_pon_reason();
260 usb_present_sts = !(USBIN_UV_RT_STS &
261 pm8x41_reg_read(SMBCHG_USB_RT_STS));
262 }
263
Parth Dixit300a3b92015-06-19 16:38:12 +0530264 if (pm8x41_get_is_cold_boot() && ((pon_reason == KPDPWR_N) || (pon_reason == (KPDPWR_N|PON1))))
265 return 1;
Vijay Kumar Pendoti0d698842016-09-23 16:23:16 +0530266 else if ((pon_reason == PON1) && (!usb_present_sts))
267 return 1;
Parth Dixit300a3b92015-06-19 16:38:12 +0530268 else
269 return 0;
270}
271
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530272static void target_keystatus()
273{
274 keys_init();
275
276 if(target_volume_down())
277 keys_post_event(KEY_VOLUMEDOWN, 1);
278
279 if(target_volume_up())
280 keys_post_event(KEY_VOLUMEUP, 1);
281}
282
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530283void target_init(void)
284{
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530285 dprintf(INFO, "target_init()\n");
286
287 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
288
Parth Dixit550ddf32016-11-28 17:00:29 +0530289 if(target_is_pmi_enabled())
Parth Dixit3e6dead2015-12-08 15:04:54 +0530290 {
lijuangf6563682018-04-04 20:26:52 +0800291 if(platform_is_msm8937() || platform_is_msm8917() ||
292 platform_is_sdm429() || platform_is_sdm439())
Parth Dixit3e6dead2015-12-08 15:04:54 +0530293 {
Parth Dixit550ddf32016-11-28 17:00:29 +0530294 uint8_t pmi_rev = 0;
295 uint32_t pmi_type = 0;
296
Umang Agrawal1b180582018-04-17 18:56:57 +0530297 pmi_type = board_pmic_target(1) & PMIC_TYPE_MASK;
Parth Dixit550ddf32016-11-28 17:00:29 +0530298 if(pmi_type == PMIC_IS_PMI8950)
299 {
300 /* read pmic spare register for rev */
301 pmi_rev = pmi8950_get_pmi_subtype();
302 if(pmi_rev)
303 board_pmi_target_set(1,pmi_rev);
304 }
Parth Dixit3e6dead2015-12-08 15:04:54 +0530305 }
306 }
307
Parth Dixit550ddf32016-11-28 17:00:29 +0530308
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530309 target_keystatus();
310
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530311 target_sdc_init();
312 if (partition_read_table())
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530313 {
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530314 dprintf(CRITICAL, "Error reading the partition table info\n");
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530315 ASSERT(0);
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530316 }
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530317
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530318#if LONG_PRESS_POWER_ON
Parth Dixit550ddf32016-11-28 17:00:29 +0530319 if(target_is_pmi_enabled())
320 shutdown_detect();
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530321#endif
Matthew Qin47dfdb72015-06-10 21:29:11 +0800322
323#if PON_VIB_SUPPORT
324 /* turn on vibrator to indicate that phone is booting up to end user */
Parth Dixit550ddf32016-11-28 17:00:29 +0530325 if(target_is_pmi_enabled())
326 vib_timed_turn_on(VIBRATE_TIME);
Matthew Qin47dfdb72015-06-10 21:29:11 +0800327#endif
328
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530329 if (target_use_signed_kernel())
330 target_crypto_init_params();
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +0530331
Parth Dixit5b954e02015-10-17 22:20:31 +0530332#if VERIFIED_BOOT
Mayank Grovere2384ad2017-10-26 12:11:17 +0530333 if (VB_M <= target_get_vb_version())
Parth Dixit6e6bad52015-07-30 19:02:38 +0530334 {
Mayank Grover32ba2992017-09-06 11:14:00 +0530335 clock_ce_enable(CE1_INSTANCE);
Parth Dixit6e6bad52015-07-30 19:02:38 +0530336
Mayank Grover32ba2992017-09-06 11:14:00 +0530337 /* Initialize Qseecom */
338 if (qseecom_init() < 0)
339 {
340 dprintf(CRITICAL, "Failed to initialize qseecom\n");
341 ASSERT(0);
342 }
Parth Dixit6e6bad52015-07-30 19:02:38 +0530343
Mayank Grover32ba2992017-09-06 11:14:00 +0530344 /* Start Qseecom */
345 if (qseecom_tz_init() < 0)
346 {
347 dprintf(CRITICAL, "Failed to start qseecom\n");
348 ASSERT(0);
349 }
Parth Dixit6e6bad52015-07-30 19:02:38 +0530350
Mayank Grover32ba2992017-09-06 11:14:00 +0530351 if (rpmb_init() < 0)
352 {
353 dprintf(CRITICAL, "RPMB init failed\n");
354 ASSERT(0);
355 }
Parth Dixitb4b2ffa2015-10-09 15:31:14 +0530356
Mayank Grover32ba2992017-09-06 11:14:00 +0530357 /*
358 * Load the sec app for first time
359 */
360 if (load_sec_app() < 0)
361 {
362 dprintf(CRITICAL, "Failed to load App for verified\n");
363 ASSERT(0);
364 }
Parth Dixit6e6bad52015-07-30 19:02:38 +0530365 }
Parth Dixit5b954e02015-10-17 22:20:31 +0530366#endif
367
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +0530368#if SMD_SUPPORT
369 rpm_smd_init();
370#endif
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530371}
372
373void target_serialno(unsigned char *buf)
374{
375 uint32_t serialno;
376 if (target_is_emmc_boot()) {
377 serialno = mmc_get_psn();
378 snprintf((char *)buf, 13, "%x", serialno);
379 }
380}
381
382unsigned board_machtype(void)
383{
Aparna Mallavarapue9bdacd2015-03-15 14:24:21 +0530384 return LINUX_MACHTYPE_UNKNOWN;
385}
386
387/* Detect the target type */
388void target_detect(struct board_data *board)
389{
390 /* This is already filled as part of board.c */
391}
392
393/* Detect the modem type */
394void target_baseband_detect(struct board_data *board)
395{
396 uint32_t platform;
397
398 platform = board->platform;
399
400 switch(platform) {
401 case MSM8952:
402 case MSM8956:
403 case MSM8976:
Parth Dixit4ec3fe22015-10-30 00:44:33 +0530404 case MSM8937:
Parth Dixit660369e2016-05-12 09:53:15 +0530405 case MSM8940:
Parth Dixit05f3c9f2016-03-18 17:14:57 +0530406 case MSM8917:
Mayank Grovercd5f0ff2016-10-03 18:08:52 +0530407 case MSM8920:
Parth Dixit05f3c9f2016-03-18 17:14:57 +0530408 case MSM8217:
409 case MSM8617:
lijuangf6563682018-04-04 20:26:52 +0800410 case SDM429:
411 case SDM439:
Aparna Mallavarapue9bdacd2015-03-15 14:24:21 +0530412 board->baseband = BASEBAND_MSM;
413 break;
Aparna Mallavarapu815b3242015-04-29 11:08:14 +0530414 case APQ8052:
415 case APQ8056:
416 case APQ8076:
Parth Dixit4ec3fe22015-10-30 00:44:33 +0530417 case APQ8037:
Parth Dixit05f3c9f2016-03-18 17:14:57 +0530418 case APQ8017:
Aparna Mallavarapu815b3242015-04-29 11:08:14 +0530419 board->baseband = BASEBAND_APQ;
420 break;
Aparna Mallavarapue9bdacd2015-03-15 14:24:21 +0530421 default:
422 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
423 ASSERT(0);
424 };
425}
426
427unsigned target_baseband()
428{
429 return board_baseband();
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530430}
431
lijuang395b5e62015-11-19 17:39:44 +0800432int set_download_mode(enum reboot_reason mode)
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530433{
434 int ret = 0;
435 ret = scm_dload_mode(mode);
436
437 pm8x41_clear_pmic_watchdog();
438
439 return ret;
440}
441
442int emmc_recovery_init(void)
443{
444 return _emmc_recovery_init();
445}
446
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530447unsigned target_pause_for_battery_charge(void)
448{
Umang Agrawal898a1912018-02-13 16:09:10 +0530449 uint32_t pmic = target_get_pmic();
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530450 uint8_t pon_reason = pm8x41_get_pon_reason();
451 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
Parth Dixit550ddf32016-11-28 17:00:29 +0530452 bool usb_present_sts = 1; /* don't care by default */
453
Umang Agrawal898a1912018-02-13 16:09:10 +0530454 if (target_is_pmi_enabled())
455 {
456 if (pmic == PMIC_IS_PMI632)
457 usb_present_sts = !(USBIN_UV_RT_STS_PMI632 &
458 pm8x41_reg_read(SMBCHG_USB_RT_STS));
459 else
460 usb_present_sts = (!(USBIN_UV_RT_STS &
461 pm8x41_reg_read(SMBCHG_USB_RT_STS)));
462 }
Parth Dixit550ddf32016-11-28 17:00:29 +0530463
Zhenhua Huangb46b9b52015-04-21 19:53:09 +0800464 dprintf(INFO, "%s : pon_reason is:0x%x cold_boot:%d usb_sts:%d\n", __func__,
465 pon_reason, is_cold_boot, usb_present_sts);
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530466 /* In case of fastboot reboot,adb reboot or if we see the power key
467 * pressed we do not want go into charger mode.
468 * fastboot reboot is warm boot with PON hard reset bit not set
469 * adb reboot is a cold boot with PON hard reset bit set
470 */
471 if (is_cold_boot &&
472 (!(pon_reason & HARD_RST)) &&
473 (!(pon_reason & KPDPWR_N)) &&
Zhenhua Huangb46b9b52015-04-21 19:53:09 +0800474 usb_present_sts)
Aparna Mallavarapuca676882015-01-19 20:39:06 +0530475 return 1;
476 else
477 return 0;
478}
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530479
480void target_uninit(void)
481{
c_wufeng8324c042016-01-25 10:37:37 +0800482#if PON_VIB_SUPPORT
Parth Dixit550ddf32016-11-28 17:00:29 +0530483 if(target_is_pmi_enabled())
484 turn_off_vib_early();
c_wufeng8324c042016-01-25 10:37:37 +0800485#endif
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530486 mmc_put_card_to_sleep(dev);
487 sdhci_mode_disable(&dev->host);
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530488 if (crypto_initialized())
Vijay Kumar Pendotib0f9ba32016-04-15 16:55:30 +0530489 {
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530490 crypto_eng_cleanup();
Vijay Kumar Pendotib0f9ba32016-04-15 16:55:30 +0530491 clock_ce_disable(CE1_INSTANCE);
492 }
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530493
494 if (target_is_ssd_enabled())
495 clock_ce_disable(CE1_INSTANCE);
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +0530496
Parth Dixit5b954e02015-10-17 22:20:31 +0530497#if VERIFIED_BOOT
Mayank Grovere2384ad2017-10-26 12:11:17 +0530498 if (VB_M <= target_get_vb_version())
Parth Dixit6e6bad52015-07-30 19:02:38 +0530499 {
Mayank Grover32ba2992017-09-06 11:14:00 +0530500 if (is_sec_app_loaded())
Parth Dixit6e6bad52015-07-30 19:02:38 +0530501 {
Mayank Grover32ba2992017-09-06 11:14:00 +0530502 if (send_milestone_call_to_tz() < 0)
503 {
504 dprintf(CRITICAL, "Failed to unload App for rpmb\n");
505 ASSERT(0);
506 }
507 }
508
509 if (rpmb_uninit() < 0)
510 {
511 dprintf(CRITICAL, "RPMB uninit failed\n");
Parth Dixit6e6bad52015-07-30 19:02:38 +0530512 ASSERT(0);
513 }
Parth Dixit6e6bad52015-07-30 19:02:38 +0530514
Mayank Grover32ba2992017-09-06 11:14:00 +0530515 clock_ce_disable(CE1_INSTANCE);
Parth Dixit6e6bad52015-07-30 19:02:38 +0530516 }
Parth Dixitb73ff342015-10-27 17:34:08 +0530517#endif
Parth Dixit5b954e02015-10-17 22:20:31 +0530518
Aparna Mallavarapufa5f8a72015-03-31 06:21:36 +0530519#if SMD_SUPPORT
520 rpm_smd_uninit();
521#endif
Aparna Mallavarapu7b638e62015-03-26 05:51:57 +0530522}
523
524void target_usb_init(void)
525{
526 uint32_t val;
527
528 /* Select and enable external configuration with USB PHY */
529 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
530
531 /* Enable sess_vld */
532 val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
533 writel(val, USB_GENCONFIG_2);
534
535 /* Enable external vbus configuration in the LINK */
536 val = readl(USB_USBCMD);
537 val |= SESS_VLD_CTRL;
538 writel(val, USB_USBCMD);
539}
540
541void target_usb_stop(void)
542{
543 /* Disable VBUS mimicing in the controller. */
544 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
545}
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530546
Padmanabhan Komanduru9d49f892015-04-10 12:58:46 -0700547static uint8_t splash_override;
548/* Returns 1 if target supports continuous splash screen. */
549int target_cont_splash_screen()
550{
551 uint8_t splash_screen = 0;
552 if (!splash_override) {
553 switch (board_hardware_id()) {
554 case HW_PLATFORM_MTP:
555 case HW_PLATFORM_SURF:
Vishnuvardhan Prodduturie116c002015-07-14 17:14:25 +0530556 case HW_PLATFORM_RCM:
feifanz174c82c2015-04-15 18:57:07 +0800557 case HW_PLATFORM_QRD:
Padmanabhan Komanduru9d49f892015-04-10 12:58:46 -0700558 splash_screen = 1;
559 break;
560 default:
561 splash_screen = 0;
562 break;
563 }
564 dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen);
565 }
566 return splash_screen;
567}
568
569void target_force_cont_splash_disable(uint8_t override)
570{
571 splash_override = override;
572}
573
Ray Zhangf95f5b92015-06-25 15:34:29 +0800574uint8_t target_panel_auto_detect_enabled()
575{
576 uint8_t ret = 0;
577
578 switch(board_hardware_id())
579 {
580 case HW_PLATFORM_QRD:
581 ret = platform_is_msm8956() ? 1 : 0;
582 break;
583 case HW_PLATFORM_SURF:
584 case HW_PLATFORM_MTP:
585 default:
586 ret = 0;
587 }
588 return ret;
589}
590
Aparna Mallavarapu1e8b0932015-03-29 23:38:13 +0530591/* Do any target specific intialization needed before entering fastboot mode */
592void target_fastboot_init(void)
593{
594 if (target_is_ssd_enabled()) {
595 clock_ce_enable(CE1_INSTANCE);
596 target_load_ssd_keystore();
597 }
598}
599
600void target_load_ssd_keystore(void)
601{
602 uint64_t ptn;
603 int index;
604 uint64_t size;
605 uint32_t *buffer = NULL;
606
607 if (!target_is_ssd_enabled())
608 return;
609
610 index = partition_get_index("ssd");
611
612 ptn = partition_get_offset(index);
613 if (ptn == 0){
614 dprintf(CRITICAL, "Error: ssd partition not found\n");
615 return;
616 }
617
618 size = partition_get_size(index);
619 if (size == 0) {
620 dprintf(CRITICAL, "Error: invalid ssd partition size\n");
621 return;
622 }
623
624 buffer = memalign(CACHE_LINE, ROUNDUP(size, CACHE_LINE));
625 if (!buffer) {
626 dprintf(CRITICAL, "Error: allocating memory for ssd buffer\n");
627 return;
628 }
629
630 if (mmc_read(ptn, buffer, size)) {
631 dprintf(CRITICAL, "Error: cannot read data\n");
632 free(buffer);
633 return;
634 }
635
636 clock_ce_enable(CE1_INSTANCE);
637 scm_protect_keystore(buffer, size);
638 clock_ce_disable(CE1_INSTANCE);
639 free(buffer);
640}
641
642crypto_engine_type board_ce_type(void)
643{
644 return CRYPTO_ENGINE_TYPE_HW;
645}
646
647/* Set up params for h/w CE. */
648void target_crypto_init_params()
649{
650 struct crypto_init_params ce_params;
651
652 /* Set up base addresses and instance. */
653 ce_params.crypto_instance = CE1_INSTANCE;
654 ce_params.crypto_base = MSM_CE1_BASE;
655 ce_params.bam_base = MSM_CE1_BAM_BASE;
656
657 /* Set up BAM config. */
658 ce_params.bam_ee = CE_EE;
659 ce_params.pipes.read_pipe = CE_READ_PIPE;
660 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
661 ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
662 ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
663
664 /* Assign buffer sizes. */
665 ce_params.num_ce = CE_ARRAY_SIZE;
666 ce_params.read_fifo_size = CE_FIFO_SIZE;
667 ce_params.write_fifo_size = CE_FIFO_SIZE;
668
669 /* BAM is initialized by TZ for this platform.
670 * Do not do it again as the initialization address space
671 * is locked.
672 */
673 ce_params.do_bam_init = 0;
674
675 crypto_init_params(&ce_params);
676}
lijuang3606df82015-09-02 21:14:43 +0800677
Parth Dixit550ddf32016-11-28 17:00:29 +0530678bool target_is_pmi_enabled(void)
679{
680 if(platform_is_msm8917() &&
Parth Dixitacec6bf2017-02-27 19:06:39 +0530681 (board_hardware_subtype() == HW_PLATFORM_SUBTYPE_SAP_NOPMI))
Parth Dixit550ddf32016-11-28 17:00:29 +0530682 return 0;
683 else
684 return 1;
685}
686
Parth Dixit17b85192016-12-28 15:51:33 +0530687#if _APPEND_CMDLINE
688int get_target_boot_params(const char *cmdline, const char *part, char **buf)
689{
690 int system_ptn_index = -1;
691 uint32_t buflen;
692 int ret = -1;
693
694 if (!cmdline || !part ) {
695 dprintf(CRITICAL, "WARN: Invalid input param\n");
696 return -1;
697 }
698
699 if (!strstr(cmdline, "root=/dev/ram")) /* This check is to handle kdev boot */
700 {
701 if (target_is_emmc_boot()) {
702 buflen = strlen(EXT4_CMDLINE) + sizeof(int) +1;
703 *buf = (char *)malloc(buflen);
704 if(!(*buf)) {
705 dprintf(CRITICAL,"Unable to allocate memory for boot params\n");
706 return -1;
707 }
708 /* Below is for emmc boot */
709 system_ptn_index = partition_get_index(part) + 1; /* Adding +1 as offsets for eMMC start at 1 and NAND at 0 */
710 if (system_ptn_index < 0) {
711 dprintf(CRITICAL,
712 "WARN: Cannot get partition index for %s\n", part);
713 free(*buf);
714 return -1;
715 }
716 snprintf(*buf, buflen, EXT4_CMDLINE"%d", system_ptn_index);
717 ret = 0;
718 }
719 }
720 /*in success case buf will be freed in the calling function of this*/
721 return ret;
722}
723#endif
724
lijuang3606df82015-09-02 21:14:43 +0800725uint32_t target_get_pmic()
726{
Umang Agrawal898a1912018-02-13 16:09:10 +0530727 if (target_is_pmi_enabled()) {
Umang Agrawal1b180582018-04-17 18:56:57 +0530728 uint32_t pmi_type = board_pmic_target(1) & PMIC_TYPE_MASK;
Umang Agrawal898a1912018-02-13 16:09:10 +0530729 if (pmi_type == PMIC_IS_PMI632)
730 return PMIC_IS_PMI632;
731 else
732 return PMIC_IS_PMI8950;
733 }
734 else {
735 return PMIC_IS_UNKNOWN;
736 }
lijuang3606df82015-09-02 21:14:43 +0800737}
Maria Yu3ce8b632018-03-23 13:26:31 +0530738
739void pmic_reset_configure(uint8_t reset_type)
740{
741 uint32_t pmi_type;
742
743 pmi_type = target_get_pmic();
744 if (pmi_type == PMIC_IS_PMI632) {
745 pmi632_reset_configure(reset_type);
746 } else {
747 if(target_is_pmi_enabled()) {
748 pm8994_reset_configure(reset_type);
749 } else {
750 pm8x41_reset_configure(reset_type);
751 }
752 }
753}
754