Deepa Dinamani | 1cc9764 | 2012-05-09 11:45:38 -0700 | [diff] [blame^] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <reg.h> |
| 31 | #include <compiler.h> |
| 32 | #include <qtimer.h> |
| 33 | #include <platform/irqs.h> |
| 34 | #include <platform/iomap.h> |
| 35 | #include <platform/interrupts.h> |
| 36 | |
| 37 | static platform_timer_callback timer_callback; |
| 38 | static void *timer_arg; |
| 39 | static time_t timer_interval; |
| 40 | /* time in ms from start of LK. */ |
| 41 | static volatile uint32_t current_time; |
| 42 | static uint32_t tick_count; |
| 43 | |
| 44 | extern void isb(); |
| 45 | |
| 46 | static enum handler_return qtimer_irq(void *arg) |
| 47 | { |
| 48 | current_time += timer_interval; |
| 49 | |
| 50 | /* Program the down counter again to get |
| 51 | * an interrupt after timer_interval msecs |
| 52 | */ |
| 53 | |
| 54 | __asm__ volatile("mcr p15, 0, %0, c14, c2, 0" : :"r" (tick_count)); |
| 55 | |
| 56 | isb(); |
| 57 | |
| 58 | return timer_callback(timer_arg, current_time); |
| 59 | } |
| 60 | |
| 61 | /* Programs the Physical Secure Down counter timer. |
| 62 | * interval : Counter ticks till expiry interrupt is fired. |
| 63 | */ |
| 64 | void qtimer_set_physical_timer(time_t msecs_interval, |
| 65 | platform_timer_callback tmr_callback, |
| 66 | void *tmr_arg) |
| 67 | { |
| 68 | uint32_t ctrl; |
| 69 | |
| 70 | /* Save the timer interval and call back data*/ |
| 71 | tick_count = msecs_interval * qtimer_tick_rate() / 1000;; |
| 72 | timer_interval = msecs_interval; |
| 73 | timer_arg = tmr_arg; |
| 74 | timer_callback = tmr_callback; |
| 75 | |
| 76 | /* Program CTRL Register */ |
| 77 | ctrl =0; |
| 78 | ctrl |= QTMR_TIMER_CTRL_ENABLE; |
| 79 | ctrl &= ~QTMR_TIMER_CTRL_INT_MASK; |
| 80 | |
| 81 | __asm__ volatile("mcr p15, 0, %0, c14, c2, 1" : :"r" (ctrl)); |
| 82 | |
| 83 | isb(); |
| 84 | |
| 85 | /* Set Physical Down Counter */ |
| 86 | __asm__ volatile("mcr p15, 0, %0, c14, c2, 0" : :"r" (tick_count)); |
| 87 | |
| 88 | isb(); |
| 89 | |
| 90 | /* Register for timer interrupts */ |
| 91 | |
| 92 | register_int_handler(INT_QTMR_SECURE_PHYSICAL_TIMER_EXP, qtimer_irq, 0); |
| 93 | unmask_interrupt(INT_QTMR_SECURE_PHYSICAL_TIMER_EXP); |
| 94 | |
| 95 | return; |
| 96 | |
| 97 | } |
| 98 | |
| 99 | void disable_qtimer() |
| 100 | { |
| 101 | uint32_t ctrl; |
| 102 | |
| 103 | mask_interrupt(INT_QTMR_SECURE_PHYSICAL_TIMER_EXP); |
| 104 | |
| 105 | /* program cntrl register */ |
| 106 | ctrl = 0; |
| 107 | ctrl |= ~QTMR_TIMER_CTRL_ENABLE; |
| 108 | ctrl &= QTMR_TIMER_CTRL_INT_MASK; |
| 109 | |
| 110 | __asm__ volatile("mcr p15, 0, %0, c14, c2, 1" : :"r" (ctrl)); |
| 111 | |
| 112 | isb(); |
| 113 | |
| 114 | } |
| 115 | |
| 116 | /* Function to return the frequency of the timer */ |
| 117 | uint32_t qtimer_get_frequency() |
| 118 | { |
| 119 | uint32_t freq; |
| 120 | |
| 121 | /* Read the Global counter frequency */ |
| 122 | __asm__ volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); |
| 123 | |
| 124 | return freq; |
| 125 | |
| 126 | } |
| 127 | |
| 128 | inline __ALWAYS_INLINE uint64_t qtimer_get_phy_timer_cnt() |
| 129 | { |
| 130 | uint32_t phy_cnt_lo; |
| 131 | uint32_t phy_cnt_hi; |
| 132 | |
| 133 | __asm__ volatile("mrrc p15,0,%0,%1, c14": |
| 134 | "=r"(phy_cnt_lo),"=r"(phy_cnt_hi)); |
| 135 | return ((uint64_t)phy_cnt_hi << 32) | phy_cnt_lo; |
| 136 | } |
| 137 | |
| 138 | uint32_t qtimer_current_time() |
| 139 | { |
| 140 | return current_time; |
| 141 | } |